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Simulator Configuration Guide for Synopsys Models

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Chapter 9: Using VERA with <strong>Synopsys</strong> <strong>Models</strong><strong>Simulator</strong> <strong>Configuration</strong> <strong>Guide</strong>Using Flex<strong>Models</strong> with the VERA UDF InterfaceNoteVera 5.2.3 is not supported on HP-UX 10.20. Flex<strong>Models</strong> used with theVERA UDF Interface are built on HP-UX 11.0. So files from$LMC_HOME/lib/hp700.lib will not work <strong>for</strong> HP-UX 10.20Flex<strong>Models</strong> use the VERA user-defined functions (UDF) interface. UDFs are “bodies”(written in C) of VERA methods. They are much like Verilog, PLI, or VHDL functions.UDFs must be declared in a VERA header (.vrh) file to be usable by VERA programs.They must also be compiled and linked into the simulator executable.To use Flex<strong>Models</strong> with VERA, you need to build the VERA dynamic library. Buildingthe VERA dynamic library is a two step process:1. Compile the vera_user.c file to create vera_user.o.2. Link the object file <strong>for</strong> the simulator you are using (found in Table 30 on page 209),where the object file contains the compiled code <strong>for</strong> the UDF functions used byFlex<strong>Models</strong>.For more in<strong>for</strong>mation on building the VERA dynamic library, refer to the UDFin<strong>for</strong>mation in the VERA User <strong>Guide</strong>.AttentionIf you are building the VERA dynamic library <strong>for</strong> Verilog on Solaris, do notuse the -B symbolic. Using this switch results in unresolved symbolwarnings.Table 29 lists files you will need in order to build the VERA dynamic library.:Table 29: FlexModel Files Used with the VERA UDF InterfaceFile Name Description Locationvera_user.cvera_slm_pli.overa_slm_mti.oSource file containing table of UDFfunctions used by Flex<strong>Models</strong>.Object file <strong>for</strong> VCS and NC-VHDL. Thisfile contains the compiled code <strong>for</strong> the UDFfunctions used by Flex<strong>Models</strong>.Object file <strong>for</strong> MTI Verilog and MTIVHDL. This file contains the compiled code<strong>for</strong> the UDF functions used by Flex<strong>Models</strong>.$LMC_HOME/sim/vera/src$LMC_HOME/lib/plat<strong>for</strong>m.lib$LMC_HOME/lib/plat<strong>for</strong>m.lib208 <strong>Synopsys</strong>, Inc. October 6, 2003

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