Simulator Configuration Guide for Synopsys Models

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Chapter 1: Using Synopsys Models with SimulatorsSimulator Configuration GuideTable 2: SmartModel SWIFT Parameters (Continued)Parameter Name Used By DescriptionJEDECFilePCLFileJEDEC-based PAL andPLD modelsProcessor models (forexample, microprocessorsand microcontrollers);these are usually hardwareverification models.Specifies a JEDEC file toload for a particular instanceof a SmartModel.Specifies a compiled PCLprogram file to load for aparticular instance of aSmartModel.NoteTo determine the required configuration file for any SmartModel, refer tothe model’s datasheet.Instantiating SmartModelsIf you are using an HDL-based simulator, generate a model wrapper file (model.v ormodel.vhd) using your simulator vendor’s procedure. Use the model wrapper toinstantiate the model in your design. The model wrapper must map the model’s ports tosignals in your design. Modify SWIFT parameters in the model wrapper as needed. Hereare some parameter examples for a SmartModel memory model:VHDL:U1: cyc7150GENERIC MAP(TimingVersion => "cy7c150",DelayRange => "MAX",MemoryFile => "mem1";.... )Verilog:cyc7150 u1( ... );defparamu1.TimingVersion = "cy7c150",u1.DelayRange = "MAX",u1.MemoryFile = "mem1";You can also instantiate SmartModels in schematic-capture based systems by usingmodel symbols and attaching values to symbol properties. For details on instantiatingSmartModels using symbols with QuickSim II, refer to “Using QuickSim II withSynopsys Models” on page 123.20 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideChapter 1: Using Synopsys Models with SimulatorsThe SWIFT Command ChannelThe SWIFT interface specification requires that simulator vendors include a minimalcommand interface to the SmartModel Library. This interface is called the commandchannel. The command channel supports several types of commands:● “Model Commands” on page 21● “Session Commands” on page 21Model CommandsModel commands affect only a selected model instance. Following is a list of themodel commands:DumpMemory output_fileDumps the current memory image of a model to the specified output file. Ifoutput_file exists, it is overwritten; otherwise, a new file is created.ReportStatusPrints a message that describes the configuration status of a model.SetConstraints ON | OFFEnables or disables timing constraint checks for a model. By default, models checkfor and warn of timing constraints.NoteSome simulator vendors supply additional interfaces to the DumpMemory,ReportStatus, and SetConstraints capabilities.Session CommandsSession commands act on all models in the simulation session. You can enable sessioncommands by setting the LMC_COMMAND environment variable. Here is an examplethat enables tracing of timing files and model versions, followed by a list of all thesession commands.% setenv LMC_COMMAND "TraceTimeFile on;TracePath ON"NoteThe session command strings are case-insensitive, as illustrated above(ON and on are equivalent).TraceTimeFile ON | OFFEnables or disables trace messages that list the timing files loaded at simulationstartup. The default is OFF.October 6, 2003 Synopsys, Inc. 21
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Chapter 9: Using VERA with Synopsys
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Chapter 10: Using SystemC with Syno
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Appendix A: Using LMTV with Synopsy
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IndexSimulator Configuration Guide$
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Simulator Configuration Guide for Synopsys Models

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