Simulator Configuration Guide for Synopsys Models

Simulator Configuration GuideChapter 1: Using Synopsys Models with SimulatorsSmartModel SWIFT ParametersSmartModel attributes or parameters are model-specific values needed by the simulatorto configure a model. You configure SmartModels when you instantiate them in yourdesign using these SWIFT parameters. This could take the form of Verilog defparams,VHDL generics, or symbol properties, depending on the simulator you are using. Fordetails, refer to the documentation for your simulator.Table 2 lists the SmartModel configuration parameters. All SmartModels require anInstanceName, TimingVersion, and DelayRange. In addition, some SmartModels need aMemoryFile or PCLFile attribute. FlexModels use a slightly different set of attributesfor configuration, described in “FlexModel SWIFT Parameters” on page 23.Table 2: SmartModel SWIFT ParametersParameter Name Used By DescriptionInstanceName All SmartModels Specifies an instance namefor a particular instance of aSmartModel. Used inmessages to indicate whichinstance is issuing themessage; also used in userdefinedtiming. Can be setby the simulator from thehierarchical name in theHDL description; or can beset using the InstanceNameproperty on the symbol.TimingVersion All SmartModels Specifies the timing versiona SmartModel instanceshould use when schedulingchanges on its outputs orchecking setup and holdtimes on its inputs.DelayRange All SmartModels Specifies a propagationdelay range for a particularinstance of a SmartModel.The allowed values are“min”. “typ”, and “max.”MemoryFileSmartModels with internalmemory such as RAMs,ROMs, and processorsand controllers that haveon-chip RAM or ROM.Specifies a memory imagefile (MIF) to load for aparticular instance of aSmartModel.October 6, 2003 Synopsys, Inc. 19