Simulator Configuration Guide for Synopsys Models

Chapter 5: Using NC-Verilog with Synopsys ModelsSimulator Configuration Guidedefault value, 0, is usually sufficient; setting a higher valueensures that unknowns will be propagated, but uses morepattern memory.random_seed=seed_valueSpecifies the initial seed for the random sequence generator.seed_value is an integer of value 0 (the default) through65535.device_or_pinDescriptionSpecifies the Verilog pathname of a device or pin whoseunknown values are to be translated into the value specified byvalue. The default is to apply the statement to all hardwaremodel instances in the simulation.The $lm_unknowns command lets you override the hardware modeler’s defaulthandling of unknown values for specified model instances or pins, or for all hardwaremodel instances in the simulation. By default, the hardware modeler translates allunknown values to “previous” before passing them to the device. Using this command,you can specify values of high (1), low (0) or float (?), or disable unknown propagation,for a specified instance or pin, or for all hardware model instances in the simulation if noinstance or pin is given. For detailed information about unknown handling, refer to theShell Software Reference Manual.ExamplesThe following example disables unknown propagation and causes a low value to bepassed to the device when an unknown value is passed to the hardware modeler for theinstance “Tbench.U1.”$lm_unknowns (“propagate=no”, “value=low”, “Tbench.U1”)The following example disables unknown propagation, causes a high value to be passedto the device when an unknown value is passed to the modeler, specifies 20 randomsequences to propagate unknowns through the hardware model, and specifies 200 as theseed for the random sequence generator, for all hardware model instances in thesimulation.$lm_unknowns (“propagate=yes”, “value=high”, “sequence_count=20”,“random_seed=200”)104 Synopsys, Inc. October 6, 2003