ATxmega128A3U-MHR - E-LAB Computers

More documents

Recommendations

Info

Table 36-42. Accuracy characteristics.Symbol Parameter Condition (2) Min. Typ. Max. UnitsRES Resolution Programmable to 8 or 12 bit 8 12 12 BitsINL (1)Integral non-linearity500ksps2000kspsV CC -1.0V < V REF < V CC -0.6V ±1.2 ±2All V REF ±1.5 ±3V CC -1.0V < V REF < V CC -0.6V ±1.0 ±2All V REF ±1.5 ±3lsbDNL (1) Differential non-linearity guaranteed monotonic
Symbol Parameter Condition Min. Typ. Max. UnitsOffset Error,input referredNoise0.51x gain, normal mode -28x gain, normal mode -564x gain, normal mode -41x gain, normal mode8x gain, normal modeV CC = 3.6V1.5Ext. V REF64x gain, normal mode 11mVmVrmsNote: 1. Maximum numbers are based on characterisation and not tested in production, and valid for 5% to 95% input voltage range.36.2.7 DAC CharacteristicsTable 36-44. Power supply, reference and output range.Symbol Parameter Condition Min. Typ. Max. UnitsAV CC Analog supply voltage V CC - 0.3 V CC + 0.3AV REF External reference voltage 1.0 V CC - 0.6 VR channel DC output impedance 50 Linear output voltage range 0.15 AV CC -0.15 VR AREF Reference input resistance >10 MCAREF Reference input capacitance Static load 7 pFMinimum Resistance load 1 kMaximum capacitance load100 pF1000 serial resistance 1 nFOutput sink/sourceOperating within accuracy specification AV CC /1000Safe operation 10mATable 36-45. Clock and timing.Symbol Parameter Condition Min. Typ. Max. Unitsf DACConversion rateC load =100pF,maximum step sizeNormal mode 0 1000Low power mode 0 500kspsXMEGA A3U [DATASHEET]8386C–AVR–02/201397
Page 1 and 2:
Features8/16-bit Atmel XMEGA A3U Mi
Page 4 and 5:
3. OverviewThe Atmel AVR XMEGA is a
Page 6 and 7:
4. ResourcesA comprehensive set of
Page 8 and 9:
The arithmetic logic unit (ALU) sup
Page 10 and 11:
Six of the 32 registers can be used
Page 12 and 13:
7.3.4 Production Signature RowThe p
Page 14 and 15:
7.8 Data Memory and Bus Arbitration
Page 16 and 17:
8. DMAC - Direct Memory Access Cont
Page 18 and 19:
Figure 9-1.Event system overview an
Page 20 and 21:
Figure 10-1. The clock system, cloc
Page 22 and 23:
11. Power Management and Sleep Mode
Page 24 and 25:
12. System Control and Reset12.1 Fe
Page 26 and 27:
13. WDT - Watchdog Timer13.1 Featur
Page 28 and 29:
Program address(base address) Sourc
Page 30 and 31:
15.3.1 Push-pullFigure 15-1. I/O co
Page 32 and 33:
15.4 Input sensingInput sensing is
Page 34 and 35:
Only Timer/Counter 0 has the split
Page 36 and 37:
18. AWeX - Advanced Waveform Extens
Page 38 and 39:
20. RTC - 16-bit Real-Time Counter2
Page 40 and 41:
Multipacket transfer enables a data
Page 42 and 43:
23. SPI - Serial Peripheral Interfa
Page 44 and 45:
25. IRCOM - IR Communication Module
Page 46 and 47: 28. ADC - 12-bit Analog to Digital
Page 48 and 49: 29. DAC - 12-bit Digital to Analog
Page 50 and 51: 30. AC - Analog Comparator30.1 Feat
Page 52 and 53: 31. Programming and Debugging31.1 F
Page 54 and 55: TXDnSSMOSIMISOSCKTransmitter Data f
Page 56 and 57: Table 32-3.Port C - alternate funct
Page 58 and 59: 33. Peripheral Module Address MapTh
Page 60 and 61: 34. Instruction Set SummaryMnemonic
Page 63 and 64: Mnemonics Operands Description Oper
Page 65 and 66: 35. Packaging information35.1 64API
Page 67 and 68: 36. Electrical CharacteristicsAll t
Page 69 and 70: 36.1.3 Current consumptionTable 36-
Page 71 and 72: 36.1.4 Wake-up time from sleep mode
Page 77 and 78: Symbol Parameter Condition Min. Typ
Page 79 and 80: Table 36-21. Programming time.Symbo
Page 81 and 82: t CRV IH1V IL1t CLt CK36.1.14.6 Ext
Page 85 and 86: 36.1.15 SPI CharacteristicsFigure 3
Page 87 and 88: 36.1.16 Two-Wire Interface Characte
Page 89 and 90: 36.2 ATxmega128A3U36.2.1 Absolute M
Page 95: 36.2.6 ADC characteristicsTable 36-
Page 117 and 118: 36.3.6 ADC characteristicsTable 36-
Page 139 and 140: 36.4.6 ADC characteristicsTable 36-
Page 145 and 146: Table 36-117.Programming time.Symbo
Page 147 and 148:
t CRV IH1V IL1t CLt CK36.4.14.6 Ext
Page 149 and 150:
Symbol Parameter Condition Min. Typ
Page 151 and 152:
36.4.15 SPI CharacteristicsFigure 3
Page 153 and 154:
36.4.16 Two-Wire Interface Characte
Page 155 and 156:
37. Typical Characteristics37.1 ATx
Page 157 and 158:
Figure 37-5. Active mode supply cur
Page 159 and 160:
Figure 37-9. Idle mode supply curre
Page 161 and 162:
Figure 37-13. Idle mode supply curr
Page 163 and 164:
37.1.1.4 Power-save mode supply cur
Page 165 and 166:
Figure 37-21. I/O pin pull-up resis
Page 167 and 168:
Figure 37-25. I/O pin output voltag
Page 169 and 170:
Figure 37-29. I/O pin output voltag
Page 171 and 172:
Figure 37-33. I/O pin input thresho
Page 173 and 174:
Figure 37-37. INL error vs. input c
Page 175 and 176:
Figure 37-41. Gain error vs. V REF
Page 177 and 178:
Figure 37-45. Offset error vs. V CC
Page 179 and 180:
Figure 37-49. DNL error vs. V REF .
Page 181 and 182:
Figure 37-53. Analog comparator hys
Page 183 and 184:
Figure 37-57. Voltage scaler INL vs
Page 185 and 186:
37.1.8 External Reset Characteristi
Page 187 and 188:
Figure 37-65. Reset pin input thres
Page 189 and 190:
37.1.10 Oscillator Characteristics3
Page 191 and 192:
Figure 37-72. 2MHz internal oscilla
Page 193 and 194:
Figure 37-76. 32MHz internal oscill
Page 195 and 196:
Page 197 and 198:
37.2 ATxmega128A3U37.2.1 Current co
Page 199 and 200:
Figure 37-88. Active mode supply cu
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
Figure 37-104. I/O pin pull-up resi
Page 209 and 210:
Figure 37-108. I/O pin output volta
Page 211 and 212:
Page 213 and 214:
Figure 37-116. I/O pin input thresh
Page 215 and 216:
Figure 37-120. INL error vs. input
Page 217 and 218:
Page 219 and 220:
Figure 37-128. Offset error vs. V C
Page 221 and 222:
Figure 37-132. DNL error vs. V REF
Page 223 and 224:
Figure 37-136. Analog comparator hy
Page 225 and 226:
Figure 37-140. Voltage scaler INL v
Page 227 and 228:
Page 229 and 230:
Figure 37-148. Reset pin input thre
Page 231 and 232:
Page 233 and 234:
Page 235 and 236:
Figure 37-159. 32MHz internal oscil
Page 237 and 238:
Page 239 and 240:
Page 241 and 242:
Figure 37-171. Active mode supply c
Page 243 and 244:
Figure 37-175. Idle mode supply cur
Page 245 and 246:
Page 247 and 248:
Page 249 and 250:
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
Page 263 and 264:
Page 265 and 266:
Page 267 and 268:
Page 269 and 270:
Page 271 and 272:
Page 273 and 274:
Page 275 and 276:
Page 277 and 278:
Page 279 and 280:
Page 281 and 282:
Page 283 and 284:
Figure 37-254. Active mode supply c
Page 285 and 286:
Page 287 and 288:
Page 289 and 290:
Page 291 and 292:
Page 293 and 294:
Page 295 and 296:
Page 297 and 298:
Page 299 and 300:
Page 301 and 302:
Page 303 and 304:
Page 305 and 306:
Page 307 and 308:
Page 309 and 310:
Page 311 and 312:
Page 313 and 314:
Page 315 and 316:
Page 317 and 318:
Page 319 and 320:
Page 321 and 322:
Page 323 and 324:
38. Errata38.1 ATxmega64A3U, ATxmeg
Page 325 and 326:
39.3 8386A - 07/20111. Initial revi
Page 327 and 328:
11. Power Management and Sleep Mode
Page 329:
36.4 ATxmega256A3U . . . . . . . .
show all

ATxmega128A3U-MHR - E-LAB Computers

Create successful ePaper yourself

Delete template?

Save as template?