ATxmega128A3U-MHR - E-LAB Computers

36.2.6 ADC characteristicsTable 36-40. Power supply, reference and input range.Symbol Parameter Condition Min. Typ. Max. UnitsAV CC Analog supply voltage V CC - 0.3 V CC + 0.3 VV REF Reference voltage 1 AV CC - 0.6 VR in Input resistance Switched 5.0 kC sample Input capacitance Switched 5.0 pFR AREF Reference input resistance (leakage only) >10 MC AREF Reference input capacitance Static load 7 pFV IN Input range -0.1 AV CC +0.1 VConversion range Differential mode, Vinp - Vinn -V REF V REF VV IN Conversion range Single ended unsigned mode, Vinp -V V REF -V VΔV Fixed offset voltage 190 LSBTable 36-41. Clock and timing.Symbol Parameter Condition Min. Typ. Max. UnitsClk ADCADC Clock frequencyMaximum is 1/4 of Peripheral clockfrequency100 2000kHzMeasuring internal signals 100 125Current limitation (CURRLIMIT) off 100 2000f ADCSample rateCURRLIMIT = LOW 100 1500CURRLIMIT = MEDIUM 100 1000kspsCURRLIMIT = HIGH 100 500Sampling Time 1/2 Clk ADC cycle 0.25 5 µsConversion time (latency)(RES+2)/2+(GAIN !=0)RES (Resolution) = 8 or 125 8Clk ADCcyclesStart-up time ADC clock cycles 12 24Clk ADCcyclesADC settling timeAfter changing reference or input mode 7 7 Clk ADCAfter ADC flush 1 1 cyclesXMEGA A3U [DATASHEET]8386C–AVR–02/201395