ATxmega128A3U-MHR - E-LAB Computers

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33. Peripheral Module Address MapThe address maps show the base address for each peripheral and module in Atmel AVR XMEGA A3U. For completeregister description and summary for each peripheral module, refer to the XMEGA AU manual.Table 33-1.Peripheral module address map.Base address Name Description0x0000 GPIO General Purpose IO Registers0x0010 VPORT0 Virtual Port 00x0014 VPORT1 Virtual Port 10x0018 VPORT2 Virtual Port 20x001C VPORT3 Virtual Port 20x0030 CPU CPU0x0040 CLK Clock Control0x0048 SLEEP Sleep Controller0x0050 OSC Oscillator Control0x0060 DFLLRC32M DFLL for the 32MHz Internal RC Oscillator0x0068 DFLLRC2M DFLL for the 2MHz RC Oscillator0x0070 PR Power Reduction0x0078 RST Reset Controller0x0080 WDT Watch-Dog Timer0x0090 MCU MCU Control0x00A0 PMIC Programmable MUltilevel Interrupt Controller0x00B0 PORTCFG Port Configuration0x00C0 AES AES Module0x00D0 CRC CRC Module0x0100 DMA DMA Module0x0180 EVSYS Event System0x01C0 NVM Non Volatile Memory (NVM) Controller0x0200 ADCA Analog to Digital Converter on port A0x0240 ADCB Analog to Digital Converter on port B0x0320 DACB Digital to Analog Converter on port B0x0380 ACA Analog Comparator pair on port A0x0390 ACB Analog Comparator pair on port B0x0400 RTC Real Time Counter0x0480 TWIC Two Wire Interface on port CXMEGA A3U [DATASHEET]8386C–AVR–02/201358
Base address Name Description0x04A0 TWIE Two Wire Interface on port E0x04C0 USB Universal Serial Bus Interface0x0600 PORTA Port A0x0620 PORTB Port B0x0640 PORTC Port C0x0660 PORTD Port D0x0680 PORTE Port E0x06A0 PORTF Port F0x07E0 PORTR Port R0x0800 TCC0 Timer/Counter 0 on port C0x0840 TCC1 Timer/Counter 1 on port C0x0880 AWEXC Advanced Waveform Extension on port C0x0890 HIRESC High Resolution Extension on port C0x08A0 USARTC0 USART 0 on port C0x08B0 USARTC1 USART 1 on port C0x08C0 SPIC Serial Peripheral Interface on port C0x08F8 IRCOM Infrared Communication Module0x0900 TCD0 Timer/Counter 0 on port D0x0940 TCD1 Timer/Counter 1 on port D0x0990 HIRESD High Resolution Extension on port D0x09A0 USARTD0 USART 0 on port D0x09B0 USARTD1 USART 1 on port D0x09C0 SPID Serial Peripheral Interface on port D0x0A00 TCE0 Timer/Counter 0 on port E0x0A90 HIRESE High Resolution Extension on port E0x0AA0 USARTE0 USART 0 on port E0x0AB0 USARTE1 USART 1 on port E0x0AC0 SPIE Serial Peripheral Interface on port E0x0B00 TCF0 Timer/Counter 0 on port FXMEGA A3U [DATASHEET]8386C–AVR–02/201359
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Features8/16-bit Atmel XMEGA A3U Mi
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3. OverviewThe Atmel AVR XMEGA is a
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4. ResourcesA comprehensive set of
Page 8 and 9: The arithmetic logic unit (ALU) sup
Page 10 and 11: Six of the 32 registers can be used
Page 12 and 13: 7.3.4 Production Signature RowThe p
Page 14 and 15: 7.8 Data Memory and Bus Arbitration
Page 16 and 17: 8. DMAC - Direct Memory Access Cont
Page 18 and 19: Figure 9-1.Event system overview an
Page 20 and 21: Figure 10-1. The clock system, cloc
Page 22 and 23: 11. Power Management and Sleep Mode
Page 24 and 25: 12. System Control and Reset12.1 Fe
Page 26 and 27: 13. WDT - Watchdog Timer13.1 Featur
Page 28 and 29: Program address(base address) Sourc
Page 30 and 31: 15.3.1 Push-pullFigure 15-1. I/O co
Page 32 and 33: 15.4 Input sensingInput sensing is
Page 34 and 35: Only Timer/Counter 0 has the split
Page 36 and 37: 18. AWeX - Advanced Waveform Extens
Page 38 and 39: 20. RTC - 16-bit Real-Time Counter2
Page 40 and 41: Multipacket transfer enables a data
Page 42 and 43: 23. SPI - Serial Peripheral Interfa
Page 44 and 45: 25. IRCOM - IR Communication Module
Page 46 and 47: 28. ADC - 12-bit Analog to Digital
Page 48 and 49: 29. DAC - 12-bit Digital to Analog
Page 50 and 51: 30. AC - Analog Comparator30.1 Feat
Page 52 and 53: 31. Programming and Debugging31.1 F
Page 54 and 55: TXDnSSMOSIMISOSCKTransmitter Data f
Page 56 and 57: Table 32-3.Port C - alternate funct
Page 60 and 61: 34. Instruction Set SummaryMnemonic
Page 63 and 64: Mnemonics Operands Description Oper
Page 65 and 66: 35. Packaging information35.1 64API
Page 67 and 68: 36. Electrical CharacteristicsAll t
Page 69 and 70: 36.1.3 Current consumptionTable 36-
Page 71 and 72: 36.1.4 Wake-up time from sleep mode
Page 77 and 78: Symbol Parameter Condition Min. Typ
Page 79 and 80: Table 36-21. Programming time.Symbo
Page 81 and 82: t CRV IH1V IL1t CLt CK36.1.14.6 Ext
Page 85 and 86: 36.1.15 SPI CharacteristicsFigure 3
Page 87 and 88: 36.1.16 Two-Wire Interface Characte
Page 89 and 90: 36.2 ATxmega128A3U36.2.1 Absolute M
Page 91 and 92: 36.2.3 Current consumptionTable 36-
Page 93 and 94: 36.2.4 Wake-up time from sleep mode
Page 95 and 96: 36.2.6 ADC characteristicsTable 36-
Page 101 and 102: Table 36-53. Programming time.Symbo
Page 103 and 104: t CRV IH1V IL1t CLt CK36.2.14.6 Ext
Page 107 and 108: 36.2.15 SPI CharacteristicsFigure 3
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36.2.16 Two-Wire Interface Characte
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36.3 ATxmega192A3U36.3.1 Absolute M
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36.3.3 Current consumptionTable 36-
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36.3.4 Wake-up time from sleep mode
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36.3.6 ADC characteristicsTable 36-
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Symbol Parameter Condition Min. Typ
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Table 36-85. Programming time.Symbo
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t CRV IH1V IL1t CLt CK36.3.14.6 Ext
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36.3.15 SPI CharacteristicsFigure 3
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36.4 ATxmega256A3U36.4.1 Absolute M
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36.4.3 Current consumptionTable 36-
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36.4.4 Wake-up time from sleep mode
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36.4.6 ADC characteristicsTable 36-
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Table 36-117.Programming time.Symbo
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t CRV IH1V IL1t CLt CK36.4.14.6 Ext
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36.4.15 SPI CharacteristicsFigure 3
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37. Typical Characteristics37.1 ATx
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Figure 37-5. Active mode supply cur
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Figure 37-9. Idle mode supply curre
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Figure 37-13. Idle mode supply curr
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37.1.1.4 Power-save mode supply cur
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Figure 37-21. I/O pin pull-up resis
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Figure 37-25. I/O pin output voltag
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Figure 37-29. I/O pin output voltag
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Figure 37-33. I/O pin input thresho
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Figure 37-37. INL error vs. input c
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Figure 37-41. Gain error vs. V REF
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Figure 37-45. Offset error vs. V CC
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Figure 37-49. DNL error vs. V REF .
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Figure 37-53. Analog comparator hys
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Figure 37-57. Voltage scaler INL vs
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37.1.8 External Reset Characteristi
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Figure 37-65. Reset pin input thres
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37.1.10 Oscillator Characteristics3
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Figure 37-72. 2MHz internal oscilla
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Figure 37-76. 32MHz internal oscill
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37.2 ATxmega128A3U37.2.1 Current co
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Figure 37-88. Active mode supply cu
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Figure 37-104. I/O pin pull-up resi
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Figure 37-108. I/O pin output volta
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Figure 37-116. I/O pin input thresh
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Figure 37-120. INL error vs. input
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Figure 37-128. Offset error vs. V C
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Figure 37-132. DNL error vs. V REF
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Figure 37-136. Analog comparator hy
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Figure 37-140. Voltage scaler INL v
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Figure 37-148. Reset pin input thre
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Figure 37-159. 32MHz internal oscil
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Figure 37-171. Active mode supply c
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Figure 37-175. Idle mode supply cur
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Figure 37-254. Active mode supply c
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38. Errata38.1 ATxmega64A3U, ATxmeg
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39.3 8386A - 07/20111. Initial revi
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11. Power Management and Sleep Mode
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36.4 ATxmega256A3U . . . . . . . .
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