ATxmega128A3U-MHR - E-LAB Computers

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TXDnSSMOSIMISOSCKTransmitter Data for USART nSlave Select for SPIMaster Out Slave In for SPIMaster In Slave Out for SPISerial Clock for SPID- Data- for USBD+ Data+ for USB32.1.6 Oscillators, Clock and EventTOSCnXTALnCLKOUTEVOUTRTCOUTTimer Oscillator pin nInput/Output for Oscillator pin nPeripheral Clock OutputEvent Channel OutputRTC Clock Source Output32.1.7 Debug/System functionsRESETPDI_CLKPDI_DATATCKTDITDOTMSReset pinProgram and Debug Interface Clock pinProgram and Debug Interface Data pinJTAG Test ClockJTAG Test Data InJTAG Test Data OutJTAG Test Mode SelectXMEGA A3U [DATASHEET]8386C–AVR–02/201354
32.2 Alternate Pin FunctionsThe tables below show the primary/default function for each pin on a port in the first column, the pin number in thesecond column, and then all alternate pin functions in the remaining columns. The head row shows what peripheral thatenable and use the alternate pin functions.For better flexibility, some alternate functions also have selectable pin locations for their functions, this is noted under thefirst table where this apply.Table 32-1.Port A - alternate functions.PORTA PIN# INTERRUPTADCAPOS/GAINPOSADCBPOSADCANEGADCAGAINNEGACAPOSACANEGACAOUTREFAGND 60AVCC 61PA0 62 SYNC ADC0 ADC8 ADC0 AC0 AC0 AREFPA1 63 SYNC ADC1 ADC9 ADC1 AC1 AC1PA2 64SYNC/ASYNCADC2 ADC10 ADC2 AC2PA3 1 SYNC ADC3 ADC11 ADC3 AC3 AC3PA4 2 SYNC ADC4 ADC12 ADC4 AC4PA5 3 SYNC ADC5 ADC13 ADC5 AC5 AC5PA6 4 SYNC ADC6 ADC14 ADC6 AC6 AC1OUTPA7 5 SYNC ADC7 ADC15 ADC7 AC7 AC0OUTTable 32-2.Port B - alternate functions.PORTB PIN# INTERRUPTADCAPOS/GAINPOSADCBPOSADCBNEGADCBGAINNEGACBPOSACBNEGACBOUTDACB REFB JTAGPB0 6 SYNC ADC8 ADC0 ADC0 AC0 AC0 AREFPB1 7 SYNC ADC9 ADC1 ADC1 AC1 AC1PB2 8SYNC/ASYNCADC10 ADC2 ADC2 AC2 DAC0PB3 9 SYNC ADC11 ADC3 ADC3 AC3 AC3 DAC1PB4 10 SYNC ADC12 ADC4 ADC4 AC4 TMSPB5 11 SYNC ADC13 ADC5 ADC5 AC5 AC5 TDIPB6 12 SYNC ADC14 ADC6 ADC6 AC6 AC1OUT TCKPB7 13 SYNC ADC15 ADC7 ADC7 AC7 AC0OUT TDOGND 14VCC 15XMEGA A3U [DATASHEET]8386C–AVR–02/201355
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Features8/16-bit Atmel XMEGA A3U Mi
Page 4 and 5: 3. OverviewThe Atmel AVR XMEGA is a
Page 6 and 7: 4. ResourcesA comprehensive set of
Page 8 and 9: The arithmetic logic unit (ALU) sup
Page 10 and 11: Six of the 32 registers can be used
Page 12 and 13: 7.3.4 Production Signature RowThe p
Page 14 and 15: 7.8 Data Memory and Bus Arbitration
Page 16 and 17: 8. DMAC - Direct Memory Access Cont
Page 18 and 19: Figure 9-1.Event system overview an
Page 20 and 21: Figure 10-1. The clock system, cloc
Page 22 and 23: 11. Power Management and Sleep Mode
Page 24 and 25: 12. System Control and Reset12.1 Fe
Page 26 and 27: 13. WDT - Watchdog Timer13.1 Featur
Page 28 and 29: Program address(base address) Sourc
Page 30 and 31: 15.3.1 Push-pullFigure 15-1. I/O co
Page 32 and 33: 15.4 Input sensingInput sensing is
Page 34 and 35: Only Timer/Counter 0 has the split
Page 36 and 37: 18. AWeX - Advanced Waveform Extens
Page 38 and 39: 20. RTC - 16-bit Real-Time Counter2
Page 40 and 41: Multipacket transfer enables a data
Page 42 and 43: 23. SPI - Serial Peripheral Interfa
Page 44 and 45: 25. IRCOM - IR Communication Module
Page 46 and 47: 28. ADC - 12-bit Analog to Digital
Page 48 and 49: 29. DAC - 12-bit Digital to Analog
Page 50 and 51: 30. AC - Analog Comparator30.1 Feat
Page 52 and 53: 31. Programming and Debugging31.1 F
Page 56 and 57: Table 32-3.Port C - alternate funct
Page 58 and 59: 33. Peripheral Module Address MapTh
Page 60 and 61: 34. Instruction Set SummaryMnemonic
Page 63 and 64: Mnemonics Operands Description Oper
Page 65 and 66: 35. Packaging information35.1 64API
Page 67 and 68: 36. Electrical CharacteristicsAll t
Page 69 and 70: 36.1.3 Current consumptionTable 36-
Page 71 and 72: 36.1.4 Wake-up time from sleep mode
Page 77 and 78: Symbol Parameter Condition Min. Typ
Page 79 and 80: Table 36-21. Programming time.Symbo
Page 81 and 82: t CRV IH1V IL1t CLt CK36.1.14.6 Ext
Page 85 and 86: 36.1.15 SPI CharacteristicsFigure 3
Page 87 and 88: 36.1.16 Two-Wire Interface Characte
Page 89 and 90: 36.2 ATxmega128A3U36.2.1 Absolute M
Page 91 and 92: 36.2.3 Current consumptionTable 36-
Page 93 and 94: 36.2.4 Wake-up time from sleep mode
Page 95 and 96: 36.2.6 ADC characteristicsTable 36-
Page 101 and 102: Table 36-53. Programming time.Symbo
Page 103 and 104: t CRV IH1V IL1t CLt CK36.2.14.6 Ext
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Symbol Parameter Condition Min. Typ
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36.2.15 SPI CharacteristicsFigure 3
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36.2.16 Two-Wire Interface Characte
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36.3 ATxmega192A3U36.3.1 Absolute M
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36.3.3 Current consumptionTable 36-
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36.3.4 Wake-up time from sleep mode
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36.3.6 ADC characteristicsTable 36-
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Table 36-85. Programming time.Symbo
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t CRV IH1V IL1t CLt CK36.3.14.6 Ext
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36.4 ATxmega256A3U36.4.1 Absolute M
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36.4.3 Current consumptionTable 36-
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36.4.4 Wake-up time from sleep mode
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36.4.6 ADC characteristicsTable 36-
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Table 36-117.Programming time.Symbo
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t CRV IH1V IL1t CLt CK36.4.14.6 Ext
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37. Typical Characteristics37.1 ATx
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Figure 37-5. Active mode supply cur
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Figure 37-9. Idle mode supply curre
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Figure 37-13. Idle mode supply curr
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37.1.1.4 Power-save mode supply cur
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Figure 37-21. I/O pin pull-up resis
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Figure 37-25. I/O pin output voltag
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Figure 37-29. I/O pin output voltag
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Figure 37-33. I/O pin input thresho
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Figure 37-37. INL error vs. input c
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Figure 37-41. Gain error vs. V REF
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Figure 37-45. Offset error vs. V CC
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Figure 37-49. DNL error vs. V REF .
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Figure 37-53. Analog comparator hys
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Figure 37-57. Voltage scaler INL vs
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37.1.8 External Reset Characteristi
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Figure 37-65. Reset pin input thres
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37.1.10 Oscillator Characteristics3
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Figure 37-72. 2MHz internal oscilla
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Figure 37-76. 32MHz internal oscill
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37.2 ATxmega128A3U37.2.1 Current co
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Figure 37-88. Active mode supply cu
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Figure 37-104. I/O pin pull-up resi
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Figure 37-108. I/O pin output volta
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Figure 37-116. I/O pin input thresh
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Figure 37-120. INL error vs. input
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Figure 37-128. Offset error vs. V C
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Figure 37-132. DNL error vs. V REF
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Figure 37-136. Analog comparator hy
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Figure 37-140. Voltage scaler INL v
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Figure 37-148. Reset pin input thre
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Figure 37-159. 32MHz internal oscil
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Figure 37-171. Active mode supply c
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Figure 37-175. Idle mode supply cur
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Figure 37-254. Active mode supply c
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38. Errata38.1 ATxmega64A3U, ATxmeg
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39.3 8386A - 07/20111. Initial revi
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11. Power Management and Sleep Mode
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36.4 ATxmega256A3U . . . . . . . .
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