ATxmega128A3U-MHR - E-LAB Computers

More documents

Recommendations

Info

Figure 37-319. 32.768kHz internal oscillator frequency vs. calibration value.V CC = 3.0V, T = 25°C.5045Frequency [kHz]40353025200 50 100 150 200 250 300RC32KCAL[7..0]37.4.10.3 2MHz Internal OscillatorFigure 37-320. 2MHz internal oscillator frequency vs. temperature.DFLL disabled.2.182.162.14Frequency [MHz]2.122.102.082.062.042.022.001.98-45 -35 -25 -15 -5 5 15 25 35 45 55 65 75Temperature [°C]853.3V3.0V2.7V2.2V1.8VXMEGA A3U [DATASHEET]8386C–AVR–02/2013316
Figure 37-321. 2MHz internal oscillator frequency vs. temperature.DFLL enabled, from the 32.768kHz internal oscillator .Frequency [MHz]2.0082.0052.0021.9991.9961.9931.9901.9871.9841.9811.9781.975-45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85Temperature [°C]3.0V3.3V2.7V2.2V1.8VFigure 37-322. 2MHz internal oscillator CALA calibration step size.V CC = 3V.0.370.350.32Step size [%]0.300.270.250.220.200.170 10 20 30 40 50 60 70 80 90 100 110 120 130CALA25°C-40°C85°CXMEGA A3U [DATASHEET]8386C–AVR–02/2013317
Page 1 and 2:
Features8/16-bit Atmel XMEGA A3U Mi
Page 4 and 5:
3. OverviewThe Atmel AVR XMEGA is a
Page 6 and 7:
4. ResourcesA comprehensive set of
Page 8 and 9:
The arithmetic logic unit (ALU) sup
Page 10 and 11:
Six of the 32 registers can be used
Page 12 and 13:
7.3.4 Production Signature RowThe p
Page 14 and 15:
7.8 Data Memory and Bus Arbitration
Page 16 and 17:
8. DMAC - Direct Memory Access Cont
Page 18 and 19:
Figure 9-1.Event system overview an
Page 20 and 21:
Figure 10-1. The clock system, cloc
Page 22 and 23:
11. Power Management and Sleep Mode
Page 24 and 25:
12. System Control and Reset12.1 Fe
Page 26 and 27:
13. WDT - Watchdog Timer13.1 Featur
Page 28 and 29:
Program address(base address) Sourc
Page 30 and 31:
15.3.1 Push-pullFigure 15-1. I/O co
Page 32 and 33:
15.4 Input sensingInput sensing is
Page 34 and 35:
Only Timer/Counter 0 has the split
Page 36 and 37:
18. AWeX - Advanced Waveform Extens
Page 38 and 39:
20. RTC - 16-bit Real-Time Counter2
Page 40 and 41:
Multipacket transfer enables a data
Page 42 and 43:
23. SPI - Serial Peripheral Interfa
Page 44 and 45:
25. IRCOM - IR Communication Module
Page 46 and 47:
28. ADC - 12-bit Analog to Digital
Page 48 and 49:
29. DAC - 12-bit Digital to Analog
Page 50 and 51:
30. AC - Analog Comparator30.1 Feat
Page 52 and 53:
31. Programming and Debugging31.1 F
Page 54 and 55:
TXDnSSMOSIMISOSCKTransmitter Data f
Page 56 and 57:
Table 32-3.Port C - alternate funct
Page 58 and 59:
33. Peripheral Module Address MapTh
Page 60 and 61:
34. Instruction Set SummaryMnemonic
Page 63 and 64:
Mnemonics Operands Description Oper
Page 65 and 66:
35. Packaging information35.1 64API
Page 67 and 68:
36. Electrical CharacteristicsAll t
Page 69 and 70:
36.1.3 Current consumptionTable 36-
Page 71 and 72:
36.1.4 Wake-up time from sleep mode
Page 77 and 78:
Symbol Parameter Condition Min. Typ
Page 79 and 80:
Table 36-21. Programming time.Symbo
Page 81 and 82:
t CRV IH1V IL1t CLt CK36.1.14.6 Ext
Page 83 and 84:
Page 85 and 86:
36.1.15 SPI CharacteristicsFigure 3
Page 87 and 88:
36.1.16 Two-Wire Interface Characte
Page 89 and 90:
36.2 ATxmega128A3U36.2.1 Absolute M
Page 91 and 92:
Page 93 and 94:
Page 95 and 96:
36.2.6 ADC characteristicsTable 36-
Page 97 and 98:
Page 99 and 100:
Page 101 and 102:
Page 103 and 104:
Page 105 and 106:
Page 107 and 108:
Page 109 and 110:
Page 111 and 112:
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Page 119 and 120:
Page 121 and 122:
Page 123 and 124:
Page 125 and 126:
Page 127 and 128:
Page 129 and 130:
Page 131 and 132:
Page 133 and 134:
Page 135 and 136:
Page 137 and 138:
Page 139 and 140:
Page 141 and 142:
Page 143 and 144:
Page 145 and 146:
Table 36-117.Programming time.Symbo
Page 147 and 148:
Page 149 and 150:
Page 151 and 152:
Page 153 and 154:
Page 155 and 156:
37. Typical Characteristics37.1 ATx
Page 157 and 158:
Figure 37-5. Active mode supply cur
Page 159 and 160:
Figure 37-9. Idle mode supply curre
Page 161 and 162:
Figure 37-13. Idle mode supply curr
Page 163 and 164:
37.1.1.4 Power-save mode supply cur
Page 165 and 166:
Figure 37-21. I/O pin pull-up resis
Page 167 and 168:
Figure 37-25. I/O pin output voltag
Page 169 and 170:
Figure 37-29. I/O pin output voltag
Page 171 and 172:
Figure 37-33. I/O pin input thresho
Page 173 and 174:
Figure 37-37. INL error vs. input c
Page 175 and 176:
Figure 37-41. Gain error vs. V REF
Page 177 and 178:
Figure 37-45. Offset error vs. V CC
Page 179 and 180:
Figure 37-49. DNL error vs. V REF .
Page 181 and 182:
Figure 37-53. Analog comparator hys
Page 183 and 184:
Figure 37-57. Voltage scaler INL vs
Page 185 and 186:
37.1.8 External Reset Characteristi
Page 187 and 188:
Figure 37-65. Reset pin input thres
Page 189 and 190:
37.1.10 Oscillator Characteristics3
Page 191 and 192:
Figure 37-72. 2MHz internal oscilla
Page 193 and 194:
Figure 37-76. 32MHz internal oscill
Page 195 and 196:
Page 197 and 198:
37.2 ATxmega128A3U37.2.1 Current co
Page 199 and 200:
Figure 37-88. Active mode supply cu
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
Figure 37-104. I/O pin pull-up resi
Page 209 and 210:
Figure 37-108. I/O pin output volta
Page 211 and 212:
Page 213 and 214:
Figure 37-116. I/O pin input thresh
Page 215 and 216:
Figure 37-120. INL error vs. input
Page 217 and 218:
Page 219 and 220:
Figure 37-128. Offset error vs. V C
Page 221 and 222:
Figure 37-132. DNL error vs. V REF
Page 223 and 224:
Figure 37-136. Analog comparator hy
Page 225 and 226:
Figure 37-140. Voltage scaler INL v
Page 227 and 228:
37.2.8 External Reset Characteristi
Page 229 and 230:
Figure 37-148. Reset pin input thre
Page 231 and 232:
37.2.10 Oscillator Characteristics3
Page 233 and 234:
Page 235 and 236:
Figure 37-159. 32MHz internal oscil
Page 237 and 238:
Figure 37-163. 48MHz internal oscil
Page 239 and 240:
37.3 ATxmega192A3U37.3.1 Current co
Page 241 and 242:
Figure 37-171. Active mode supply c
Page 243 and 244:
Figure 37-175. Idle mode supply cur
Page 245 and 246:
Figure 37-179. Idle mode supply cur
Page 247 and 248:
Page 249 and 250:
Figure 37-187. I/O pin pull-up resi
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Figure 37-199. I/O pin input thresh
Page 257 and 258:
Figure 37-203. INL error vs. input
Page 259 and 260:
Page 261 and 262:
Figure 37-211. Offset error vs. V C
Page 263 and 264:
Figure 37-215. DNL error vs. V REF
Page 265 and 266: Figure 37-219. Analog comparator hy
Page 267 and 268: Figure 37-223. Voltage scaler INL v
Page 269 and 270: 37.3.8 External Reset Characteristi
Page 271 and 272: Figure 37-231. Reset pin input thre
Page 273 and 274: 37.3.10 Oscillator Characteristics3
Page 275 and 276: Figure 37-238. 2MHz internal oscill
Page 277 and 278: Figure 37-242. 32MHz internal oscil
Page 281 and 282: 37.4 ATxmega256A3U37.4.1 Current co
Page 283 and 284: Figure 37-254. Active mode supply c
Page 285 and 286: Figure 37-258. Idle mode supply cur
Page 287 and 288: Figure 37-262. Idle mode supply cur
Page 289 and 290: 37.4.1.4 Power-save mode supply cur
Page 291 and 292: Figure 37-270. I/O pin pull-up resi
Page 293 and 294: Figure 37-274. I/O pin output volta
Page 295 and 296: Figure 37-278. I/O pin output volta
Page 297 and 298: Figure 37-282. I/O pin input thresh
Page 299 and 300: Figure 37-286. INL error vs. input
Page 301 and 302: Figure 37-290. Gain error vs. V REF
Page 303 and 304: Figure 37-294. Offset error vs. V C
Page 305 and 306: Figure 37-298. DNL error vs. V REF
Page 307 and 308: Figure 37-302. Analog comparator hy
Page 309 and 310: Figure 37-306. Voltage scaler INL v
Page 311 and 312: 37.4.8 External Reset Characteristi
Page 313 and 314: Figure 37-314. Reset pin input thre
Page 315: 37.4.10 Oscillator Characteristics3
Page 323 and 324: 38. Errata38.1 ATxmega64A3U, ATxmeg
Page 325 and 326: 39.3 8386A - 07/20111. Initial revi
Page 327 and 328: 11. Power Management and Sleep Mode
Page 329: 36.4 ATxmega256A3U . . . . . . . .
show all

ATxmega128A3U-MHR - E-LAB Computers

Create successful ePaper yourself

Delete template?

Save as template?