ATxmega128A3U-MHR - E-LAB Computers

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Figure 37-205. DNL error vs. sample rate.T = 25C, V CC = 3.6V, V REF = 3.0V external.0.70DNL [LSB]0.650.600.550.500.450.40Differential modeSingle-ended signed modeSingle-ended unsigned mode0.350.50 0.65 0.80 0.95 1.10 1.25 1.40 1.55 1.70 1.85 2.00Sampling speed [MS/s]Figure 37-206. DNL error vs. input code.0.80.60.4DNL [LSB]0.20-0.2-0.4-0.60 512 1024 1536 2048 2560 3072 3584 4096ADC Input CodeXMEGA A3U [DATASHEET]8386C–AVR–02/2013258
Figure 37-207. Gain error vs. V REF .T = 25C, V CC = 3.6V, ADC sampling speed = 500ksps.4Gain error [mV]20-2-4Single-ended signed modeSingle-ended unsigned mode-6Differential mode-8-101.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0V REF [V]Figure 37-208. Gain error vs. V CC .T = 25C, V REF = external 1.0V, ADC sampling speed = 500ksps.Gain Error [mV]3.02.52.01.51.00.50-0.5-1.0Single-ended signed modeSingle-ended unsigned mode-1.5Differential mode-2.01.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6V CC [V]XMEGA A3U [DATASHEET]8386C–AVR–02/2013259
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Features8/16-bit Atmel XMEGA A3U Mi
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3. OverviewThe Atmel AVR XMEGA is a
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4. ResourcesA comprehensive set of
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The arithmetic logic unit (ALU) sup
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Six of the 32 registers can be used
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7.3.4 Production Signature RowThe p
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7.8 Data Memory and Bus Arbitration
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8. DMAC - Direct Memory Access Cont
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Figure 9-1.Event system overview an
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Figure 10-1. The clock system, cloc
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11. Power Management and Sleep Mode
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12. System Control and Reset12.1 Fe
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13. WDT - Watchdog Timer13.1 Featur
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Program address(base address) Sourc
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15.3.1 Push-pullFigure 15-1. I/O co
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15.4 Input sensingInput sensing is
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Only Timer/Counter 0 has the split
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18. AWeX - Advanced Waveform Extens
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20. RTC - 16-bit Real-Time Counter2
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Multipacket transfer enables a data
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23. SPI - Serial Peripheral Interfa
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25. IRCOM - IR Communication Module
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28. ADC - 12-bit Analog to Digital
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29. DAC - 12-bit Digital to Analog
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30. AC - Analog Comparator30.1 Feat
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31. Programming and Debugging31.1 F
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TXDnSSMOSIMISOSCKTransmitter Data f
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Table 32-3.Port C - alternate funct
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33. Peripheral Module Address MapTh
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34. Instruction Set SummaryMnemonic
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Mnemonics Operands Description Oper
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35. Packaging information35.1 64API
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36. Electrical CharacteristicsAll t
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36.1.3 Current consumptionTable 36-
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36.1.4 Wake-up time from sleep mode
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Symbol Parameter Condition Min. Typ
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Table 36-21. Programming time.Symbo
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t CRV IH1V IL1t CLt CK36.1.14.6 Ext
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36.1.15 SPI CharacteristicsFigure 3
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36.1.16 Two-Wire Interface Characte
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36.2 ATxmega128A3U36.2.1 Absolute M
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36.2.6 ADC characteristicsTable 36-
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Table 36-117.Programming time.Symbo
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37. Typical Characteristics37.1 ATx
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Figure 37-5. Active mode supply cur
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Figure 37-9. Idle mode supply curre
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Figure 37-13. Idle mode supply curr
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37.1.1.4 Power-save mode supply cur
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Figure 37-21. I/O pin pull-up resis
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Figure 37-25. I/O pin output voltag
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Figure 37-29. I/O pin output voltag
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Figure 37-33. I/O pin input thresho
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Figure 37-37. INL error vs. input c
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Figure 37-41. Gain error vs. V REF
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Figure 37-45. Offset error vs. V CC
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Figure 37-49. DNL error vs. V REF .
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Figure 37-53. Analog comparator hys
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Figure 37-57. Voltage scaler INL vs
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37.1.8 External Reset Characteristi
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Figure 37-65. Reset pin input thres
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37.1.10 Oscillator Characteristics3
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Figure 37-72. 2MHz internal oscilla
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Figure 37-76. 32MHz internal oscill
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37.2 ATxmega128A3U37.2.1 Current co
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Figure 37-88. Active mode supply cu
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37.2.1.4 Power-save mode supply cur
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Page 215 and 216: Figure 37-120. INL error vs. input
Page 217 and 218: Figure 37-124. Gain error vs. V REF
Page 219 and 220: Figure 37-128. Offset error vs. V C
Page 221 and 222: Figure 37-132. DNL error vs. V REF
Page 223 and 224: Figure 37-136. Analog comparator hy
Page 225 and 226: Figure 37-140. Voltage scaler INL v
Page 227 and 228: 37.2.8 External Reset Characteristi
Page 229 and 230: Figure 37-148. Reset pin input thre
Page 231 and 232: 37.2.10 Oscillator Characteristics3
Page 233 and 234: Figure 37-155. 2MHz internal oscill
Page 235 and 236: Figure 37-159. 32MHz internal oscil
Page 239 and 240: 37.3 ATxmega192A3U37.3.1 Current co
Page 241 and 242: Figure 37-171. Active mode supply c
Page 243 and 244: Figure 37-175. Idle mode supply cur
Page 247 and 248: 37.3.1.4 Power-save mode supply cur
Page 257: Figure 37-203. INL error vs. input
Page 267 and 268: Figure 37-223. Voltage scaler INL v
Page 269 and 270: 37.3.8 External Reset Characteristi
Page 271 and 272: Figure 37-231. Reset pin input thre
Page 273 and 274: 37.3.10 Oscillator Characteristics3
Page 275 and 276: Figure 37-238. 2MHz internal oscill
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Page 283 and 284: Figure 37-254. Active mode supply c
Page 289 and 290: 37.4.1.4 Power-save mode supply cur
Page 299 and 300: Figure 37-286. INL error vs. input
Page 301 and 302: Figure 37-290. Gain error vs. V REF
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Figure 37-306. Voltage scaler INL v
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37.4.8 External Reset Characteristi
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Figure 37-314. Reset pin input thre
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37.4.10 Oscillator Characteristics3
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Figure 37-325. 32MHz internal oscil
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Figure 37-329. 48MHz internal oscil
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38. Errata38.1 ATxmega64A3U, ATxmeg
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39.3 8386A - 07/20111. Initial revi
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11. Power Management and Sleep Mode
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36.4 ATxmega256A3U . . . . . . . .
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