••••Contents of register R:Contents of register R+l:(and only one) of the following actions with the pattern byteand the decimal digit:<strong>1.</strong> <strong>The</strong> fi II character (contents of bit positions 0-7 of registerR) or a blank character replaces the byte in thedestination byte string.2. <strong>The</strong> decimal digit is expanded to zoned decimal format'and replaces the pattern byte in the destination bytestring.<strong>The</strong> destination byte string is an editing pattern that beginsin the byte location pointed to by the destination addressin register R + 1, and is C bytes in length. <strong>The</strong> decimalinformation field, which must be in packed decimal format,begins with the byte location pointed to by the displacementin EBS plus the source address in register R. <strong>The</strong> decimalinformation field must contain legal decimal digit andsign codes (packed format) and must begin with a decimaldigit.<strong>The</strong> destination byte string (the editing pattern) may containany 8-bit codes desired. However, four byte codesin the editing pattern have special meanings. <strong>The</strong>se codesare as follows:Binary value Function Abbrevi ati on0010 0000 (X'20 ') Digit selector ds0010 0001 (X'211) Signifi cance start ss0010 0010 (X'221) Field separation fs0010 0011 (X'23 1 ) Immediate signifi- sicance startBefore executing EBS, the condition code should be sett" • _____ MOO if •• tho <strong>1.</strong>1- hi"h ..........Io .. ...Ii"a .... f tho ...Io,...;m,.,1 ..... mho .. ;., i ....".~ _. __ • _.~ _ ••••____•••• _ ••• _ ••• ....,_..... IIIthe left half of a byte, and should be set to 0100 if thehigh-order digit is in the right half of a byte.<strong>The</strong> editing operation performed on each pattern byte ofthe destination byte string is determined by the followingcondi tions:<strong>1.</strong> <strong>The</strong> pattern byte obtained from the destination bytestring.2. <strong>The</strong> decimal digit obtained from the decimal numberfield.3. <strong>The</strong> current state of the condition code.Depending upon various combinations of these conditions'the instruction EDIT BYTE STRING performs one3. <strong>The</strong> pattern byte remains unchanged.In general, the normal editing process is as follows:<strong>1.</strong> Each byte of the destination byte string is replaced bya fi II character until significance is present, either inthe destination byte string or in the decimal informationfield. Significance is indicated by any of thefollowing:a. <strong>The</strong> pattern byte is X' 23 1 (immediate significancestart), which begins significance with the currentdecimal digit.b. <strong>The</strong> pattern byte is X' 21 1 (significance start),which begins significance with the following patternbyte.c. <strong>The</strong> current decimal digit is nonzero, which beginssignifi cance with the current pattern byte.2. After significance is encountered, each pattern bytethat is X' 20' (digit selector), X' 21 1(significance start),X'22 1 (field separator), or X' 23 1 (immediate significancestart) is replaced by a zoned decimal numberfrom the decimal field and all other pattern bytes areunchanged. This process continues unti I any of thefollowing conditions occurs:a. A positive sign is encountered in the decimal field,in which case subsequent pattern bytes are replacedby blank characters unti I significance isagain present, unti I a field separator is encountered,or unti I the destination byte string is entirelyprocessed, whichever occurs first.b. A negative sign is encountered in the decimalfield, in which case subsequent pattern bytes areunchanged unti I signifi cance is again present, unti Ia field separator is encountered, or unti I the destinationbyte string is entirely processed, whi cheveroccurs fi rst.c. A pattern byte of X' 22 1 (field separator) is encountered,in which case the field separator is replacedby a fi II character; subsequent pattern bytes are replacedby the fill character until significance is92 Byte-String Instructions
again present, unti I a positive or negative sign isencountered, or unti I the destination byte stringis entirely processed, whichever occurs first.d. <strong>The</strong> destination byte string is entirely processed,in which case the basic processor executes thenext instruction in sequence.Detai led operation of EDIT BYTE STRING follows. <strong>The</strong>explanation is necessari Iy quite detailed due to the highdegree of flexibi lity inherent in EBS. Condition codesettings are made continuously during the editing processand these settings help determine how each subsequent patternbyte will be edited. <strong>The</strong> summary of condition codesettings given later in this section wi II help clarify thefollowing discussion:<strong>1.</strong> If the count in bit position 0-7 of register R+l is anonzero, a pattern byte is obtained from the destinationbyte string; if the count in register R+l is 0,the basi c processor executes the next instruction insequence.2. If the pattern byte is a digit selector (X'20'), a significancestart (X'211), or immediate significancestart (X'23 1 ), a digit is accessed from the decimalinformation field as follows:a. A decimal byte is obtained from the byte locationpointed to by the displacement in EBS plus thesource address in register R.b. If bits 0-3 of the decimal byte are a sign code,the basi c processor auto mati ca lIy aborts executi onor EBS ana traps ro iocarion X;45;, wlrh the contentsof register R, register R+l, the conditioncode, and the destination byte string unchangedfrom their current contents.c. If CC2 is currently set to 0, the digit to be usedfor editing is the left digit (bits 0-3) of the decimalbyte; however, if CC2 is currently set to 1,the digit to be used is the right digit (bits 4-7)of the decimal byte. In either case, CC3 is setto 1 if the digit is nonzero. If CC2 is set to 1and the right digit (bits 4-7) of the decimal byteis a sign code, the basic processor automaticallyaborts execution of EBS and traps to location X'45 1 ,as described above.d. One of the following editing actions is performed:ConditionsActionMarkConditions Action MarkPattern byte=S S (X 1211)CC4=l (cont.)(because CC4= 1 meanssignificance alreadyencountered}.Pattern byte=SS Expand digit to zoned Mode 1CC4--oformat, store in patnonzerodigittern byte location(because nonzero digitbegins significance),and set CC4 to <strong>1.</strong>Pattern byte=SS Store fi II character in Mode 2CC4--opattern byte locationdigit=O(because significancestarts with next patternbyte) and setCC4 to <strong>1.</strong>Pattern byte=DS(X'20'} Expand digit to zoned NoneCC4=lformat, and storedigit in pattern bytelocation.Pattern byte=DS Expand digit to zoned Mode 1CC4=Oformat, store digit innonzero digitpattern byte location,and set CC4 to 1 tosignal significance.Pattern byte=DS Store fi II character in NoneCC4=Opattern byte locati ondigit=O(because significancenot encountered yet).e. If CC2 is currently reset to 0 and if bits 4-7 ofthe decimal byte are a positive decimal sign code,CCl is set to 1, CC4 is reset to 0, and the sourceaddress in register R is incremented by <strong>1.</strong> If CC2is currently reset to 0 and if bits 4-7 of the decimalbyte are a negative decimal sign code, CCland CC4 are both set to 1, and the source addressis incremented by <strong>1.</strong> Otherwise, CC2 is addedto the source address and then CC2 is inverted.f. If marking is invoked at set d, above, one of thetwo following marking operations are performed:Mode 1: Load bits 13-31 of register R+l into bitpositions 13-31 of register 1; bit positions0-12 of register are unpredictable.Pattern byte=SI(X '23 1 )Expand digit to zonedformat, store in patternbyte locati on,and set CC4 to 1 (startsignificance).Mode 1Mode 2: Load bits 13-31 of register R+l into bitpositions 13-31 of register 1 and thenincrement the contents of register 1by 1; bit positions 0-12 of register 1 areunpredictable.Pattern byte=SS(X'21I)CC4=1Expand digit to zonedformat and store inpattern byte locationNoneIf marking is not applicable (i. e., significancehas not been encountered), the contents of register1 are not affected.Byte-String Instructions 93
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Xerox 560 ComputerReference Manual9
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4. INPUT/OUTPUT OPERA TIO NS 142 AG
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1. XEROX 560 COMPUTER SYSTEMINTRODU
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Many operations are performed in fl
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Rapid Context Switching. When respo
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2. SYSTEM ORGANIZATIONThe elements
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FAST MEMORYARITHMETIC AND CONTROL U
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INFORMATION BOUNDARIESBasic process
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(Maximumof eight)Core Core Core Cor
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3. Diagnostic logic. Each memory dr
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eference address field of the instr
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Instruction in memory:Instruction i
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Real-extended addressing is specifi
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Table 1. Basic Processor Operating
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DesignationFunctionDesignationFunct
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InterruptStateDisarmedArmed[$Waitin
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AddressTable 2. Interrupt Locations
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is assumed to contain an XPSD or a
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Table 3. Summary of Trap LocationsL
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TRAP MASKSThe programmer may mask t
- Page 47 and 48: PUSH-DOWN STACK LIMIT TRAPPush-down
- Page 49 and 50: Instruction Name Mnemonic FaultDeci
- Page 51 and 52: subroutine. However, with certain c
- Page 53 and 54: 3. INSTRUCTION REPERTOIREThis chapt
- Page 55 and 56: CC1 is unchanged by the instruction
- Page 57 and 58: Condition code settings:2 3 4 Resul
- Page 59 and 60: Example 2, odd R field value:Before
- Page 61 and 62: significance (FS), floating zero (F
- Page 63 and 64: next sequential register after regi
- Page 65 and 66: R 1 R2 R3 MeaningoThe effective vir
- Page 67 and 68: Condition code settings:2 3 4 Resul
- Page 69 and 70: MIMULTIPLY IMMEDIATE(Immediate oper
- Page 71 and 72: original contents of register R, re
- Page 73 and 74: Instruction NameCompare HalfwordMne
- Page 75 and 76: Condition code settings:2 3 4 Resul
- Page 77 and 78: 2 3 4 Result of ShiftCircular Shift
- Page 79 and 80: 4. At the completion of the left sh
- Page 81 and 82: Instruction NameFloating Subtract L
- Page 83 and 84: The following table shows the possi
- Page 85 and 86: Table 8.Condition Code Settings for
- Page 87 and 88: PACKED DECIMAL NUMBERSAll decimal a
- Page 89 and 90: DSTDECIMAL STORE(Byte index alignme
- Page 91 and 92: If no indirect addressing or indexi
- Page 93 and 94: Instruction NameMnemonicDesignation
- Page 95 and 96: Both byte strings are C bytes in le
- Page 97: of the destination byte that caused
- Page 101 and 102: The new contents of register 7 are:
- Page 103 and 104: traps to location X'42 1 as a resul
- Page 105 and 106: If there is sufficient space in the
- Page 107 and 108: If CC1, or CC3, or both CC1 and CC3
- Page 109 and 110: appropriate memory stack locations
- Page 111 and 112: II, EI) are generated by II ORing"
- Page 113 and 114: In the real extended addressing mod
- Page 115 and 116: CAll INSTRUCTIONSEach ofthe four CA
- Page 117 and 118: The XPSD instruction' is used for t
- Page 119 and 120: If (I)1O = 0, trap or interrupt ins
- Page 121 and 122: For either memory map format and ei
- Page 123 and 124: initial value plus the initial valu
- Page 125 and 126: Table 9. Status Word 0Field Bits Co
- Page 127 and 128: READ INTERRUPT INHIBITSThe followin
- Page 129 and 130: Table 11.Read Direct Mode 9 Status
- Page 131 and 132: SET ALARM INDICATORThe following co
- Page 133 and 134: INPUT jOUTPUT INSTRUCTIONSThe I/o i
- Page 135 and 136: Table 13.Description of I/o Instruc
- Page 137 and 138: Table 15.Device Status Byte (Regist
- Page 139 and 140: Table 16. Operational Status Byte (
- Page 141 and 142: Table 19.Status Response Bits for A
- Page 143 and 144: If CC4 = 0, the MIOP is in a normal
- Page 145 and 146: 2 3 4 Meaningo 0 I/o address not re
- Page 147 and 148: The functions of bits within the DC
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4. Each unit-record controller (int
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Interrupt at Channel End (Bit Posit
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Transfer in Channel. A control lOCO
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Otherwise, the first word of the ne
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Depending upon the characteristics
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change the rate on the primary cons
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Location(hex) (dec)20 3221 3322 342
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Table 22.Diagnostic Control (P-Mode
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at its normal rate (e. g., fixed du
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SET LOW CLOCK MARGINSThis command c
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BP STATUS AND NO.Th i s group of i
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Input5MPri ntout5MFunctionStore X 1
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6. SYSTEM CONFIGURATION CONTROLPool
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Table 25. Functions of Processor Cl
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Table 26. Functions of Memory Unit
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STANDARD 8-BIT COMPUTER CODES (EBCD
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STANDARD SYMBOL-CODE CORRESPONDENCE
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STANDARD SYMBOL-CODE CORRESPONDENCE
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TABLE OF POWERS OF SIXTEEN II162564
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HEXADECIMAL-DECIMAL INTEGER CONVERS
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HEXADECIMAL-DECIMAL INTEGER CONVERS
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HEXADECIMAL-DECIMAL INTEGER CONVERS
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HEXADECIMAL-DECIMAL FRACTION CONVER
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HEXADECIMAL-DECIMAL FRACTION CONVER
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APPENDIX B.GLOSSARY OF SYMBOLIC TER
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TermMeaningTermMeaningWKxWrite key
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Table C-2. Memory Unit Status Regis
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Y OYf'lV r'f'lrnf'lrtil"\n'''' ....
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