1. xerox 560 computer system - The UK Mirror Service

BitPosition Designation. Function8 MS Master/slave mode control9 MM Memory map mode control10 DM Decimal arithmetic trapmask11 AM Fixed-point arithmeticoverflow trap mask15-31 IA Instruction address32-35 WK Write key37 CI Counter interrupt groupinhibit38 II I/O interrupt group inhibit39 EI External interrupt inhibit56-59 RP Reg i ster po inter60 RA Register altered61 MA Mode alteredThe detailed functions of the various portions of the programstatus words are described in Chapter 2, "Program StatusWords".of lPSD is a 1, or is disarmed if bit 11 of LPSD is a O.If bit 10 of lPSD is a 0, no interrupt level is affectedin any way, regardless of whether b-it 11 of LPSD is 1or O. If bit 10 of the lPSD is a 0 and bit 11 of lPSDis 1, the PDF flag is cleared. (Interrupt levels are describedin detai I in Chapter 2, "Interrupt System". )Bit position10 (CL) 11 (AD) FunctionooClear and disarm interrupt level.Clear and arm interrupt level.Clear PDF flag.o o No control action.3. The PDF flag is normally reset by the last instructionof a trap routine, which is an LPSD instruction havingbit 10 equal to 0 and bit 11 equal to 1.These portions of the effective doubleword that correspondto undefined fields in the program status words are ignored.Affected: (PSWs), interrupt system if (1)10 = 1ED O_ 3- CC; ED 5_ 7- FS,FX,FN;LPSDLOAD PROGRAM STATUS WORDS(Doubleword index alignment, privileged)ED -MS' ED - MM·8 '9 'ED 15_ 31- IA; ED 32_ 35- WK;LOAD PROGRAM STATUS WORDS replaces bits o through 39,60 and 61 of the current program status words with bits 0through 39, 60 and 61 of the effective doubleword.Control bits used in the LPSD instruction are:BitPosition Designation Control Function8 LP Load pointer control10 Cl Clearing of interrupt level11 AD Armed/disarmed stateThe following conditional operations are performed:1. If bit position 8 (LP) of LPSD conta ins a 1, bits 56through 59 (register pointer) of the current programstatus words are replaced by bits 56 through 59 of theeffedive doublewOid; if bit 8 of LPSD is u 0, tht=: cu,-­rent register pointer value remains unchanged.2. If bit position 10(CL}of LPSD contains a 1, the highestpriority interrupt level currently in the active state iscleared (i. e., reset to either the armed state or the disarmedstate); the interrupt level. is armed if bit 11 (AD)ED 37_ 39- CI, II, EI; if (1)8 = 1, ED 56_ 59- RPED60 - RA; ED61 - MAu: In = 1 ~ ... ,J In"\"10 · ....·1\··\·'11 = . 1 , C!CCi and aim iiitciruptIf (1)10 = 1 and (1)11 = 0, clear and disarm interruptXPSDEXCHANGE PROGRAM STATUS WORDS(Doubleword index alignment, privileged)EXCHANGE PROGRAM STATUS WORDS stores the currentlyactive PSWs in the doubleword location addressed bythe effective address of the XPSD instruction. The followingdoubleword is then accessed from memory and loadedinto the active PSWs registers.110 Control Instructions