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1. xerox 560 computer system - The UK Mirror Service

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If there is sufficient space in the stack for all of thespecified registers, PSM operates as follows:<strong>1.</strong> <strong>The</strong> contents of registers R to R = CC - 1 are stored inascending sequence, beginning with the locationtion pointed to by the current top-of-stack address(SPD15_31)t plus 1 and ending with the current topof-stackaddress plus CC.2. <strong>The</strong> current top-of-stack address is incremented by thevalue of CC, to point to the new top-of-stack location.3. <strong>The</strong> space count (SPD33-47) is decremented by thevalue of CC and the word count is incremented by thevalue of CC.4. <strong>The</strong> condition code is set to reflect the new status ofthe space count.Affected: (SPD), (TSA+1) to(TSA+CC), CCTrap: Push-down stack limit(R) - (SPD)15_31 + <strong>1.</strong> .. (R+CC-l) - (SPD)t 15-31 + CC(SPD)15_ 31+CC -SPD 15_ 3/(SPD)33_47-CC -SPD 33_ 47(SPD) 49-63 +CC - SPD 49-63Condition code settings:0002 3 4 Result of PSM0 0 00 00 00 0 0Space count> o.Space count = O.Word count + CC > 2 15 _1,TW = <strong>1.</strong>Space count < CC, TS = <strong>1.</strong>InstructioncompletedIf the instruction operation extends into a memory pageprotected either by the access protection codes or writelocks, the memory protection trap can occur. If the operationextends into a memory region"that is physically notpresent, the nonexistent memory address trap can occur.If the address of the elements within the stack (pointed toby the top-of-stack address) is in the range 0 through -15,then the registers indi cated by the R field of the PSM instructionare stored in the general registers rather than inmain memory. In this case the results wi II be unpredictable ifany source registers are also used as destination registers.PLMPULL MULTIPLE(Doubleword index alignment)PULL MULTIPLE loads a sequential set of general registersfrom the push-down stack defined by the stack pointerdoubleword located at the effective doubleword address ofPLM. <strong>The</strong> condition code must contain a count of the numberof words to be pulled from the stack. (An initiaJ valueof 0000 for the condition code specifies that 16 words areto be pulled from the stack.) <strong>The</strong> registers are treated as acircular set (with register 0 following register 15), the firstregister to be loaded from the stack is register R+CC-1, andthe contents of the current top-of-stack location becomesthe contents of this register. <strong>The</strong> last register to be loadedis register R.If there is a sufficient number of words in the stack to loadall of the specified registers, PLM operates as toiiows:<strong>1.</strong> Registers R+CC-1 to register R are loaded in descendingsequence, beginning with the contents of the locationpointed to by the current top-of-stack address(SPD15-31)t and ending with the contents of the locationpointed to by the current top-of-stack addressminus CC-<strong>1.</strong>o 0Space count < CC, worqcount = 0, TS = <strong>1.</strong>2. <strong>The</strong> current top-of-stack address is decremented by thevalue of CC, to point to the new" top-of-stack location.0 0Space count < CC, wordcount + CC > 215_1TS = 1, and TW = <strong>1.</strong>Instructi onaborted3. <strong>The</strong> space count (SPD33-47) is incremented by thevalue of CC and the word count is decremented by thevalue of CC.0 000Space count = 0, TS = <strong>1.</strong>Space count = 0, wordcount = 0, TS = <strong>1.</strong>Space count = 0, wordcount + CC > 215_1,TS = 1, and TW = <strong>1.</strong>tFor real extended mode of addressing this is a 20-bitfield (12-31); for real and virtual addressing modes it is a17-bit field (15-31).4. <strong>The</strong> condition code is set to reflect the new status ofthe word count.Affected: (SPD), (R+CC-l)to (R), CC((SPDh5_31t-R +CC -1, ... ,((SPD)15-31 -Icc - 11) - Rt(SPD)15-31 - CC- SPD 15-31 t(SPD)33-47 + CC - SPD33-47(SPD)49-63 - CC - SPD49-63Trap: Push-down stack limitpush-Down Instructions (Non-Privileged) 99

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