Section 4. Program Memory - Microchip Taiwan

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dsPIC33E/PIC24E Family Reference ManualAllocating different page registers for read and write access allows the architecture to supportdata movement from different PSV to EDS pages, by configuring DSRPAG and DSWPAG toaddress PSV and EDS space, respectively. The data can be moved from PSV to EDS space bya single instruction.Figure 4-9 illustrates the generation of the PSV address. The 15 Least Significant bits (LSbs) ofthe PSV address are provided by the W register that contains the effective address. The MostSignificant bit (MSb) of the W register is not used to form the address. Instead, the MSb specifieswhether to perform a PSV access from program memory space or a normal access from the datamemory space. If the effective address of the W register is 0x8000 or greater, the data accesswill occur from program memory space, depending on the page selected by the DSRPAGregister. All data access occurs from the data memory when the effective address of theW register is less than 0x8000.Figure 4-9:PSV Address GenerationEAByteSelect1DSRPAGDSRPAGX (1)Select DSRPAGYfor PSVAddressDSRPAG= 1?NDSRPAG (2)1EAGenerateEDSaddress8 bits15 bits23-bit PS Effective AddressUser Program Space ReadNote 1: DSRPAG = 11 is used for accessing the Most Significant Byte (MSB), DSRPAG = 10 is used foraccessing the least significant word (lsw).2: PSV access is only performed if 0x200 ≤ DSRPAG ≤ 0x3FF.The remaining address bits are provided by the 8 LSb of the Read Data Space Page register(DSRPAG). The DSRPAG bits are concatenated with the 15 LSb of the W registerholding the effective address, and the MSb is forced to ‘0’, thereby forming a 24-bit programmemory address.Note:PSV can only be used to access values in the program memory space. Tableinstructions must be used to access values in the user configuration space.The LSb of the W register value is used as a Byte Select bit, which allows instructions using PSVto operate in Byte or Word mode.The PSV address is split into lsw and MSB. When DSRPAG = 0b10, the lsw 16 bits of the24-bit PS word can be accessed using PSV. When DSRPAG = 0b11, the MSB of the 24-bitPS word can be accessed using PSV. This is illustrated in Figure 4-10 and Figure 4-11. Therange of valid DSRPAG values for a lsw read starts at DSRPAG = 0x200 and the range of validDSRPAG values for a MSB read starts at DSRPAG = 0x300.DS70613B-page 4-14© 2010 Microchip Technology Inc.
Section 4. Program MemoryFigure 4-10:Program Space Visibility Operation lsw AccessDSRPAG0x2A2Program SpaceSelect PSV AccessDSRPAG = 1Data Space0x0000DSRPAG15X DataSpaceEA16EA = 015EA[15] = 1DSRPAG = 2'b100x800015DSRPAG = 08230x51000023 15 00xFFFFHigh/Low Select0x517FFF0x0010Data Read4Program Memory© 2010 Microchip Technology Inc. DS70613B-page 4-15
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Section 4. Program Memory - Microchip Taiwan

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