TDA8358J Full bridge vertical deflection output circuit in ... - Laro

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Philips SemiconductorsFull bridge vertical deflection output circuitin LVDMOS with east-west amplifierProduct specificationTDA8358JEquivalent thermal resistance networkThe TDA8358J has two independent power dissipatingsystems, the vertical output circuit and the east-westcircuit.It is recommended to verify the individual maximum (peak)junction temperatures of both circuits. Therefore themaximum (peak) power dissipations of the circuits andalso the heatsink temperature should be measured. Themaximum (peak) junction temperatures can be calculatedby using an equivalent thermal network (see Fig.6).The network only includes the contribution of themaximum (peak) power dissipation P TRv(peak) , being thedissipation of the most critical transistor internallyconnected to pins OUTA and VGND. The model assumesequivalent maximum (peak) power dissipations during thedifferent vertical scan stages for all the functionally pairedtransistors. The calculated maximum (peak) junctiontemperatures should not exceed T j = 150 °C.EXAMPLEMeasured or known values:• The east-west power dissipation: P EW =3W• The vertical power dissipation: P V =6W• The maximum (peak) power dissipation of the mostcritical transistor: P TRv(peak) =5W• The case temperature: T c =85°C.The IC total power dissipation is:P tot =P EW +P V =6+3=9WIt should be noted that the allowed IC total powerdissipation is P tot = 15 W (maximum value).The maximum (peak) temperature T P1(peak) is given by:• T P1(peak) =T c +(P EW +P TRv(peak) ) × R th(P1-c)=85+(3+5)×2.2 = 102.6 °CThe maximum (peak) junction temperatures for the outputcircuits are given by:• T j(EW)(peak) =T P1(peak) +R th(EW-P1) × P EW= 102.6 + 10.5 × 3 = 134.1 °C• T j(TRv)(peak) =T P1(peak) +R th(TRv-P1) × P TRv(peak)= 102.6 + 5.2 × 5 = 128.6 °Chandbook, halfpageT EW(M)T TRv(M)R th(EW-P1)10.5 K/WP EWT P1(M)R th(TRv-P1)5.2 K/WP TRv(M)R th(P1-c)2.2 K/WP totT cMGL872Fig.6 Equivalent thermal resistance network.2002 Sep 25 14
Philips SemiconductorsFull bridge vertical deflection output circuitin LVDMOS with east-west amplifierProduct specificationTDA8358JINTERNAL PIN CONFIGURATIONPIN SYMBOL EQUIVALENT CIRCUIT1 INA1300 ΩMBL1002 INB2300 ΩMBL1023 V P4 OUTB6 VGND9 V FB10 OUTA93104MGL86965 INEW7 EWGND8 OUTEW300 Ω57MGL86882002 Sep 25 15
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TDA8358J Full bridge vertical deflection output circuit in ... - Laro

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