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TDA8358J Full bridge vertical deflection output circuit in ... - Laro

TDA8358J Full bridge vertical deflection output circuit in ... - Laro

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Philips Semiconductors<strong>Full</strong> <strong>bridge</strong> <strong>vertical</strong> <strong>deflection</strong> <strong>output</strong> <strong>circuit</strong><strong>in</strong> LVDMOS with east-west amplifierProduct specification<strong>TDA8358J</strong>The flyback supply voltage calculated this way isapproximately 5% to 10% higher than required.Calculation of the power dissipation of the <strong>vertical</strong><strong>output</strong> stageThe power dissipation of the <strong>vertical</strong> <strong>output</strong> stage is givenby the formula:P V =P sup − P LThe power to be supplied is given by the formula:IP sup = V coil( peak)P × ----------------------- + V2 P × 0.015 [A] + 0.3 [W]In this formula 0.3 [W] represents the average value of thelosses <strong>in</strong> the flyback supply.The average external load power dissipation <strong>in</strong> the<strong>deflection</strong> coil and the measur<strong>in</strong>g resistor is given by theformula:P L( I coil( peak)) 2= ------------------------------- × ( R3coil + R M )ExampleTable 1Table 2Application valuesSYMBOL VALUE UNITI coil(peak) 1.2 AI coil(p-p) 2.4 AL coil 5 mHR coil 6 ΩR M 0.6 Ωf vert 50 Hzt FB 640 µsCalculated valuesSYMBOL VALUE UNITV P 14 VR M +R coil (hot) 7.8 Ωt vert 0.02 sx 0.000641V FB 30 VP sup 8.91 WP L 3.74 WP V 5.17 WPower dissipation calculation for the east-west stageIn general the shape of the east-west <strong>output</strong> wave form isa parabola. The <strong>output</strong> voltage will be higher at thebeg<strong>in</strong>n<strong>in</strong>g and end of the <strong>vertical</strong> scan compared to thevoltage at the scan middle, while the <strong>output</strong> current will behigher at the scan middle. This results <strong>in</strong> an almost uniformpower dissipation distribution dur<strong>in</strong>g scan. Therefore thepower dissipation can be calculated by multiply<strong>in</strong>g theaverage values of the <strong>output</strong> voltage and the <strong>output</strong>current of p<strong>in</strong> OUTEW.When verify<strong>in</strong>g the dissipation the switch-on and switch-offdissipation should also be taken <strong>in</strong>to account. Powerdissipation dur<strong>in</strong>g start-up can be 3 to 5 times higher thandur<strong>in</strong>g normal operation.Heats<strong>in</strong>k calculationThe value of the heats<strong>in</strong>k can be calculated <strong>in</strong> a standardway with a method based on average temperatures. Therequired thermal resistance of the heats<strong>in</strong>k is determ<strong>in</strong>edby the maximum die temperature of 150 °C. In general werecommend a design for an average die temperaturenot exceed<strong>in</strong>g 130 °C. It should be noted that theheats<strong>in</strong>k thermal resistance R th(h-a) found by perform<strong>in</strong>g astandard calculation will be lower then normally found fora <strong>vertical</strong> <strong>deflection</strong> stand alone device, due to thecontribution of the EW power dissipation to this value.EXAMPLEMeasured or known values:P EW = 3 W; P V = 6 W; T amb =40°C; T j = 130 °C;R th(j-c) = 4 K/W; R th(c-h) = 1 K/W.The required heats<strong>in</strong>k thermal resistance is given by:T j – T amb( ) = ------------------------ –( R+th( j – c)+ R th c – hR th h – aP EWP VWhen we use the values known we f<strong>in</strong>d:130 – 40( ) = --------------------- – (3+64 + 1 ) = 5 K/WR th h – aThe heats<strong>in</strong>k temperature will be:( ) )T h =T amb +R th(h-a) × P tot =40+5×9=85°C2002 Sep 25 13

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