Controller HX8258 datasheet - M-COMP

HX8258-A1200CH TFT LCD Source Driver with TCONRESL[2:0] 011 1024x768ID[1:0] 10 1~340ID[1:0] 01 341~682LR L S1200~S1(1020ch) LR L S1200~S1(1026ch)UD HUD HUDPS1200HX8258-AUDBS1UDPS1200HX8258-AID[1:0] 10 683~1024LR L S1200~S1(1026ch)UD H(1, 1) (1024, 1)UDBS1UDPS1200HX8258-AUDBS1STVUSTVDCKVUDBOEVID[1:0] 10 685~1024 ID[1:0] 01 343~684LR H S1200~S1(1020ch) LR H S1200~S1(1026ch)UD HUD HUDPS1200HX8258-AUDBS1UDPS1200HX8258-ADATA SHEET V02ID[1:0] 10 1~342LR H S1200~S1(1026ch)UD H(1, 1) (1024, 1)UDBS1UDPS1200HX8258-AUDBS1STVUSTVDCKVUDBOEVG768G768G1G11024RGBx7681024RGBx768(1, 768) (1024, 768)(1, 768) (1024, 768)ID[1:0] 10 1~340ID[1:0] 01 341~682LR L S1200~S1(1020ch) LR L S1200~S1(1026ch)UD LUD LUDPS1200HX8258-AUDBS1UDPS1200HX8258-AID[1:0] 10 683~1024LR L S1200~S1(1026ch)UD L(1, 1) (1024, 1)UDBS1UDPS1200HX8258-AUDBS1STVUSTVDCKVUDBOEVID[1:0] 10 685~1024 ID[1:0] 01 343~684LR H S1200~S1(1020ch) LR H S1200~S1(1026ch)UD LUD LUDPS1200HX8258-AUDBS1UDPS1200HX8258-AID[1:0] 10 1~342LR H S1200~S1(1026ch)UD L(1, 1) (1024, 1)UDBS1UDPS1200HX8258-AUDBS1STVUSTVDCKVUDBOEVG768G600G1G11024RGBx7681024RGBx768(1, 768) (1024, 768)(1, 768) (1024, 768)Figure 5. 20 HX8258-A put up side and HX8677 put right side for 1024RGB X 768HX8258-A has several modes of timing control circuit, according to the setting (ID0 &ID1) and shift direction (LR) of the driver. These modes are decided by ID0, ID1 andLR settings as table 5.1. For example, when resolution is 800RGBx480, LR=H andHX8258-A {ID1, ID0} is set as the 00, it latches the display data from the 1st to the400th clock at DE active regions. When HX8258-A is set as the second ({ID1, ID0} =01), it starts latching data from the 401st to the 800th clock at DE active region.Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.19-January, 2007