ITERATIVE CIRCUITS Full Adder AN BN CN 0 0 0 0 0 CN-1 00 01 ...
ITERATIVE CIRCUITS Full Adder AN BN CN 0 0 0 0 0 CN-1 00 01 ...
ITERATIVE CIRCUITS Full Adder AN BN CN 0 0 0 0 0 CN-1 00 01 ...
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<strong>ITERATIVE</strong> <strong>CIRCUITS</strong><strong>Full</strong> <strong>Adder</strong>A N-1 B N-1 A N B N A N+1 B N+1C N-2 C N -1 C N C N+1S N-1 S N S N+1A N B N C N-1 S N C N A N B N A N B N0 0 0 0 0 C N-1 <strong>00</strong> <strong>01</strong> 11 10 C N-1 <strong>00</strong> <strong>01</strong> 11 1<strong>00</strong> 0 1 0 1 0 0 1 0 1 0 0 0 1 <strong>00</strong> 1 0 0 1 1 1 0 1 0 1 0 1 1 10 1 1 1 <strong>01</strong> 0 0 0 1 S N C N1 0 1 1 <strong>01</strong> 1 0 1 0 S N = A N ⊕ B N ⊕ C N-11 1 1 1 1 C N = A N B N + A N C N-1 + B N C N-1TRUTH TABLEC N-1B NA NA NB N S N A NC N-1C NHalf <strong>Adder</strong>B NC NX Y Z M<strong>00</strong> <strong>00</strong> Z = X⊕ Y<strong>01</strong> 10 M = XY10 1<strong>01</strong>1 <strong>01</strong> A N B NTRUTH TABLE X YZ = ½ sum½ adder MM = ½ carryZC N-1X Y½ adder MZfull adderC NS N18
ExampleDesign a circuit with two input numbers A = (A N …A 0 ) and B = (B N …B 0 )and an output that is 1 if A>B and 0 otherwise.Stage M has three inputsA M , B M and C M-1 which is 1 if (A M-1 …A 0 )>(B M-1 …B 0 ) and zero otherwise.and Stage M has a single output, C M.The truth table for the Mth cell isA M B M C M-1 C M B M C M-1<strong>00</strong>0 0 A M <strong>00</strong> <strong>01</strong> 11 1<strong>00</strong><strong>01</strong> 1 0 0 1 0 <strong>00</strong>10 0 1 1 1 1 <strong>00</strong>11 <strong>01</strong><strong>00</strong> 1 C M1<strong>01</strong> 1110 0 C M = A M B M ’ + A M C M-1 + B M ’C M-1111 1 C 0 = A 0 B 0 ’Note that the first cell is not typical.19
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