CompactPCI and AdvancedTCA Systems - OpenSystems Media

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SPECIALHIGH-END EMBEDDED COMPUTINGPCI Express enables high-end embeddedcomputing applicationsBy Jim IsonEmbedded computing has various meanings to each companydesigning products for the “embedded” computingmarket. For every definition of “embedded” there is adefinition of what is considered “high-end.” One thing typicallyremains the same when “high-end” and “embedded” are usedtogether… there is never enough processing power to be considered“high-end” while remaining physically or thermally smallenough to be considered “embedded.” This is especially truewhen companies choose to adopt industry standard architecturesbased on widely available commercial desktop silicon. The formfactor may not fit the application, or the high-end computingpower may be overly constrained by the thermal requirements.As PCI Express continues the imminent replacement of PCIas the host add-in card bus of choice, high-end embeddedcomputing applications are poised to take advantage of thisquantum leap in technology through several industry standards.Many of these standard architectures from the PCI-SIG,PICMG, and VITA organizations are pending release in thecoming quarter. These standards will aid the embedded designerwith a multitude of issues associated with high-performanceembedded computing. In this article, Jim explains new technologicaladvancements of the PCI Express bus that will enhancethe architecture choices of high-end embedded computingdesigners. The standards discussed in this article include PCIExpress Cable, COM Express, and CompactPCI Express withan overview of SHB Express, XMC, and MicroTCA.PCI Express, in the most basic sense, is packetized PCI transmittedserially over several transmission media. The media canbe traces inside a backplane, motherboard, or add-in board, orover a twisted pair cable in many standardized mechanical formfactors. It is ideally suited toward high-speed chip-to-chip,board-to-board, and box-to-box applications. PCI Express usesLow Voltage Differential Signaling (LVDS) to transmit the PCIpackets over, in the most basic form, a four-wire bus running ata clock speed of 2.5 GHz. This four-wire bus is referred to as aPCI Express lane. The lane provides a total available bandwidth of5 Gbps. A single lane between two PCI Express end point devices,along with any of the optional sideband signals for enhancedfeatures, is called a x1 (by one) link. Designers can place severallanes between PCI Express end points in parallel to achievehigher bandwidth links of x1, x4, x8, and x16, yielding a range of5-80 Gbps of total bandwidth. Recent PCI Express press releasesby the PCI-SIG plan on doubling the clock rate of second generationPCI Express (Gen2) to 5 GHz beginning in 2006. That wouldyield data rates of 10-160 Gbps late next year.In addition to the hardware portion of the specification, PCIExpress is inherently backward compatible with PCI in regardsto operating system and application software. This compatibilityallows the application and driver developer to use the same softwaretools used to develop PCI-based software. This is in contrastto the add-in card change from ISA/EISA to PCI that requirednew tools and operating systems.PCI Express CableThe first architecture to aid in high-end embedded applications isa PCI compatible cable expansion/extension capability based onPCI Express. PCI Express Cable is a standard undertaken by thePCI-SIG to transmit the host PCI Express bus over a high-speedcable. This can be done internalto a system enclosure or externalin a box-to-box type application.Using a cable as shown in Figure1, it is possible to extend thePCI Express bus approximatelysix to seven meters from the hostCPU complex without the needfor active equalization to suppressthe inherent noise.Figure 1This particular cable is a x8 PCI Express external cable fromMolex capable of transmitting 40 Gbps of data plus the PCI-SIGdefined sideband signals.Transmitting the host bus over copper cables opens a new world tothe embedded designer. The PCI Express Cable enables a high-endcomputing core in a cooler area of a machine to host embedded I/Osubsystems in remote, thermally constrained areas of the machine.The host and I/O system can be of different form factors suited tothe location or performance each system requires. For example,a high-end, dual Intel Xeon class host system could provide thecomputing power for an operator interface and a high-speed datalink to a high-end embedded I/O subsystem based on MicroTCA,PC/104, 3U CompactPCI Express, or proprietary form factor.A compelling application of PCI Express Cable includes anexpansion system, a set of products that extends the host busof a system an arbitrary distance from the host enclosure to anexpansion enclosure. This approach enables designers to insertmore add-in boards into the system than the host system wasoriginally designed for. A simple example of an expansion systemis using a host interface board, cable, and 19-slot expansionchassis to extend a 4-slot ATX motherboard host system to a 20-slot system. Expanded systems in excess of 100 add-in boardsare likely possible utilizing PCI Express expansion.PCI Express Cable has a unique advantage over other expansionsystems currently on the market. With PCI Express acting as36 / CompactPCI and AdvancedTCA Systems / June 2005
oth the host bus and the cabled expansion protocol, it does notrequire drivers or conversion from the host bus to the expansionprotocol then back again. This eliminates a root cause of someof the throughput latency of the expansion link. PCI Expressoffers a level of software compatibility and performance scalabilityunparalleled in even the most modern generation of cabledexpansion systems currently on the market.Other embedded applications for the PCI Express Cable arefound across virtually all embedded markets. For examplea high-speed docking station link for a high-end handheld orportable device useful in medical services, inventory controlapplications, or commercial laptops could employ PCI ExpressCable. Another architecture a cabled solution could address isa noncontinuous backplane. This could take the form of severalsmall backplanes in a nonconventional configuration, suchas arranged in a circle or around a corner. In more traditionalapplications, an internal cable can replace the riser card of a 1Userver where the add-in cards are mounted perpendicular to themotherboard.COM ExpressAnother important standard is COM Express, which packs powerfulPCI Express computing cores in small form factors for theembedded systems designer. COM Express is a PICMG effortto standardize PCI Express implementations of Computer-On-Module technology. COM Express standardizes two separateform factors and several different pin-outs, offering a choice toembedded developers.Important features of COM Express include:■ Processor architecture independent■ Support for Gen1 and Gen2 PCI Express with twoimpedance controlled connectors■ 125 mm x 95 mm x 18 mm and 155 mm x 110 mm x 18 mmform factors■ Support for up to 32 lanes of PCI Express in severalconfigurations■ Support for hybrid modules with a combination of PCIExpress/PCI pin-outs■ Support for high-speed serial I/O and legacy parallel I/O■ Up to 160 W power budget per moduleThese modules allow embedded system designers to focus theircore competencies on a carrier card that includes only the customI/O functions required of the application. The designer can thenattach the COM Express computing core module to the carriercard to form a customized embedded single board computer. Theform factor and capability of the module proves useful in designinghigh-end handheld devices, custom shape carrier boards, andcustomized I/O carriers. The computing core of the carrier can beeasily scaled to the application or upgraded with a new plug-inmodule, protecting the design from obsolescence.RSC# 3701 @www.compactpci-systems.com/rscRSC# 3702 @www.compactpci-systems.com/rscCompactPCI and AdvancedTCA Systems / June 2005 / 37
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