An Improved VLSI Test Economics Analysis System - Laboratory for ...

More documents

Recommendations

Info

AnalyzeEngineMsqlServerSystem DataUser DataResult Display Model Editor File ManagerInterface CGIServer SideWeb ServerUser Auth DataInternetCilent SideWeb BroswerModified ModelsAnalyzed ResultsFigure 3.1: Architecture of ESTEEM.There are four programs and three databases in the server. The web server is developed byApache origination. This program handles all data owbetween server and client. Besides, italso check login account and password of each user for security. The Msql server is a databaseengine. This server is proved by Hughes and free for academics. It controls accesses to systemand user databases. Analysis engine is developed by us. This is a Perl program that guresout results from user input data. Details will be discussed in Section 3.4. Interface CGIprogram is consisted of three part: File Manager, Model Editor, and Result Display. CGI isbrief of "common gateway interface". It means that this program can handle informationsof WWW format. Our interface CGI is a complex program that integrated using Perl, Java,and Javascript programming language. We will show details in later section.User Auth Database include information of each user account. It includes login name,password, and user's personal data. System Database stores system default model equationsand parameters. This database can be accessed by any authorized user. In contrast, UserDatabase stores private data of each user. Each user can only access its own private data inthis database.In the client, user needs to run web browser to connect to our web server. We suggest"Netscape" as the browser. In addition, user have to open the promission of executing Javaand Javascript on the browser. After that, user can modify models and obtain results from36
the browser.3.2 Analysis FlowConnectLoginUser AuthDatabaseFile ManagerModel EditorSystemDatabaseAnalysis EngineResult DisplayUserDatabaseNoMeetConstrainYesFinishFigure 3.2: Analysis ow of ESTEEM.Figure 3.2 shows the ow chart of analysis process. The process starts from accessing toour server via web browser. System prompt login account and password for authorization.Then, File Manager is used to select saved projects or create new projects. After selecting,system invokes Model Editor and accesses models of the selected project form database.Test methodologies, equations, and parameters can be modied by Model Editor. Afterthat, Analysis Engine is invoked to calculate results. This results will be sent to ResultDisplay. User can check if prot and defect level meet their constrain. If they do, the jobis nished. Else, the user has to go back to Model Editor for some modication, and re-runAnalysis Engine.37
Page 1 and 2: An Improved VLSI Test Economics Ana
Page 3 and 4: Contents1 Introduction 11.1 Economi
Page 5 and 6: List of Figures2.1 Area relation be
Page 7 and 8: Chapter 1IntroductionFrom business
Page 9 and 10: costs are summed as the total cost.
Page 11 and 12: TEEM)" for VLSI test strategy plann
Page 13 and 14: Chapter 2Economic ModelsIn this cha
Page 15 and 16: 2.2 Circuit DescriptionThis section
Page 17 and 18: Gate Area Ratio (gar): Average gate
Page 19 and 20: (a) (b) (c)Figure 2.1: Area relatio
Page 21 and 22: The proposed economic models consis
Page 23 and 24: However, cost is greatly impacted b
Page 25 and 26: Type II: C = UR f N tThis equation
Page 27 and 28: where K dsgn is user dened design c
Page 29 and 30: where U space is price of the build
Page 31 and 32: Table 2.6: N pass and N v ratio.Bef
Page 33 and 34: is aected by gate count, complexity
Page 35 and 36: FC100%FC100%Phase IPhase IIVV(a)(b)
Page 37 and 38: In our study, we run ATPG for ISCAS
Page 39 and 40: asR dft = 1 2 (TMM grow +2TMM matu
Page 41: Chapter 3System DevelopmentIn our s
Page 45 and 46: (a)(b)Figure 3.4: Model Editor: (a)
Page 47 and 48: If this equation is a function, for
Page 49 and 50: Table 4.1: ISCAS'89 benchmark circu
Page 51 and 52: Table 4.2: Fault coverage parameter
Page 53 and 54: Table 4.3: Fault coverage and test
Page 55 and 56: 4.3 Case StudyIn this section, a re
Page 57 and 58: Table 4.8: Parameters of time model
Page 59 and 60: Table 4.12: Cost of dierent volume.
Page 61 and 62: in Figure 4.4 for 2K volume and Fig
Page 63 and 64: circuits were translated to Verilog
Page 65 and 66: Design space cost for rent building
Page 67 and 68: Revenue with DFT design:R dft = 1 2
Page 69 and 70: 1s298s344Fault Coverage (FC)0.90.80
Page 71 and 72: Fault Coverage (FC)10.90.80.70.60.5
Page 73 and 74: Fault Coverage (FC)10.90.80.70.60.5
Page 75 and 76: 1*s38584.10.90.80.7Fault Coverage (
Page 77 and 78: Kd mp : user-dened man-power cost .
Page 79: [13] R. G. Bennetts, C. M. Maunder,

An Improved VLSI Test Economics Analysis System - Laboratory for ...

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?