MAXQ Core Assembly Guide - Maxim

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MAXQ Core Assembly GuideName Conditions FunctionGRGRLBPGRSGRHGRXLBP[Offs]16-bit General Purpose Register.Low byte of GR.Base portion of the Frame Pointer.Byte-swapped version of GR.High byte of GR.Sign-extended version of the low byte of GR.Frame pointer value – BP + Offs.@BP[Offs]Returns the value stored in memory location BP + Offs.@BP[Offs--]Source only. Returns the value stored in memory location BP + Offs, thendecrements Offs.@BP[++Offs]Destination only. Increments Offs, then writes the source value to memory locationBP + Offs.DP[0] Data Pointer 0.@DP[0]Reads from or writes to memory location at DP[0].@++DP[0]Destination only. Increments DP[0], then writes the source value to the memorylocation at DP[0].@DP[0]++Source only. Returns the value stored in memory location DP[0], then incrementsDP[0].@--DP[0]Destination only. Decements DP[0], then writes the source value to the memorylocation at DP[0].@DP[0]--Source only. Returns the value stored in memory location DP[0], then decrementsDP[0].DP[1] Data Pointer 1.@DP[1]@++DP[1]@DP[1]++@--DP[1]@DP[1]--Reads from or writes to memory location at DP[1].Destination only. Increments DP[1], then writes the source value to the memorylocation at DP[1].Source only. Returns the value stored in memory location DP[1], then incrementsDP[1].Destination only. Decements DP[1], then writes the source value to the memorylocation at DP[1].Source only. Returns the value stored in memory location DP[1], then decrementsDP[1].Version 1.2 12 of 43 March 7, 2007
MAXQ Core Assembly GuideTable 4B. Predefined Registers in MaxQAsm (Q30 Core Only, -w32)Name Conditions FunctionAPAPCNULPSFICSCIPR0IPR1CKCNWDCNA[0]A[1]A[2]A[3]A[4]A[5]A[6]A[7]A[8]A[9]A[10]A[11]A[12]A[13]A[14]A[15]AccA[AP]PFX[n]IPSP@--SP@SP++Accumulator Pointer Register.Accumulator Pointer Control Register.Bit bucket register; reads from this register return zero and writes to this register are ano-op.Processor Status Flags Register.Interrupt Control Register.System Control Register.Interrupt Priority 0 Register.Interrupt Priority 1 Register.System Clock Control Register.Watchdog Control Register.Accumulator 0 – 32 bits wide.Accumulator 1 – 32 bits wide.Accumulator 2 – 32 bits wide.Accumulator 3 – 32 bits wide.Accumulator 4 – 32 bits wide.Accumulator 5 – 32 bits wide.Accumulator 6 – 32 bits wide.Accumulator 7 – 32 bits wide.-acc=16 Accumulator 8 – 32 bits wide.-acc=16 Accumulator 9 – 32 bits wide.-acc=16 Accumulator 10 – 32 bits wide.-acc=16 Accumulator 11 – 32 bits wide.-acc=16 Accumulator 12 – 32 bits wide.-acc=16 Accumulator 13 – 32 bits wide.-acc=16 Accumulator 14 – 32 bits wide.-acc=16 Accumulator 15 – 32 bits wide.Active accumulator.Active accumulator, same as Acc except that auto inc/dec is disabled.n = 0 to 7. Prefix Register.Instruction Pointer.Stack pointer.LC[0] Loop Counter 0.LC[1] Loop Counter 1.OffsDestination only. Predecrements SP and writes the source value to the stack.Source only. Returns the value at the top of the stack and then increments SP.Offset portion of the Frame Pointer.BPBase portion of the Frame Pointer.BP[Offs].BSource only. Pointer value – BP[Offs]. Value is (BP + Offs) for default and byteBP[Offs].Wmode (.B), BP + (Offs x 2) for word mode (.W), and BP + (Offs x 4) for long-wordBP[Offs].Lmode (.L).@BP[Offs].B@BP[Offs].WReturns the value stored in memory location (BP + Offs) for byte mode, (BP + (Offs *@BP[Offs].L2)) for word mode, and (BP + (Offs * 4)) for long mode..@BP[Offs--].B@BP[Offs--].WWrites or returns the value stored in memory location BP[Offs], then decrements Offs.@BP[Offs--].LVersion 1.2 13 of 43 March 7, 2007
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MAXQ Core Assembly Guide - Maxim

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