Scalable RTL in Design and Verification
Scalable RTL in Design and Verification Scalable RTL in Design and Verification
ResultsVerification• Scaling can cause coverage to not be hit• Highlights importance of pairing coverage sequences with designproperties in verification plan• Example below shows a coverage problem in IFV when the FIFOdepth parameter was set less than the number of write portsparameterScalable RTL in Design and Verification 9/17/2007 Page 22
ConclusionsIntroducing RTL Scalability• Combined implementation and verification strategy needed• Learning curve• Robust design• Tool, training, and methodology advancements needed• Appropriate timing of formal analysis application isnecessary• Proceed with cautionScalable RTL in Design and Verification 9/17/2007 Page 23
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- Page 9 and 10: Current & Future DesignsValid1 Pack
- Page 11 and 12: Application of Scalable RTL Strateg
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- Page 17 and 18: ResultsImplementation• 19 logical
- Page 19 and 20: ResultsVerification• More focused
- Page 21: ResultsFormal Analysis• More typi
Results<strong>Verification</strong>• Scal<strong>in</strong>g can cause coverage to not be hit• Highlights importance of pair<strong>in</strong>g coverage sequences with designproperties <strong>in</strong> verification plan• Example below shows a coverage problem <strong>in</strong> IFV when the FIFOdepth parameter was set less than the number of write portsparameter<strong>Scalable</strong> <strong>RTL</strong> <strong>in</strong> <strong>Design</strong> <strong>and</strong> <strong>Verification</strong> 9/17/2007 Page 22
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