A Designer's Guide to Instrumentation Amplifiers, 3rd Edition

A DESIGNER’S GUIDE TOINSTRUMENTATION AMPLIFIERS3 RD EditionbyCharles Kitchin and Lew Counts

All rights reserved. This publication, or parts thereof, may not bereproduced in any form without permission of the copyright owner.Information furnished by Analog Devices, Inc. is believed to beaccurate and reliable. However, no responsibility is assumed byAnalog Devices, Inc. for its use.Analog Devices, Inc. makes no representation that the interconnectionof its circuits as described herein will not infringe on existing orfuture patent rights, nor do the descriptions contained herein implythe granting of licenses to make, use, or sell equipment constructedin accordance therewith.Specifications and prices are subject to change without notice.©2006 Analog Devices, Inc. Printed in the U.S.A.G02678-15-9/06(B)ii

Gain Adjustment ...................................................................................................................................4-6High Frequency Differential Receiver/Amplifiers .....................................................................................4-9CHAPTER V—APPLYING IN-AMPS EFFECTIVELY ........................................................................5-1Dual-Supply Operation ..........................................................................................................................5-1Single-Supply Operation ........................................................................................................................ 5-1The Need for True R-R Devices in Low Voltage, Single-Supply IA Circuits ..............................................5-1Power Supply Bypassing, Decoupling, and Stability Issues .......................................................................5-1THE IMPORTANCE OF AN INPUT GROUND RETURN .....................................................................5-2Providing Adequate Input and Output Swing (“Headroom”) When AC Coupling aSingle-Supply In-Amp ........................................................................................................................5-3Selecting and Matching RC Coupling Components ................................................................................5-3Properly Driving an In-Amp’s Reference Input .......................................................................................5-4Cable Termination ..........................................................................................................................5-5Input Protection Basics For ADI In-Amps ..............................................................................5-5Input Protection from ESD and DC Overload ........................................................................................5-5Adding External Protection Diodes ........................................................................................................5-8ESD and Transient Overload Protection .................................................................................................5-9Design Issues Affecting DC Accuracy ...................................................................................5-9Designing for the Lowest Possible Offset Voltage Drift .............................................................................5-9Designing for the Lowest Possible Gain Drift ..........................................................................................5-9Practical Solutions ............................................................................................................................... 5-11Option 1: Use a Better Quality Gain Resistor ............................................................................................ 5-11Option 2: Use a Fixed-Gain In-Amp ........................................................................................................ 5-11RTI AND RTO ERRORS ........................................................................................................................ 5-11Offset Error .......................................................................................................................................... 5-12Noise Errors .......................................................................................................................................... 5-12Reducing RFI Rectification Errors in In-Amp Circuits ................................................ 5-12Designing Practical RFI Filters ............................................................................................................ 5-12Selecting RFI Input Filter Component Values Using a Cookbook Approach ........................................... 5-14Specific Design Examples .................................................................................................................... 5-15An RFI Circuit for AD620 Series In-Amps ............................................................................................... 5-15An RFI Circuit for Micropower In-Amps .................................................................................................. 5-15An RFI Filter for the AD623 In-Amp ...................................................................................................... 5-16AD8225 RFI Filter Circuit ..................................................................................................................... 5-16An RFI Filter For The AD8555 Sensor Amplifier .................................................................. 5-17In-Amps with On-Chip EMI/RFI Filtering ........................................................................................... 5-17Common-Mode Filters Using X2Y Capacitors ..................................................................................... 5-19Using Common-Mode RF Chokes for In-Amp RFI Filters ........................................................................... 5-20RFI TESTING ....................................................................................................................................... 5-21USING LOW-PASS FILTERING TO IMPROVE SIGNAL-TO-NOISE RATIO ...................................... 5-21EXTERNAL CMR AND SETTLING TIME ADJUSTMENTS .............................................................. 5-23CHAPTER VI—IN-AMP AND DIFF AMP APPLICATIONS CIRCUITS ...........................................6-1A True Differential Output In-Amp Circuit ............................................................................................6-1DIFFERENCE AMPLIFIER MEASURES HIGH VOLTAGES .................................................................6-1Precision Current Source .......................................................................................................................6-3Integrator for PID Loop .........................................................................................................................6-3Composite In-Amp Circuit Has Excellent High Frequency CMR ............................................................6-3Strain Gage Measurement Using An AC Excitation ......................................................... 6-5Applications of the AD628 Precision Gain Block ...............................................................6-6Why Use a Gain Block IC? .....................................................................................................................6-6Standard Differential Input ADC Buffer Circuit with Single-Pole LP Filter ..............................................6-6Changing the Output Scale Factor .........................................................................................................6-7iv

Using an External Resistor to Operate the AD628 at Gains Below 0.1 .....................................................6-7Differential Input Circuit with 2-Pole Low-Pass Filtering ........................................................................6-8Using the AD628 to Create Precision Gain Blocks ..................................................................................6-9Operating the AD628 as a +10 or –10 Precision Gain Block ....................................................................6-9Operating the AD628 at a Precision Gain of +11 .................................................................................. 6-10Operating the AD628 at a Precision Gain of +1 .................................................................................... 6-10Increased BW Gain Block of –9.91 Using Feedforward ......................................................................... 6-11CURRENT TRANSMITTER REJECTS GROUND NOISE ................................................................... 6-12High Level ADC Interface .......................................................................................................... 6-13A High Speed noninverting Summing Amplifier .............................................................. 6-15High Voltage Monitor ................................................................................................................ 6-16PRECISION 48 V BUS MONITOR ........................................................................................................ 6-17HIGH-SIDE CURRENT SENSE WITH A LOW-SIDE SWITCH ........................................................... 6-18HIGH-SIDE CURRENT SENSE WITH A HIGH-SIDE SWITCH ......................................................... 6-19Motor Control ..................................................................................................................................... 6-19BRIDGE APPLICATIONS ..................................................................................................................... 6-19A Classic Bridge Circuit ....................................................................................................................... 6-19A Single-Supply Data Acquisition System ............................................................................................. 6-20A Low Dropout Bipolar Bridge Driver .................................................................................................. 6-20TRANSDUCER INTERFACE APPLICATIONS .................................................................................... 6-21ELECTROCARDIOGRAM SIGNAL CONDITIONING ....................................................................... 6-21REMOTE LOAD-SENSING TECHNIQUE ........................................................................................... 6-24A PRECISION VOLTAGE-TO-CURRENT CONVERTER .................................................................... 6-24A CURRENT SENSOR INTERFACE .................................................................................................... 6-24OUTPUT BUFFERING, LOW POWER IN-AMPS ................................................................................ 6-25A 4 TO 20 mA SINGLE-SUPPLY RECEIVER ....................................................................................... 6-26A SINGLE-SUPPLY THERMOCOUPLE AMPLIFIER .......................................................................... 6-26SPECIALTY PRODUCTS ...................................................................................................................... 6-26Chapter vii—matching in-amp circuits to modern adcs ..........................................7-1Calculating ADC Requirements ............................................................................................................. 7-1Matching ADI In-Amps with Some Popular ADCs .................................................................................7-2High Speed Data Acquisition ................................................................................................................. 7-7A High Speed In-Amp Circuit for Data Acquisition ................................................................................7-8APPENDIX A—INSTRUMENTATION AMPLIFIER SPECIFICATIONS ......................................... A-1(A) Specifications (Conditions) ............................................................................................................. A-3(B) Common-Mode Rejection .............................................................................................................. A-3(C) AC Common-Mode Rejection ........................................................................................................ A-3(D) Voltage Offset ................................................................................................................................ A-3(E) Input Bias and Offset Currents ....................................................................................................... A-4(F) Operating Voltage Range ................................................................................................................. A-4(G) Quiescent Supply Current .............................................................................................................. A-4(H) Settling Time ................................................................................................................................. A-5(I) Gain .............................................................................................................................................. A-5(J) Gain Range .................................................................................................................................... A-5(K) Gain Error ..................................................................................................................................... A-5(L) Nonlinearity .................................................................................................................................. A-6(M) Gain vs. Temperature ...................................................................................................................... A-6(N) Key Specifications for Single-Supply In-Amps ................................................................................. A-6Input and Output Voltage Swing ............................................................................................................... A-6APPENDIX B—AMPLIFIERS SELECTION TABLE ......................................................................... B-1INDEX .................................................................................................................................................... C-1DEVICE INDEX ....................................................................................................................................D-1

BIBLIOGRAPHY/FURTHER READINGBrokaw, Paul. “An IC Amplifier Users’ Guide to Decoupling, Grounding, and Making Things Go Right for aChange.” Application Note AN-202, Rev. B. Analog Devices, Inc. 2000.Jung, Walter. IC Op Amp Cookbook. 3rd ed. Prentice-Hall PTR. 1986. 1997. ISBN: 0-13-889601-1.This can also be purchased on the Web at http://dogbert.abebooks.com.Jung, Walter. Op Amp Applications Handbook. Elsevier/Newnes. 2006.Jung, Walter. Op Amp Applications. Analog Devices. 2002. These seminar notes are an early version of theOp Amp Applications Handbook. You can download this (Free) on the Web at: http://www.analog.com/library/analogdialogue/archives/39-05/op_amp_applications_handbook.html.Kester, Walt. The Data Conversion Handbook. Elsevier/Newnes. 2005. ISBN: 0-7506-7841-0.Kester, Walt. Mixed-Signal and DSP Design Techniques. Elsevier/Newnes. 2003. ISBN: 0-7506-7611-6.Kester, Walt. Practical Design Techniques for Sensor Signal Conditioning. Analog Devices, Inc. 1999. Section 10.ISBN-0-916550-20-6. Available for download on the ADI website at www.analog.com.Moghimi, Reza. “Bridge-Type Sensor Measurements Are Enhanced by Auto-Zeroed InstrumentationAmplifiers with Digitally Programmable Gain and Offset.” Analog Dialogue. May 3, 2004. http://www.analog.com/library/analogdialogue/archives/38-05/AD8555.html.Nash, Eamon. “Errors and Error Budget Analysis in Instrumentation Amplifier Applications.” ApplicationNote AN-539. Analog Devices, Inc.Nash, Eamon. “A Practical Review of Common-Mode and Instrumentation Amplifiers.” Sensors Magazine.July 1998.Sheingold, Dan, ed. Transducer Interface Handbook. Analog Devices, Inc. 1980. pp. 28-30.Wurcer, Scott and Walter Jung. “Instrumentation Amplifiers Solve Unusual Design Problems.” ApplicationNote AN-245. Applications Reference Manual. Analog Devices, Inc.ACKNOWLEDGMENTSWe gratefully acknowledge the support and assistance of the following: Moshe Gerstenhaber, ScottWurcer, Stephen Lee, Bright Gao, Scott Pavlik, Henri Sino, Alasdair Alexander, Chau Tran, AndrewTang, Tom Botker, Jim Bundock, Sam Weinstein, Chuck Whiting, Matt Duff, Eamon Nash, Walt Kester,Alain Guery, Chris Augusta, Claire Croke, Nicola O’Byrne, James Staley, Ben Doubts, Padraig Cooney,Leslie Vaughan, Edie Kramer, and Lynne Hulme of Analog Devices. Also to David Anthony of X2YTechnology and Steven Weir of Weir Design Engineering, for the detailed applications information onapplying X2Y products for RFI suppression.And finally, a special thank you to Analog Devices’ Communications Services team, including John Galgay,Alex Wong, Terry Gildred, Kirsten Dickerson, and Kelley Moretta.All brand or product names mentioned are trademarks or registered trademarks of their respective owners.Purchase of licensed I 2 C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the PhilipsI 2 C Patent Rights to use these components in an I 2 C system, provided that the system conforms to the I 2 C Standard Specification as defined by Philips.vi

Chapter IIN-AMP BASICSIntroductionInstrumentation amplifiers (in-amps) are sometimesmisunderstood. Not all amplifiers used in instrumentationapplications are instrumentation amplifiers, and byno means are all in-amps used only in instrumentationapplications. In-amps are used in many applications,from motor control to data acquisition to automotive.The intent of this guide is to explain the fundamentalsof what an instrumentation amplifier is, how it operates,and how and where to use it. In addition, several differentcategories of instrumentation amplifiers areaddressed in this guide.IN-AMPS vs. OP AMPS: WHAT ARE THEDIFFERENCES?An instrumentation amplifier is a closed-loop gainblock that has a differential input and an output thatis single-ended with respect to a reference terminal.Most commonly, the impedances of the two inputterminals are balanced and have high values, typically10 9 , or greater. The input bias currents should alsobe low, typically 1 nA to 50 nA. As with op amps, outputimpedance is very low, nominally only a few milliohms,at low frequencies.Unlike an op amp, for which closed-loop gain is determinedby external resistors connected between itsinverting input and its output, an in-amp employs aninternal feedback resistor network that is isolated from itssignal input terminals. With the input signal applied acrossthe two differential inputs, gain is either preset internallyor is user set (via pins) by an internal or external gainresistor, which is also isolated from the signal inputs.Figure 1-1 shows a bridge preamp circuit, a typical in-ampapplication. When sensing a signal, the bridge resistor valueschange, unbalancing the bridge and causing a change indifferential voltage across the bridge. The signal outputof the bridge is this differential voltage, which connectsdirectly to the in-amp’s inputs. In addition, a constant dcvoltage is also present on both lines. This dc voltage willnormally be equal or common mode on both input lines. Inits primary function, the in-amp will normally reject thecommon-mode dc voltage, or any other voltage commonto both lines, while amplifying the differential signal voltage,the difference in voltage between the two lines.1-1BRIDGE SUPPLYVOLTAGER G0.01F123++V S8AD8221–4 50.01F–V S0.33F6REF0.33F7V OUTFigure 1-1. AD8221 bridge circuit.In contrast, if a standard op amp amplifier circuit wereused in this application, it would simply amplify both thesignal voltage and any dc, noise, or other common-modevoltages. As a result, the signal would remain buried underthe dc offset and noise. Because of this, even the bestop amps are far less effective in extracting weak signals.Figure 1-2 contrasts the differences between op amp andin-amp input characteristics.Signal Amplification and Common-Mode RejectionAn instrumentation amplifier is a device that amplifiesthe difference between two input signal voltages whilerejecting any signals that are common to both inputs. Thein-amp, therefore, provides the very important functionof extracting small signals from transducers and othersignal sources.Common-mode rejection (CMR), the property ofcanceling out any signals that are common (the samepotential on both inputs), while amplifying any signalsthat are differential (a potential difference between theinputs), is the most important function an instrumentationamplifier provides. Both dc and ac common-moderejection are important in-amp specifications. Any errorsdue to dc common-mode voltage (i.e., dc voltage presentat both inputs) will be reduced 80 dB to 120 dB by anymodern in-amp of decent quality.However, inadequate ac CMR causes a large, timevaryingerror that often changes greatly with frequencyand, therefore, is difficult to remove at the IA’s output.Fortunately, most modern monolithic IC in-amps provideexcellent ac and dc common-mode rejection.

Common-mode gain (A CM ), the ratio of change inoutput voltage to change in common-mode input voltage,is related to common-mode rejection. It is the netgain (or attenuation) from input to output for voltagescommon to both inputs. For example, an in-amp witha common-mode gain of 1/1000 and a 10 V commonmodevoltage at its inputs will exhibit a 10 mV outputchange. The differential or normal mode gain (A D ) isthe gain between input and output for voltages applieddifferentially (or across) the two inputs. The commonmoderejection ratio (CMRR) is simply the ratio ofthe differential gain, A D , to the common-mode gain.Note that in an ideal in-amp, CMRR will increase inproportion to gain.Common-mode rejection is usually specified for fullrange common-mode voltage (CMV) change at a givenfrequency and a specified imbalance of source impedance(e.g., 1 k source imbalance, at 60 Hz).Mathematically, common-mode rejection can be representedas⎛ V ⎞CMCMRR = AD⎜⎝ V⎟OUT ⎠where:A D is the differential gain of the amplifier;V CM is the common-mode voltage present at theamplifier inputs;V OUT is the output voltage present when a common-modeinput signal is applied to the amplifier.The term CMR is a logarithmic expression of thecommon-mode rejection ratio (CMRR). That is, CMR =20 log 10 CMRR.To be effective, an in-amp needs to be able to amplifymicrovolt-level signals while rejecting common-modevoltage at its inputs. It is particularly important for thein-amp to be able to reject common-mode signals over thebandwidth of interest. This requires that instrumentationamplifiers have very high common-mode rejectionover the main frequency of interest and its harmonics.THE VERY HIGH VALUE, CLOSELY MATCHED INPUTRESISTANCES CHARACTERISTIC OF IN-AMPSMAKE THEM IDEAL FOR MEASURING LOWLEVEL VOLTAGES AND CURRENTS—WITHOUTLOADING DOWN THE SIGNAL SOURCE.REFERENCEVOLTAGER1R3IN-LINE CURRENT MEASUREMENTIVRR–R+IN-AMPOUTPUTREFERENCER2VOLTAGEMEASUREMENTFROM A BRIDGER4R–R+IN-AMPOUTPUTREFERENCEIN-AMP INPUT CHARACTERISTICSTHE INPUT RESISTANCE OF A TYPICAL IN-AMPIS VERY HIGH AND IS EQUAL ON BOTH INPUTS.CREATES A NEGLIGIBLE ERROR VOLTAGE.R– = R+ = 10 9 TO 10 12R IN = R1 ( 1k TO 1M )GAIN = R2/R1R IN = R+ (10 6 TO 10 12 )GAIN = 1 + (R2/R1)R1R–R+R2TYPICALOP AMPA MODEL SHOWING THE INPUT RESISTANCE OF ATYPICAL OP AMP OPERATING AS AN INVERTINGAMPLIFIER—AS SEEN BY THE INPUT SOURCEOUTPUTR–R+TYPICALOP AMPOUTPUTA MODEL SHOWING THE INPUTRESISTANCE OF A TYPICAL OP AMPIN THE OPEN-LOOP CONDITION(R–) = (R+) = 10 6 TO 10 15OP AMP INPUT CHARACTERISTICSFigure 1-2. Op amp vs. in-amp input characteristics.1-2

For techniques on reducing errors due to out-of-bandsignals that may appear as a dc output offset, please referto the RFI section of this guide.At unity gain, typical dc values of CMR are 70 dB to morethan 100 dB, with CMR usually improving at higher gains.While it is true that operational amplifiers connected assubtractors also provide common-mode rejection, theuser must provide closely matched external resistors(to provide adequate CMRR). On the other hand,monolithic in-amps, with their pretrimmed resistornetworks, are far easier to apply.Common-Mode Rejection: Op Amp vs. In-AmpOp amps, in-amps, and difference amps all providecommon-mode rejection. However, in-amps and diffamps are designed to reject common-mode signals sothat they do not appear at the amplifier’s output. Incontrast, an op amp operated in the typical invertingor noninverting amplifier configuration will processcommon-mode signals, passing them through to theoutput, but will not normally reject them.Figure 1-3a shows an op amp connected to an inputsource that is riding on a common-mode voltage. Becauseof feedback applied externally between the output andthe summing junction, the voltage on the “–” input isforced to be the same as that on the “+” input voltage.Therefore, the op amp ideally will have zero volts acrossits input terminals. As a result, the voltage at the op ampoutput must equal V CM , for zero volts differential input.Even though the op amp has common-mode rejection, thecommon-mode voltage is transferred to the output alongwith the signal. In practice, the signal is amplified by theop amp’s closed-loop gain, while the common-modevoltage receives only unity gain. This difference in gaindoes provide some reduction in common-mode voltageas a percentage of signal voltage. However, the commonmodevoltage still appears at the output, and its presencereduces the amplifier’s available output swing. For manyreasons, any common-mode signal (dc or ac) appearingat the op amp’s output is highly undesirable.V OUT = (V IN GAIN) V CMGAIN = R2/R1CM GAIN = 1 V– = V CMR1V CMV IN ZERO VR2V OUTV+ = V CMV CMFigure 1-3a. In a typical inverting or noninverting amplifier circuit using an op amp,both the signal voltage and the common-mode voltage appear at the amplifier output.1-3

Figure 1-3b shows a 3-op amp in-amp operating underthe same conditions. Note that, just like the op ampcircuit, the input buffer amplifiers of the in-amp pass thecommon-mode signal through at unity gain. In contrast,the signal is amplified by both buffers. The output signalsfrom the two buffers connect to the subtractor section ofthe IA. Here the differential signal is amplified (typicallyat low gain or unity) while the common-mode voltage isattenuated (typically by 10,000:1 or more). Contrastingthe two circuits, both provide signal amplification (andbuffering), but because of its subtractor section, the inamprejects the common-mode voltage.Figure 1-3c is an in-amp bridge circuit. The in-ampeffectively rejects the dc common-mode voltageappearing at the two bridge outputs while amplifyingthe very weak bridge signal voltage. In addition, manymodern in-amps provide a common-mode rejection approaching80 dB, which allows powering of the bridgefrom an inexpensive, nonregulated dc power supply. Incontrast, a self constructed in-amp, using op amps and0.1% resistors, typically only achieves 48 dB CMR, thusrequiring a regulated dc supply for bridge power.BUFFERV CMV OUT = V IN (GAIN)V CMSUBTRACTORV CMV INR GV IN TIMESGAINV CM = 0V OUTV CMBUFFERV CM3-OP AMPIN-AMPFigure 1-3b. As with the op amp circuit above, the input buffers of an in-amp circuitamplify the signal voltage while the common-mode voltage receives unity gain. However,the common-mode voltage is then rejected by the in-amp’s subtractor section.V SUPPLYBRIDGESENSORV CMV IN IN-AMPV CMV OUTINTERNAL OR EXTERNALGAIN RESISTORFigure 1-3c. An in-amp used in a bridge circuit. Here the dc common-modevoltage can easily be a large percentage of the supply voltage.1-4

Figure 1-3d shows a difference (subtractor) amplifierbeing used to monitor the voltage of an individual cellthat is part of a battery bank. Here the common-modedc voltage can easily be much higher than the amplifier’ssupply voltage. Some monolithic difference amplifiers,such as the AD629, can operate with common-modevoltages as high as 270 V.Difference AmplifiersFigure 1-4 is a block diagram of a difference amplifier.This type of IC is a special-purpose in-amp that normallyconsists of a subtractor amplifier followed by an outputbuffer, which may also be a gain stage. The four resistorsused in the subtractor are normally internal to the IC,and, therefore, are closely matched for high CMR.Many difference amplifiers are designed to be used inapplications where the common-mode and signal voltagesmay easily exceed the supply voltage. These diff ampstypically use very high value input resistors to attenuateboth signal and common-mode input voltages.WHERE are in-amps and Differenceamps used?Data AcquisitionIn-amps find their primary use amplifying signals fromlow level output transducers in noisy environments. Theamplification of pressure or temperature transducersignals is a common in-amp application. Common bridgeapplications include strain and weight measurement usingload cells and temperature measurement using resistivetemperature detectors, or RTDs.DIFFERENCE AMPLIFIERV CM380k380kV IN380kV OUTV CM380kFigure 1-3d. A difference amp is especially useful in applications such as batterycell measurement, where the dc (or ac) common-mode voltage may be greaterthan the supply voltage.+15V 0.1FDIFFERENTIALINPUTSIGNALV IN81100k100k10k–INA1+INC10.1F10k4C FILTER+INA2AD6287+V SV OUTV OUT TO ADC510k–INV CM–V S20.1F–15VV REF R G3 6R GR FC2Figure 1-4. A difference amplifier IC.1-5

Medical InstrumentationIn-amps are widely used in medical equipment such asEKG and EEG monitors, blood pressure monitors, anddefibrillators.Monitor and Control ElectronicsDiff amps may be used to monitor voltage or current ina system and then trigger alarm systems when nominaloperating levels are exceeded. Because of their ability toreject high common-mode voltages, diff amps are oftenused in these applications.Software-Programmable ApplicationsAn in-amp may be used with a software-programmableresistor chip to allow software control of hardwaresystems.Audio ApplicationsBecause of their high common-mode rejection,instrumentation amplifiers are sometimes used for audioapplications (as microphone preamps, for example), toextract a weak signal from a noisy environment, and tominimize offsets and noise due to ground loops. Referto Table 6-4 (page 6-26), Specialty Products Availablefrom Analog Devices.High Speed Signal ConditioningBecause the speed and accuracy of modern video dataacquisition systems have improved, there is now agrowing need for high bandwidth instrumentation amplifiers,particularly in the field of CCD imaging equipmentwhere offset correction and input buffering are required.Double-correlated sampling techniques are often usedin this area for offset correction of the CCD image. Twosample-and-hold amplifiers monitor the pixel and referencelevels, and a dc-corrected output is provided by feedingtheir signals into an instrumentation amplifier.Video ApplicationsHigh speed in-amps may be used in many video and cableRF systems to amplify or process high frequency signals.Power Control ApplicationsIn-amps can also be used for motor monitoring (tomonitor and control motor speed, torque, etc.) by measuringthe voltages, currents, and phase relationshipsof a 3-phase ac-phase motor. Diff amps are used inapplications where the input signal exceeds thesupply voltages.IN-AMPS: AN EXTERNAL VIEWFigure 1-5 provides a functional block diagram of aninstrumentation amplifier. Figure 1-5. Differential vs. common-mode input signals. 1-6

Since an ideal instrumentation amplifier detects only thedifference in voltage between its inputs, any commonmodesignals (equal potentials for both inputs), such asnoise or voltage drops in ground lines, are rejected at theinput stage without being amplified.Either internal or external resistors may be used to setthe gain. Internal resistors are the most accurate andprovide the lowest gain drift over temperature.One common approach is to use a single external resistor,working with two internal resistors, to set the gain. Theuser can calculate the required value of resistance for agiven gain, using the gain equation listed in the in-amp’sspec sheet. This permits gain to be set anywhere within avery large range. However, the external resistor can seldombe exactly the correct value for the desired gain, and itwill always be at a slightly different temperature than theIC’s internal resistors. These practical limitations alwayscontribute additional gain error and gain drift.Sometimes two external resistors are employed. In general,a 2-resistor solution will have lower drift than a singleresistor as the ratio of the two resistors sets the gain, andthese resistors can be within a single IC array for closematching and very similar temperature coefficients (TC).Conversely, a single external resistor will always be a TCmismatch for an on-chip resistor.The output of an instrumentation amplifier often hasits own reference terminal, which, among other uses,allows the in-amp to drive a load that may be at adistant location.Figure 1-5 shows the input and output commons beingreturned to the same potential, in this case to powersupply ground. This star ground connection is a very effectivemeans of minimizing ground loops in the circuit;however, some residual common-mode ground currentswill still remain. These currents flowing through R CMwill develop a common-mode voltage error, V CM . Thein-amp, by virtue of its high common-mode rejection,will amplify the differential signal while rejecting V CMand any common-mode noise.Of course, power must be supplied to the in-amp. Aswith op amps, the power would normally be providedby a dual-supply voltage that operates the in-amp overa specified range. Alternatively, an in-amp specified forsingle-supply (rail-to-rail) operation may be used.An instrumentation amplifier may be assembled using oneor more operational amplifiers, or it may be of monolithicconstruction. Both technologies have their advantagesand limitations.In general, discrete (op amp) in-amps offer design flexibilityat low cost and can sometimes provide performanceunattainable with monolithic designs, such as very highbandwidth. In contrast, monolithic designs providecomplete in-amp functionality and are fully specifiedand usually factory trimmed, often to higher dc precisionthan discrete designs. Monolithic in-amps are also muchsmaller, lower in cost, and easier to apply.WHAT OTHER PROPERTIES DEFINE A HIGHQUALITY IN-AMP?Possessing a high common-mode rejection ratio, aninstrumentation amplifier requires the propertiesdescribed below.High AC (and DC) Common-Mode RejectionAt a minimum, an in-amp’s CMR should be high overthe range of input frequencies that need to be rejected.This includes high CMR at power line frequencies andat the second harmonic of the power line frequency.Low Offset Voltage and Offset Voltage DriftAs with an operational amplifier, an in-amp must havelow offset voltage. Since an instrumentation amplifierconsists of two independent sections, an input stage andan output amplifier, total output offset will equal the sumof the gain times the input offset plus the offset of theoutput amplifier (within the in-amp). Typical values forinput and output offset drift are 1 V/C and 10 V/C,respectively. Although the initial offset voltage may benulled with external trimming, offset voltage drift cannotbe adjusted out. As with initial offset, offset drift has twocomponents, with the input and output section of thein-amp each contributing its portion of error to the total.As gain is increased, the offset drift of the input stagebecomes the dominant source of offset error.1-7

A Matched, High Input ImpedanceThe impedances of the inverting and noninverting inputterminals of an in-amp must be high and closely matchedto one another. High input impedance is necessary toavoid loading down the input signal source, which couldalso lower the input signal voltage.Values of input impedance from 10 9 to 10 12 aretypical. Difference amplifiers, such as the AD629, havelower input impedances, but can be very effective in highcommon-mode voltage applications.Low Input Bias and Offset Current ErrorsAgain, as with an op amp, an instrumentation amplifierhas bias currents that flow into, or out of, its inputterminals; bipolar in-amps have base currents and FETamplifiers have gate leakage currents. This bias currentflowing through an imbalance in the signal sourceresistance will create an offset error. Note that if theinput source resistance becomes infinite, as with ac(capacitive) input coupling, without a resistive returnto power supply ground, the input common-modevoltage will climb until the amplifier saturates. A highvalue resistor connected between each input and groundis normally used to prevent this problem. Typically, theinput bias current multiplied by the resistor’s value inohms should be less than 10 mV (see Chapter V). Inputoffset current errors are defined as the mismatch betweenthe bias currents flowing into the two inputs. Typicalvalues of input bias current for a bipolar in-amp rangefrom 1 nA to 50 nA; for a FET input device, values of1 pA to 50 pA are typical at room temperature.Low NoiseBecause it must be able to handle very low level inputvoltages, an in-amp must not add its own noise to that ofthe signal. A minimum input noise level of 10 nV/√Hz @1 kHz (gain > 100) referred to input (RTI) is desirable.Micropower in-amps are optimized for the lowest possibleinput stage current and, therefore, typically have highernoise levels than their higher current cousins.Low NonlinearityInput offset and scale factor errors can be corrected byexternal trimming, but nonlinearity is an inherent performancelimitation of the device and cannot be removed byexternal adjustment. Low nonlinearity must be designedin by the manufacturer. Nonlinearity is normally specifiedas a percentage of full scale, whereas the manufacturermeasures the in-amp’s error at the plus and minus fullscalevoltage and at zero. A nonlinearity error of 0.01%is typical for a high quality in-amp; some devices havelevels as low as 0.0001%.Simple Gain SelectionGain selection should be easy. The use of a singleexternal gain resistor is common, but an external resistorwill affect the circuit’s accuracy and gain drift withtemperature. In-amps, such as the AD621, provide achoice of internally preset gains that are pin-selectable,with very low gain TC.Adequate BandwidthAn instrumentation amplifier must provide bandwidthsufficient for the particular application. Since typical unitygain,small-signal bandwidths fall between 500 kHz and4 MHz, performance at low gains is easily achieved, but athigher gains bandwidth becomes much more of an issue.Micropower in-amps typically have lower bandwidth thancomparable standard in-amps, as micropower input stagesare operated at much lower current levels.1-8

Differential to Single-Ended ConversionDifferential to single-ended conversion is, of course, anintegral part of an in-amp’s function: A differential inputvoltage is amplified and a buffered, single-ended outputvoltage is provided. There are many in-amp applicationsthat require amplifying a differential voltage that is ridingon top of a much larger common-mode voltage. Thiscommon-mode voltage may be noise, or ADC offset,or both. The use of an op amp rather than an in-ampwould simply amplify both the common mode and thesignal by equal amounts. The great benefit provided byan in-amp is that it selectively amplifies the (differential)signal while rejecting the common-mode signal.Rail-to-Rail Input and Output SwingModern in-amps often need to operate on single-supplyvoltages of 5 V or less. In many of these applications, arail-to-rail input ADC is often used. So-called rail-to-railoperation means that an amplifier’s maximum input oroutput swing is essentially equal to the power supplyvoltage. In fact, the input swing can sometimes exceedthe supply voltage slightly, while the output swing is oftenwithin 100 mV of the supply voltage or ground. Carefulattention to the data sheet specifications is advised.Power vs. Bandwidth, Slew Rate, and NoiseAs a general rule, the higher the operating current ofthe in-amp’s input section, the greater the bandwidthand slew rate and the lower the noise. But higher operatingcurrent means higher power dissipation and heat. Batteryoperatedequipment needs to use low power devices,and densely packed printed circuit boards must beable to dissipate the collective heat of all their activecomponents. Device heating also increases offset driftand other temperature-related errors. IC designersoften must trade off some specifications to keep powerdissipation and drift to acceptable levels.1-9

Chapter IIINSIDE AN INSTRUMENTATION AMPLIFIERA Simple Op Amp Subtractor Provides anIn-Amp FunctionThe simplest (but still very useful) method of implementinga differential gain block is shown in Figure 2-1. Figure 2-1. A 1-op amp in-amp differenceamplifier circuit functional block diagram.If R1 = R3 and R2 = R4, then( )( )V = V − V R2 R1OUT IN2 IN1Although this circuit provides an in-amp function, amplifyingdifferential signals while rejecting those that arecommon mode, it also has some limitations. First, theimpedances of the inverting and noninverting inputs arerelatively low and unequal. In this example, the input impedanceto V IN1 equals 100 k, while the impedance ofV IN2 is twice that, at 200 k. Therefore, when voltage isapplied to one input while grounding the other, differentcurrents will flow depending on which input receivesthe applied voltage. (This unbalance in the sources’resistances will degrade the circuit’s CMRR.)Furthermore, this circuit requires a very close ratio matchbetween resistor pairs R1/R2 and R3/R4; otherwise, thegain from each input would be different—directly affectingcommon-mode rejection. For example, at a gain of1, with all resistors of equal value, a 0.1% mismatch injust one of the resistors will degrade the CMR to a levelof 66 dB (1 part in 2000). Similarly, a source resistanceimbalance of 100 will degrade CMR by 6 dB.In spite of these problems, this type of bare bones in-ampcircuit, often called a difference amplifier or subtractor,is useful as a building block within higher performancein-amps. It is also very practical as a standalone functionalcircuit in video and other high speed uses, or inlow frequency, high common-mode voltage (CMV)applications, where the input resistors divide down theinput voltage as well as provide input protection for theamplifier. Some monolithic difference amplifiers suchas Analog Devices’ AD629 employ a variation of thesimple subtractor in their design. This allows the IC tohandle common-mode input voltages higher than itsown supply voltage. For example, when powered froma 15 V supply, the AD629 can amplify signals withcommon-mode voltages as high as 270 V.Improving the Simple Subtractor withInput BufferingAn obvious way to significantly improve performance isto add high input impedance buffer amplifiers ahead ofthe simple subtractor circuit, as shown in the 3-op ampinstrumentation amplifier circuit of Figure 2-2. Figure 2-2. A subtractor circuit with input buffering.2-1

This circuit provides matched, high impedance inputsso that the impedances of the input sources will have aminimal effect on the circuit’s common-mode rejection.The use of a dual op amp for the 2-input buffer amplifiersis preferred because they will better track each otherover temperature and save board space. Although theresistance values are different, this circuit has the sametransfer function as the circuit of Figure 2-1.Figure 2-3 shows further improvement: Now the inputbuffers are operating with gain, which provides a circuitwith more flexibility. If the value of R5 = R8 and R6 =R7 and, as before, R1 = R3 and R2 = R4, thenV OUT = (V IN2 – V IN1 ) (1 + R5/R6) (R2/R1)While the circuit of Figure 2-3 does increase the gain (ofA 1 and A 2 ) equally for differential signals, it also increasesthe gain for common-mode signals.The 3-Op Amp In-AmpThe circuit of Figure 2-4 provides further refinementand has become the most popular configuration forinstrumentation amplifier design. The classic 3-op ampin-amp circuit is a clever modification of the bufferedsubtractor circuit of Figure 2-3. As with the previouscircuit, op amps A1 and A2 of Figure 2-4 buffer theinput voltage. However, in this configuration, a singlegain resistor, R G , is connected between the summingjunctions of the two input buffers, replacing R6 andR7. The full differential input voltage will now appearacross R G (because the voltage at the summing junctionof each amplifier is equal to the voltage applied to itspositive input). Since the amplified input voltage (at theoutputs of A1 and A2) appears differentially across thethree resistors, R5, R G , and R6, the differential gain maybe varied by just changing R G . Figure 2-3. A buffered subtractor circuit with buffer amplifiers operating with gain. Figure 2-4. The classic 3-op amp in-amp circuit.2-2

There is another advantage of this connection: Once thesubtractor circuit has been set up with its ratio-matchedresistors, no further resistor matching is required whenchanging gains. If the value of R5 = R6, R1 = R3, andR2 = R4, thenV OUT = (V IN2 – V IN1 ) (1 + 2R5/R G )(R2/R1)Since the voltage across R G equals V IN , the currentthrough R G will equal (V IN /R G ). Amplifiers A1 and A2,therefore, will operate with gain and amplify the inputsignal. Note, however, that if a common-mode voltageis applied to the amplifier inputs, the voltages on eachside of R G will be equal, and no current will flow throughthis resistor. Since no current flows through R G (nor,therefore, through R5 and R6), amplifiers A1 and A2will operate as unity-gain followers. Therefore, commonmodesignals will be passed through the input buffers atunity gain, but differential voltages will be amplified bythe factor (1 + (2 R F /R G )).In theory, this means that the user may take as muchgain in the front end as desired (as determined by R G )without increasing the common-mode gain and error.That is, the differential signal will be increased bygain, but the common-mode error will not, so the ratio(Gain (V DIFF )/(V ERROR CM )) will increase. Thus, CMRRwill theoretically increase in direct proportion to gain—avery useful property.Finally, because of the symmetry of this configuration,common-mode errors in the input amplifiers, if they track,tend to be canceled out by the output stage subtractor.This includes such errors as common-mode rejectionvs. frequency. These features explain the popularity ofthis configuration.3-Op Amp In-Amp Design ConsiderationsTwo alternatives are available for constructing 3-op ampinstrumentation amplifiers: using FET or bipolar inputoperational amplifiers. FET input op amps have very lowbias currents and are generally well-suited for use withvery high (>10 6 ) source impedances. FET amplifiersusually have lower CMR, higher offset voltage, and higheroffset drift than bipolar amplifiers. They also may providea higher slew rate for a given amount of power.The sense and reference terminals (Figure 2-4) permitthe user to change A3’s feedback and ground connections.The sense pin may be externally driven for servoapplications and others for which the gain of A3 needsto be varied. Likewise, the reference terminal allows anexternal offset voltage to be applied to A3. For normaloperation, the sense and output terminals are tiedtogether, as are reference and ground.Amplifiers with bipolar input stages tend to achieve bothhigher CMR and lower input offset voltage drift than FETinput amplifiers. Superbeta bipolar input stages combinemany of the benefits of FET and bipolar processes, witheven lower IB drift than FET devices.A common (but frequently overlooked) issue for theunwary designer using a 3-op amp in-amp design is thereduction of common-mode voltage range that occurswhen the in-amp is operating at high gain. Figure 2-5is a schematic of a 3-op amp in-amp operating at a gainof 1000.In this example, the input amplifiers, A1 and A2, areoperating at a gain of 1000, while the output amplifieris providing unity gain. This means that the voltage atthe output of each input amplifier will equal one-half+5V + CMV*32A1110k50k10kINVERTINGINPUTSIGNAL VOLTAGE10mV p-pNONINVERTINGINPUT10023A3*6V OUTCOMMON-MODEERROR VOLTAGE65A250k710k–5V + CMV*10kFigure 2-5. A 3-op amp in-amp showing reduced CMV range.2-3

the peak-to-peak input voltage 1000, plus anycommon-mode voltage that is present on the inputs(the common-mode voltage will pass through at unitygain regardless of the differential gain). Therefore, ifa 10 mV differential signal is applied to the amplifierinputs, amplifier A1’s output will equal +5 V, plus thecommon-mode voltage, and A2’s output will be –5 V,plus the common-mode voltage. If the amplifiers areoperating from 15 V supplies, they will usually have7 V or so of headroom left, thus permitting an 8 Vcommon-mode voltage—but not the full 12 V of CMV,which, typically, would be available at unity gain (for a10 mV input). Higher gains or lower supply voltages willfurther reduce the common-mode voltage range.The Basic 2-Op Amp Instrumentation AmplifierFigure 2-6 is a schematic of a typical 2-op amp in-ampcircuit. It has the obvious advantage of requiring only two,rather than three, operational amplifiers and providingsavings in cost and power consumption. However, thenonsymmetrical topology of the 2-op amp in-amp circuitcan lead to several disadvantages, most notably lower acCMRR compared to the 3-op amp design, limiting thecircuit’s usefulness.The transfer function of this circuit isV OUT = (V IN2 – V IN1 ) (1 + R4/R3)for R1 = R4 and R2 = R3Input resistance is high and balanced, thus permitting thesignal source to have an unbalanced output impedance.The circuit’s input bias currents are set by the inputcurrent requirements of the noninverting input of thetwo op amps, which typically are very low.Disadvantages of this circuit include the inability to operateat unity gain, a decreased common-mode voltage rangeas circuit gain is lowered, and poor ac common-moderejection. The poor CMR is due to the unequal phaseshift occurring in the two inputs, V IN1 and V IN2 . That is,the signal must travel through amplifier A1 before it issubtracted from V IN2 by amplifier A2. Thus, the voltageat the output of A1 is slightly delayed or phase-shiftedwith respect to V IN1 .Minimum circuit gains of 5 are commonly used withthe 2-op amp in-amp circuit because this permits an adequatedc common-mode input range, as well as sufficientbandwidth for most applications. The use of rail-to-rail(single-supply) amplifiers will provide a common-modevoltage range that extends down to –V S (or ground insingle-supply operation), plus true rail-to-rail output voltagerange (i.e., an output swing from +V S to –V S ).Table 2-1 shows amplifier gain vs. circuit gain for thecircuit of Figure 2-6 and gives practical 1% resistorvalues for several common circuit gains.Table 2-1. Operating Gains of Amplifiers A1and A2 and Practical 1% Resistor Values for theCircuit of Figure 2-6.Circuit Gain GainGain of A1 of A2 R2, R3 R1, R41.10 11.00 1.10 499 k 49.9 k1.33 4.01 1.33 150 k 49.9 k1.50 3.00 1.50 100 k 49.9 k2.00 2.00 2.00 49.9 k 49.9 k10.1 1.11 10.10 5.49 k 49.9 k101.0 1.01 101.0 499 49.9 k1001 1.001 1001 49.9 49.9 kR G (OPTIONAL)R1 R2 R3 R449.9k 49.9k0.1 F2 8A1 15R P *V IN13A2 7 V OUT49.9k6 4 0.1 FR P *V IN249.9k–V SV OUT = V IN2 – V IN1 1 + –––R4+ ––––2R4 * OPTIONAL INPUT PROTECTIONR3 RRESISTOR FOR GAINS GREATERG THAN 100 OR INPUT VOLTAGESFOR R1 = R4, R2 = R3EXCEEDING THE SUPPLY VOLTAGE2-4A1, A2: OP2177, AD8698Figure 2-6. A 2-op amp in-amp circuit.

2-Op Amp In-Amps—Common-Mode DesignConsiderations for Single-Supply OperationWhen the 2-op amp in-amp circuit of Figure 2-7 isexamined from the reference input, it is apparent that itis simply a cascade of two inverters.Assuming that the voltage at both of the signal inputs,V IN1 and V IN2 , is 0, the output of A1 will equalV O1 = –V REF (R2/R1)A positive voltage applied to V REF will tend to drivethe output voltage of A1 negative, which is clearly notpossible if the amplifier is operating from a single powersupply voltage (+V S and 0 V).The gain from the output of amplifier A1 to the circuit’soutput, V OUT , at A2, is equal toV OUT = –V O1 (R4/R3)The gain from V REF to V OUT is the product of these twogains and equalsV OUT = (–V REF (R2/R1))(–R4/R3)In this case, R1 = R4 and R2 = R3. Therefore, thereference gain is +1, as expected. Note that this is theresult of two inversions, in contrast to the noninvertingsignal path of the reference input in a typical 3-op ampin-amp circuit.Just as with the 3-op amp in-amp, the common-modevoltage range of the 2-op amp in-amp can be limitedby single-supply operation and by the choice ofreference voltage.Figure 2-8 is a schematic of a 2-op amp in-amp operatingfrom a single 5 V power supply. The reference input istied to V S /2, which in this case is 2.5 V. The outputvoltage should ideally be 2.5 V for a differential inputvoltage of 0 V and for any common-mode voltage withinthe power supply voltage range (0 V to 5 V).As the common-mode voltage is increased from 2.5 Vtoward 5 V, the output voltage of A1 (V O1 ) will equalV O1 = V CM + ((V CM – V REF ) (R2/R1))In this case, V REF = 2.5 V and R2/R1 = 1/4. The outputvoltage of A1 will reach 5 V when V CM = 4.5 V. Furtherincreases in common-mode voltage obviously cannot berejected. In practice, the input voltage range limitationsof amplifiers A1 and A2 may limit the in-amp’s commonmodevoltage range to less than 4.5 V.Similarly, as the common-mode voltage is reduced from2.5 V toward 0 V, the output voltage of A1 will hit zerofor a V CM of 0.5 V. Clearly, the output of A1 cannot gomore negative than the negative supply line (assumingno charge pump), which, for a single-supply connection,equals 0 V. This negative or zero-in common-moderange limitation can be overcome by proper design of thein-amp’s internal level shifting, as in the AD627 monolithic2-op amp instrumentation amplifier. However,even with good design, some positive common-modevoltage range will be traded off to achieve operation atzero common-mode voltage.V REF4k 1k 1k 4kR1 R2 R3 R4A1V O1A2V OUTV IN1VIN2Figure 2-7. The 2-op amp in-amp architecture.+5V2.5V –0.25 = 0.625V+2.5VR1 R2 R3 R4AD580,AD5844k 1k 1k 4k0V –0.625VGAIN = –4A1 V O10VV IN1A2V OUT0V GAIN = 0.250VV IN2 –0.625V –4 = +2.50VFigure 2-8. Output swing limitations of 2-op amp in-amp using a 2.5 V reference.2-5

Another, and perhaps more serious, limitation of thestandard 2-amplifier instrumentation amplifier circuitcompared to 3-amplifier designs, is the intrinsic difficultyof achieving high ac common-mode rejection. Thislimitation stems from the inherent imbalance in thecommon-mode signal path of the 2-amplifier circuit.Assume that a sinusoidal common-mode voltage, V CM ,at a frequency, F CM , is applied (common mode) to inputsV IN1 and V IN2 (Figure 2-8). Ideally, the amplitude ofthe resulting ac output voltage (the common-modeerror) should be 0 V, independent of frequency, F CM ,at least over the range of normal ac power line (mains)frequencies: 50 Hz to 400 Hz. Power lines tend to bethe source of much common-mode interference.If the ac common-mode error is zero, amplifier A2and gain network R3, R4 must see zero instantaneousdifference between the common-mode voltage, applieddirectly to V IN2 , and the version of the common-modevoltage that is amplified by A1 and its associated gainnetwork R1, R2. Any dc common-mode error (assumingnegligible error from the amplifier’s own CMRR) canbe nulled by trimming the ratios of R1, R2, R3, and R4to achieve the balanceR1 R4 and R2 R3However, any phase shift (delay) introduced by amplifierA1 will cause the phase of V O1 to slightly lag behindthe phase of the directly applied common-modevoltage of V IN2 . This difference in phase will result inan instantaneous (vector) difference in V O1 and V IN2 ,even if the amplitudes of both voltages are at theirideal levels. This will cause a frequency-dependentcommon-mode error voltage at the circuit’s output,V OUT . Further, this ac common-mode error will increaselinearly with common-mode frequency because the phaseshift through A1 (assuming a single-pole roll-off) willincrease directly with frequency. In fact, for frequenciesless than 1/10th the closed-loop bandwidth (f T1 ) of A1,the common-mode error (referred to the input of thein-amp) can be approximated byVEG fCM% CM Error 100% 100%Vf= ( ) = ( )CMwhere V E is the common-mode error voltage at V OUT ,and G is the differential gain—in this case, 5.TICMR (dB)120110100908070605040302010G = 5G = 100G = 100001 10 100 1k 10k 100kFREQUENCY (Hz)Figure 2-9. CMR vs. frequency of AD627in-amp circuit.For example, if A1 has a closed-loop bandwidth of100 kHz (a typical value for a micropower op amp),when operating at the gain set by R1 and R2, and thecommon-mode frequency is 100 Hz, then100Hz% CM Error = ( 100% ) = 0. 1%100 kHzA common-mode error of 0.1% is equivalent to 60 dBof common-mode rejection. So, in this example, even ifthis circuit were trimmed to achieve 100 dB CMR at dc,this would be valid only for frequencies less than 1 Hz. At100 Hz, the CMR could never be better than 60 dB.The AD627 monolithic in-amp embodies an advancedversion of the 2-op amp instrumentation amplifiercircuit that overcomes these ac common-mode rejectionlimitations. As illustrated in Figure 2-9, the AD627maintains over 80 dB of CMR out to 8 kHz (gain of1000), even though the bandwidth of amplifiers A1and A2 is only 150 kHz.The four resistors used in the subtractor are normallyinternal to the IC and are usually of very high resistance.High common-mode voltage difference amps (diff amps)typically use input resistors selected to provide voltageattenuation. Therefore, both the differential signalvoltage and the common-mode voltage are attenuated,the common mode is rejected, and then the signalvoltage is amplified.2-6

Chapter IIIMONOLITHIC INSTRUMENTATION AMPLIFIERSAdvantages Over Op Amp In-AmpsMonolithic IC instrumentation amplifiers were developedto satisfy the demand for in-amps that would beeasier to apply. These circuits incorporate variations inthe 3-op amp and 2-op amp in-amp circuits previouslydescribed, while providing laser-trimmed resistorsand other benefits of monolithic IC technology. Sinceboth active and passive components are now withinthe same die, they can be closely matched—thiswill ensure that the device provides a high CMR. Inaddition, these components will stay matched overtemperature, ensuring excellent performance over awide temperature range. IC technologies such as laserwafer trimming allow monolithic integrated circuitsto be tuned up to very high accuracy and provide lowcost, high volume manufacturing. An additional advantageof monolithic devices is that they are availablein very small, very low cost SOIC, MSOP, or LFCSP(chip scale) packages designed for use in high volumeproduction. Table 3-1 provides a quick performancesummary of Analog Devices in-amps.Which to Use—an In-Amp or a Diff Amp?Although instrumentation amplifiers and differenceamplifiers share many properties, the first step in thedesign process should be which type of amplifierto use.A difference amplifier is basically an op amp subtractor,typically using high value input resistors. The resistorsprovide protection by limiting the amplifier’s inputcurrent. They also reduce the input common-modeand differential voltage to a range that can be handledby the internal subtractor amplifier. In general, differenceamplifiers should be used in applications where thecommon-mode voltage or voltage transients may exceedthe supply voltage.Table 3-1. Latest Generation Analog Devices In-Amps Summarized 1Power –3 dB CMR Input V OS RTI InputSupply BW G = 10 Offset Drift Noise 2 BiasCurrent Typ (dB) Voltage (V/C) (nV/√Hz) CurrentProduct Features Typ (G = 10) Min Max Max (G = 10) (nA) MaxAD8221 Precision, high BW 0.9 mA 560 kHz 100 3 60 V 0.4 11 max 1.5AD620 General-purpose 0. 9 mA 800 kHz 95 3 125 V 1 16 max 2AD8225 Precision gain = 5 1.1 mA 900 kHz 4 83 4, 5 150 V 0.3 45 typ 4 1.2AD8220 R-R, JFET input 750 mA 1500 kHz 100 250 mV 5 17 typ 10 pAAD8222 Dual, precision, high BW 1.8 mA 750 kHz 100 3 120 V 0.4 11 max 2AD8230 R-R, zero drift 2.7 mA 2 kHz 110 10 V 10 240 typ 1AD8250 High BW, programmable gain 3.5 mA 3.5 MHz 100 100 V 1 13 typ 15AD8251 High BW, programmable gain 3.5 mA 3.5 MHz 100 100 V 1 13 typ 15AD8553 Auto-zero with shutdown 1.1 mA 1 kHz 100 20 V 0.1 150 typ 1AD8555 Zero drift dig prog 2.0 mA 700 kHz 6 80 6 10 V 0.07 32 typ 22AD8556 Dig prog IA with filters 2.0 mA 700 kHz 6 80 6 10 V 0.07 32 typ 54AD622 Low cost 0.9 mA 800 kHz 86 3 125 V 1 14 typ 5AD621 Precise gain 0.9 mA 800 kHz 93 3 250 V 7 2.5 7 17 max 7 2AD623 Low cost, S.S. 375 A 800 kHz 90 3 200 V 2 35 typ 25AD627 Micropower, S.S. 60 A 80 kHz 100 250 V 3 42 typ 10NOTESS.S. = single supply.1 Refer to ADI website at www.analog.com for latest products and specifications.2 At 1 kHz. RTI noise = √((e ni ) 2 + (e no/G ) 2 ).3 For dc to 60 Hz, 1 k source imbalance.4 Operating at a gain of 5.5 For 10 kHz, 1 k source imbalance.6 Operating at a gain of 70.7 Referred to input (RTI).3-1

I+V S–V S–IN400Q1+V SQ2V BI B COMPENSATIONA1A2+V S R1R2C1C224.7k24.7kR GII B COMPENSATION10k10kA310k+V S+V S400+IN10k–V S+V SOUTPUT–V SREF–V S–V S–V SFigure 3-1. AD8221 simplified schematic.In contrast, an instrumentation amplifier is most commonlyan op amp subtractor with two input buffer amplifiers(these increase the input Z and thus reduce loading of theinput source). An in-amp should be used when the totalinput common-mode voltage plus the input differentialvoltage, including transients, is less than the supply voltage.In-amps are also needed in applications where thehighest accuracy, best signal-to-noise ratio, and lowestinput bias current are essential.Monolithic In-Amp Design—TheInside StoryHigh Performance In-AmpsAnalog Devices introduced the first high performancemonolithic instrumentation amplifier, the AD520,in 1971.In 2003, the AD8221 was introduced. This in-amp isin a tiny MSOP package and offers increased CMRat higher bandwidths than other competing in-amps.It also has improved ac and dc specifications over theindustry-standard AD620 series in-amps.The AD8221 is a monolithic instrumentation amplifierbased on the classic 3-op amp topology (Figure 3-1).Input transistors Q1 and Q2 are biased at a constantcurrent so that any differential input signal will force theoutput voltages of A1 and A2 to be equal. A signal appliedto the input creates a current through R G , R1, and R2such that the outputs of A1 and A2 deliver the correctvoltage. Topologically, Q1, A1, R1 and Q2, A2, R2 canbe viewed as precision current feedback amplifiers. Theamplified differential and common-mode signals areapplied to a difference amplifier, A3, which rejects thecommon-mode voltage, but processes the differentialvoltage. The difference amplifier has a low outputoffset voltage as well as low output offset voltage drift.Laser-trimmed resistors allow for a highly accuratein-amp with gain error typically less than 20 ppm andCMRR that exceeds 90 dB (G = 1).Using superbeta input transistors and an I B compensationscheme, the AD8221 offers extremely high inputimpedance, low I B , low I OS , low I B drift, low inputbias current noise, and extremely low voltage noise of8 nV/√Hz.The transfer function of the AD8221 is49.4 kΩG = + 1RG49.4 kΩRG=G −1Care was taken to ensure that a user could easily andaccurately set the gain using a single external standardvalue resistor.Since the input amplifiers employ a current feedbackarchitecture, the AD8221’s gain bandwidth productincreases with gain, resulting in a system that does notsuffer from the expected bandwidth loss of voltage feedbackarchitectures at higher gains.In order to maintain precision even at low input levels,special care was taken with the AD8221’s design andlayout, resulting in an in-amp whose performancesatisfies even the most demanding applications (seeFigures 3-3 and 3-4).3-2

A unique pinout enables the AD8221 to meet anunparalleled CMRR specification of 80 dB at 10 kHz(G = 1) and 110 dB at 1 kHz (G = 1000). The balancedpinout, shown in Figure 3-2, reduces the parasitics thathad, in the past, adversely affected CMR performance.In addition, the new pinout simplifies board layoutbecause associated traces are grouped. For example,the gain setting resistor pins are adjacent to the inputs,and the reference pin is next to the output.CMRR (dB)1601401201008060–IN 1R G 2R G 3+IN 4GAIN = 1000GAIN = 100GAIN = 10GAIN = 1AD82218 +V S7 V OUT6 V REF5 –V STOP VIEWFigure 3-2. AD8221 pinout.GAIN = 10GAIN = 100GAIN = 1000The AD8222 (Figure 3-5) is a dual version of theAD8221 in-amp, with similar performance andspecifications. Its small size allows more amplifiersper PC board. In addition, the AD8222 is the firstin-amp to be specified for differential output performance.It is available in a 4 mm 3 4 mm, 16-leadLFCSP package.–IN1RG1RG1+IN11234V CCREF1REF2V EE V CCOUT1OUT2V EE161514135 6 7 81211109–IN2RG2RG2+IN2Figure 3-5. AD8222 connection diagram.For many years, the AD620 has been the industrystandard,high performance, low cost in-amp. TheAD620 is a complete monolithic instrumentationamplifier offered in both 8-lead DIP and SOIC packages.The user can program any desired gain from 1 to1000 using a single external resistor. By design, therequired resistor values for gains of 10 and 100 arestandard 1% metal film resistor values. 400.1 1 10 100 1k 10k 100k 1MFREQUENCY (Hz)Figure 3-3. CMRR vs. frequency (RTI) of the AD8221.GAIN (dB)706050403020100–10–20GAIN = 1000GAIN = 100GAIN = 10GAIN = 1–30100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 3-4. AD8221 closed-loop gain vs.frequency.3-3 Figure 3-6. AD620 pin configuration.The AD620 (see Figure 3-7) is a second-generationversion of the classic AD524 in-amp and embodies amodification of its 3-op amp circuit. Laser trimmingof on-chip thin film resistors, R1 and R2, allows theuser to accurately set the gain to 100 within 0.3%max error, using only one external resistor. Monolithicconstruction and laser wafer trimming allow the tightmatching and tracking of circuit components.A preamp section comprised of Q1 and Q2 providesadditional gain up front. Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains a constantcollector current through the input devices Q1 and Q2,

+V SI120AV B20AI2I BCOMPENSATIONI B COMPENSATIONA1C1A2C210k10kA3OUTPUT– INR3400Q1R1R GR2Q210kR440010k+INREFGAINSENSEGAINSENSEthereby impressing the input voltage across the externalgain setting resistor, R G . This creates a differentialgain from the inputs to the A1/A2 outputs given byG = (R1 + R2)/R G + 1. The unity-gain subtractor, A3,removes any common-mode signal, yielding a singleendedoutput referred to the REF pin potential.The value of R G also determines the transconductanceof the preamp stage. As R G is reduced for larger gains,the transconductance increases asymptotically to thatof the input transistors. This has important advantages:First, the open-loop gain is boosted for increasingprogrammed gain, thus reducing gain related errors.Second, the gain bandwidth product (determined byC1, C2, and the preamp transconductance) increaseswith programmed gain, thus optimizing the amplifier’sfrequency response. Figure 3-8 shows the AD620’sclosed-loop gain vs. frequency.1000–V SFigure 3-7. A simplified schematic of the AD620.The AD620 also has superior CMR over a wide frequencyrange, as shown in Figure 3-9.CMR (dB)1601401201008060402000.1G = 1000G = 100G = 10G = 1110100 1kFREQUENCY (Hz)10k100kFigure 3-9. AD620 CMR vs. frequency.1M100GAIN (V/V)1010.1100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 3-8. AD620 closed-loop gain vs. frequency.3-4

Figures 3-10 and 3-11 show the AD620’s gain nonlinearityand small signal pulse response.10090100%100V2V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .The value of 24.7 k was chosen so that standard1% resistor values could be used to set the mostpopular gains.Low Cost In-AmpsThe AD622 is a low cost version of the AD620 (seeFigure 3-6). The AD622 uses streamlined productionmethods to provide most of the performance of theAD620 at lower cost.Figures 3-12, 3-13, and 3-14 show the AD622’s CMRvs. frequency, gain nonlinearity, and closed-loop gainvs. frequency.160Figure 3-10. AD620 gain nonlinearity(G = 100, R L = 10 k, vertical scale: 100 V =10 ppm, horizontal scale: 2 V/div).1009020V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .CMR (dB)14012010080604020G = 1000G = 100G = 10G = 1100%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10s00.1 1 10 100 1k 10k 100k 1MFREQUENCY (Hz)Figure 3-12. AD622 CMR vs. frequency((RTI) 0 to 1 k source imbalance).10s2VFigure 3-11. Small signal pulse response ofthe AD620 (G = 10, R L = 2 k, C L = 100 pF).Finally, the input voltage noise is reduced to a value of9 nV/√Hz, determined mainly by the collector currentand base resistance of the input devices.The internal gain resistors, R1 and R2, are trimmed toan absolute value of 24.7 k, allowing the gain to beprogrammed accurately with a single external resistor.The gain equation is thenSo that49. 4 kΩG = + 1R G49. 4 kΩRG =G −1Where resistor R G is in k.3-510090100%Figure 3-13. AD622 Gain nonlinearity(G = 1, R L = 10 k, vertical scale: 20 V = 2 ppm).

GAIN (V/V)10001001010100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 3-14. AD622 closed-loopgain vs. frequency.Pin-Programmable, Precise Gain In-AmpsThe AD621 is similar to the AD620, except that forgains of 10 and 100 the gain setting resistors are on thedie—no external resistors are used. A single externaljumper (between Pins 1 and 8) is all that is needed toselect a gain of 100. For a gain of 10, leave Pin 1 andPin 8 open. This provides excellent gain stability overtemperature, as the on-chip gain resistor tracks the TCof the feedback resistor. Figure 3-15 is a simplifiedschematic of the AD621. With a max total gain error of0.15% and 5 ppm/C gain drift, the AD621 has muchgreater built-in accuracy than the AD620.The AD621 may also be operated at gains between 10and 100 by using an external gain resistor, although gainerror and gain drift over temperature will be degraded.Using external resistors, device gain is equal toG = (R1 + R2)/R G + 1+V S7I BCOMPENSATIONI120AC1A1V BR3R1 25k R2 25k 10k 10k400R5– INQ1 5555.6 Q2+IN2 R4 3R6400555.61 8G = 100 G = 100A220AC2I2I B COMPENSATION10k10kA3OUTPUT6REF54–V SFigure 3-15. A simplified schematic of the AD621.3-6

Figures 3-16 and 3-17 show the AD621’s CMR vs.frequency and closed-loop gain vs. frequency.Figures 3-18 and 3-19 show the AD621’s gain nonlinearityand small signal pulse response.160140120GAIN = 10010090100s2V100GAIN = 10CMR (dB)80604020100%00.1110 100 1k 10k 100k 1MFREQUENCY (Hz)Figure 3-16. AD621 CMR vs. frequency.Figure 3-18. AD621 gain nonlinearity(G = 10, R L = 10 k, vertical scale: 100 V/div= 100 ppm/div, horizontal scale 2 V/div).100020mV10sCLOSED-LOOP GAIN (V/V)10010110090100%0.1100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 3-17. AD621 closed-loop gain vs.frequency.Figure 3-19. Small signal pulse response ofthe AD621 (G = 10, R L = 2 k, C L = 100 pF).3-7

Figure 3-20. AD8220 connection diagram.The AD8220 is a FET input, gain-programmable, highperformance instrumentation amplifier with a max inputbias current of 10 pA. It also features excellent highfrequency common-mode rejection (see Figure 3-20).The AD8220 maintains a minimum CMRR of 70 dBup to 20 kHz, at G = 1. The combination of extremelyhigh input impedance and high CMRR over frequencymakes the AD8220 useful in applications such as patientmonitoring. In these applications, input impedance is highand high frequency interference must be rejected.The rail-to-rail output, low power consumptionand small MSOP/CSP package make this precisioninstrumentation amplifier attractive for use in multichannelapplications.CMRR (dB)16014012010080GAIN = 1000GAIN = 100GAIN = 10GAIN = 1BANDWIDTHLIMITEDA single resistor sets the gain from 1 to 1000. The AD8220operates on both single and dual supplies and is wellsuitedfor applications where input voltages close to thoseof the supply are encountered. In addition, its rail-to-railoutput stage allows for maximum dynamic range, whenconstrained by low single-supply voltages.Auto-Zeroing Instrumentation AmplifiersAuto-zeroing is a dynamic offset and drift cancellationtechnique that reduces input referred voltage offset tothe V level, and voltage offset drift to the nV/C level.The AD8230 (Figure 3-22) is an instrumentation amplifierthat utilizes an auto-zeroing topology and combinesit with high common-mode signal rejection.–V S 1+V S 2V REF 1 3+IN 4AD8230TOP VIEWFigure 3-22. AD8230 connection diagram.The internal signal path consists of an active differentialsample-and-hold stage (preamp), followed bya differential amplifier (gain amp). Both amplifiersimplement auto-zeroing to minimize offset and drift.A fully differential topology increases the immunityof the signals to parasitic noise and temperature effects.Amplifier gain is set by two external resistors forconvenient TC matching. The AD8230 can acceptinput common-mode voltages within and includingthe supply voltages (5 V).8765V OUTR GV REF 2–IN604010 100 1k 10k100kFREQUENCY (Hz)Figure 3-21. Typical AD8220 CMRR vs. frequency.3-8

The signal sampling rate is controlled by an on-chip,10 kHz oscillator and logic to derive the required nonoverlappingclock phases. For simplification of the functionaldescription, two sequential clock phases, A and B, willbe used to distinguish the order of internal operation asdepicted in Figures 3-23 and 3-24, respectively.During Phase A, the sampling capacitors are connectedto the input signals at the common-mode potential. Theinput signal’s difference voltage, V DIFF , is stored acrossthe sampling capacitors, C SAMPLE . The common-modepotential of the input affects C SAMPLE insofar as thesampling capacitors are at a different common-modepotential than the preamp. During this period, the gainamp is disconnected from the preamp so that its outputremains at the level set by the previously sampled inputsignal, held on C HOLD in Figure 3-23.In Phase B, upon sampling the analog input signals,the input common-mode component is removed.The common-mode output of the preamp is held at thereference potential, V REF . When the bottom plates of thesampling capacitors connect to the output of the preamp,the input signal common-mode voltage is pulled to theamplifier’s common-mode voltage, V REF . In this manner,the sampling capacitors are brought to the same commonmodevoltage as the preamp. The remaining differentialsignal is presented to the gain amp, refreshing the holdcapacitors’ signal potentials, as shown in Figure 3-24.Figures 3-25 through 3-28 show the internal workingsof the AD8230 in depth. As noted, both the preamp andgain amp auto-zero. The preamp auto-zeroes duringphase A, shown in Figure 3-25, while the sampling capsare connected to the signal source. By connecting theV +INPREAMPGAIN AMPC HOLDV DIFF+V CMC SAMPLE+ –– +V OUTC HOLDV –INV REFFigure 3-23. The AD8230 in Phase A sampling phase. The differential component of the input signalis stored on sampling capacitors, C SAMPLE . The gain amp conditions the signal stored on the holdcapacitors, C HOLD . Gain is set with the R G and R F resistors.R GR FPREAMPGAIN AMPV +INC HOLDV DIFF+V CMC SAMPLE+ –– +V OUTC HOLDV –INV REFR GR FFigure 3-24. In Phase B, the differential signal is transferred to the hold capacitors, refreshing the valuestored on C HOLD . The gain amp continues to condition the signal stored on the hold capacitors, C HOLD .3-9

preamp differential inputs together, the resulting outputreferred offset is connected to an auxiliary input port to thepreamp. Negative feedback operation forces a cancelingpotential at the auxiliary port, which is subsequentlyheld on a storage capacitor, C P_HOLD .While in Phase A, the gain amp shown in Figure 3-26reads the previously sampled signal held on the holdingcapacitors, C HOLD . The gain amp implements feedforwardoffset compensation to allow for transparent nulling ofthe main amp and a continuous output signal. A differentialsignal regimen is maintained throughout the main amp andfeedforward nulling amp by utilizing a double differentialinput topology. The nulling amp compares the input ofthe two differential signals. As a result, the offset erroris fed into the null port of the main amp, V NULL , andstored on C M_HOLD . This operation effectively forcesthe differential input potentials at both the signal andfeedback ports of the main amp to be equal. This is therequirement for zero offset.PREAMPGAIN AMPV +INABV DIFF+V CMABC SAMPLEABBA+ –– +AABBC HOLDC HOLDVOUTV –INC P_HOLDV REFR GR FFigure 3-25. Detailed schematic of the preamp during Phase A. The differential signal isstored on the sampling capacitors. Concurrently, the preamp nulls its own offset and storesthe correction voltage on its hold capacitors, C P_HOLD .PREAMPGAIN AMPS nNULLING AMPBBAABAC HOLD+ –B– +BC HOLDsf nC N_HOLDC M_HOLDMAINAMPV NULLV OUTfV REFR GR FFigure 3-26. Detailed schematic of the gain amp during Phase A. The main amp conditionsthe signal held on the hold capacitors, C HOLD . The nulling amplifier forces the inputs of themain amp to be equal by injecting a correction voltage into the V NULL port, removing theoffset of the main amp. The correction voltage is stored on C M_HOLD .3-10

During Phase B, the inputs of the preamp are no longershorted, and the sampling capacitors are connected to theinput and output of the preamp as shown in Figure 3-27.The preamp, having been auto-zeroed in Phase A, hasminimal offset. When the sampling capacitors are connectedto the preamp, the common mode of the samplingcapacitors is brought to V REF . The preamp outputs thedifference signal onto the hold capacitors, C HOLD .The main amp continues to output the gained differencesignal, shown in Figure 3-28. Its offset is kept to aminimum by using the nulling amp’s correction potentialstored on C M_HOLD from the previous phase. During thisphase, the nulling amp compares its two differential inputsand corrects its own offset by driving a correction voltageinto its nulling port and, ultimately, onto C N_HOLD . Inthis fashion, the nulling amp reduces its own offset inPhase B before it corrects for the main amp’s offset inthe next phase, Phase A.PREAMPGAIN AMPV +INABV DIFF+V CMABC SAMPLEABBA+ –– +AABBC HOLDC HOLDVOUTV –INC P_HOLDV REFR GR FFigure 3-27. Detailed schematic of the preamp during Phase B. The preamp’s offset remains low becauseit was corrected in the previous phase. The sampling capacitors connect to the input and output of thepreamp, and the difference voltage is passed onto the holding capacitors, C HOLD .PREAMPGAIN AMPS nNULLING AMPBBAABAC HOLD+ –B– +BC HOLDsf nC N_HOLDC M_HOLDMAINAMPV NULLV OUTfV REFR GR FFigure 3-28. Detailed schematic of the gain amp during Phase B. The nulling amplifier nulls its ownoffset by injecting a correction voltage into its own auxiliary port and storing it on C N_HOLD . The mainamplifier continues to condition the differential signal held on C HOLD , yet maintains minimal offsetbecause its offset was corrected in the previous phase.3-11

Two external resistors set the gain of the AD8230. Thegain is expressed in the following function:0.1F⎛ RGain = 2 +⎝⎜1R+V S10FFG⎞⎠⎟Figure 3-30 shows the AD8230’s common-mode rejectionvs. frequency. Figure 3-31 is a plot of AD8230’sgain flatness vs. frequency at a gain of 10. 20.1F–V S10F 4AD82301R G8V OUT 5 V REF2V 6 REF137R FR G Figure 3-30. Common-mode rejection vs. frequency.Figure 3-29. Gain setting.Table 3-2. Gains Using Standard 1% ResistorsGain R F R G Actual Gain2 0 V (short) None 210 8.06 kV 2 kV 1050 12.1 kV 499 V 50.5100 9.76 kV 200 V 99.6200 10 kV 100 V 202500 49.9 kV 200 V 5011000 100 kV 200 V 1002Figure 3-29 and Table 3-2 provide an example of somegain settings. As Table 3-2 shows, the AD8230 accepts awide range of resistor values. Since the instrumentationapmplifier has finite driving capability, ensure that theoutput load in parallel with the sum of the gain settingresistors is greater than 2 kV.( ) > 2 kΩR R + RL F GOffset voltage drift at high temperature can be minimizedby keeping the value of the feedback resistor, R F , small.This is due to the junction leakage current on the R Gpin, Pin 7. Figure 3-31. Gain vs. frequency, G = 10.The AD8553 is a precision current-mode auto-zeroinstrumentation amplifier capable of single-supplyoperation. The current-mode correction topologyresults in excellent accuracy, without the need fortrimmed resistors on the die.3-12

AD8553 Figure 3-32. AD8553 connection diagram.Figure 3-32 is the AD8553 connection diagram whileFigure 3-33 shows a simplified schematic illustratingthe basic operation of the AD8553 (without correction).The circuit consists of a voltage-to-current amplifier(M1 to M6), followed by a current-to-voltage amplifier(R2 and A1). Application of a differential input voltageforces a current through external resistor R1, resultingin conversion of the input voltage to a signal current.Transistors M3 to M6 transfer twice this signal currentto the inverting input of the op amp A1. Amplifier A1 andexternal resistor R2 form a current-to-voltage converterto produce a rail-to-rail output voltage at VOUT.Op amp A1 is a high precision auto-zero amplifier. Thisamplifier preserves the performance of the autocorrectioncurrent-mode amplifier topology while offering the usera true voltage-in, voltage-out instrumentation amplifier.Offset errors are corrected internally.An external reference voltage is applied to the noninvertinginput of A1 for output-offset adjustment. Becausethe AD8553 is essentially a chopper in-amp, some type oflow-pass filtering of the ouput is usually required. Externalcapacitor C2 is used to filter out high frequency noise.The pinout of the AD8553 allows the user to access the signalcurrent from the output of the voltage-to-current converter(Pin 5). The user can choose to use the AD8553 as acurrent-output device instead of a voltage-output device.The AD8555 is a zero-drift, sensor signal amplifier withdigitally programmable gain and output offset. Designedto easily and accurately convert variable pressure sensorand strain bridge outputs to a well-defined output voltagerange, the AD8555 also accurately amplifies many otherdifferential or single-ended sensor outputs.Figure 3-34 shows the pinout and Figure 3-35 thesimplified schematic. Figure 3-34. AD8555 connection diagram.The AD8555 (and AD8556) use both auto-zeroingand “chopping” techniques to maintin zero drift. A1,A2, R1, R2, R3, P1, and P2 form the first gain stage ofthe differential amplifier. A1 and A2 are auto-zeroed opamps that minimize input offset errors. P1 and P2 aredigital potentiometers, guaranteed to be monotonic.Programming P1 and P2 allows the first stage gain tobe varied from 4.0 to 6.4 with 7-bit resolution, giving afine gain adjustment resolution of 0.37%. R1, R2, R3,P1, and P2 each have a similar temperature coefficient,so the first stage gain temperature coefficient is lowerthan 100 ppm/8C.IR 1IM5M6I R1 = V IN+ – V IN–R1V IN+ M1 M2I – I R1V IN–M3 M4C 2I – I R1R 22I R1A1I + I R1V BIASV REFV OUT = V REF +2R 2R1V IN+ – V IN–2I2IFigure 3-33. AD8553 simplified schematic.3-13

V DDV NEGV POSV DDA1V SSV DDA2R1P1R3P2R4R2R5V DDP3P4R6V DDA3V SSR7V CLAMPRFFILT/DIG OUTA5V SSV DDA4V SSV OUTV SSDACV SSFigure 3-35. AD8555 simplified schematic.A3, R4, R5, R6, R7, P3, and P4 form the second gain stageof the differential amplifier. A3 is also an auto-zeroed opamp that minimizes input offset errors. P3 and P4 aredigital potentiometers, allowing the second stage gainto be varied from 17.5 to 200 in eight steps; they allowthe gain to be varied over a wide range. R4, R5, R6, R7,P3, and P4 each have a similar temperature coefficient,so the second stage gain temperature coefficient is lowerthan 100 ppm/8C.A5 implements a voltage buffer, which provides thepositive supply to the amplifier output buffer A4. Itsfunction is to limit V OUT to a maximum value, useful fordriving analog-to-digital converters (ADC) operating onsupply voltages lower than V DD . The input to A5, V CLAMP ,has a very high input resistance. It should be connectedto a known voltage and not left floating. However, thehigh input impedance allows the clamp voltage to beset using a high impedance source (e.g., a potentialdivider). If the maximum value of V OUT does not needto be limited, V CLAMP should be connected to V DD .A4 implements a rail-to-rail input and output unity-gainvoltage buffer. The output stage of A4 is supplied froma buffered version of V CLAMP instead of V DD , allowingthe positive swing to be limited. The maximum outputcurrent is limited between 5 to 10 mA.An 8-bit digital-to-analog converter (DAC) is used togenerate a variable offset for the amplifier output. ThisDAC is guaranteed to be monotonic. To preserve theratiometric nature of the input signal, the DAC referencesare driven from V SS and V DD , and the DAC output canswing from V SS (Code 0) to V DD (Code 255). The 8-bitresolution is equivalent to 0.39% of the difference betweenV DD and V SS (e.g., 19.5 mV with a 5 V supply). The DACoutput voltage (V DAC ) is given approximately byV⎛ Code + 0.5⎞≈V V V⎝⎜⎠⎟ ( − ) +256DAC DD SS SSThe temperature coefficient of V DAC is lower than200 ppm/8C.3-14

The amplifier output voltage (V OUT ) is given by( ) +V = GAIN V −V VOUT POS NEG DACwhere GAIN is the product of the first and secondstage gains.120V S = 2.5VGAIN = +70CLOSED-LOOP GAIN (dB)6040200GAIN = +1280GAIN = +70V S = 2.5VCMRR (dB)80400100 1k 10kFREQUENCY (Hz)100kFigure 3-36. AD8555 CMRR vs. frequency.Figures 3-36 and 3-37 show the AD8555’s CMRR vs.frequency and its closed-loop gain vs. frequency.See the AD8555 product data sheet for more details.1M1k10k100kFREQUENCY (Hz)Figure 3-37. AD8555 closed-loop gain vs.frequency measured at output pin.The AD8556 is essentially the same product as theAD8555, except that the former includes internal RFIfiltering. The block diagram for the AD8556 is shown inFigure 3-38. For theory of operation, refer to the previoussection that covers the AD8555.1MDIG INV CLAMPV DDLOGICV DDDACEMIFILTERA51+IN2 OUT–IN3V DDV SSV POSEMIFILTERA11+IN2 OUT–IN3R2R5P4R7V SSP2EMIFILTERV DDR3P1V SS1+IN2–INV DDA33OUTRFEMIFILTERV DDA41+IN2 OUT–IN3V OUTV NEGEMIFILTERA21+IN2 OUT–IN3R1R4P3V SSR6V SSV SSAD8556V SSFILT/DIG OUTFigure 3-38. AD8556 block diagram showing EMI/RFI built-in filters.3-15

+V S+V SV B–IN400Q1Q2400+IN–V SR2C2A1UNITY-GAINBUFFERSA2C1R1–V S15k3k+V S3kA3+V S–V S+V SV OUTGAIN-OF-5DIFFERENCE AMPLIFIER15kV REFFixed Gain (Low Drift) In-AmpsThe AD8225 is a precision, gain-of-5, monolithicin-amp. Figure 3-39 shows that it is a 3-op amp instrumentationamplifier. The unity-gain input buffersconsist of superbeta NPN transistors Q1 and Q2 andop amps A1 and A2. These transistors are compensatedso that their input bias currents are extremely low,typically 100 pA or less. As a result, current noise isalso low, only 50 fA/√Hz. The input buffers drive again-of-5 difference amplifier. Because the 3 k and15 k resistors are ratio matched, gain stability is betterthan 5 ppm/C over the rated temperature range.The AD8225 has a wide gain bandwidth product,resulting from its being compensated for a fixed gain of5, as opposed to the usual unity-gain compensation ofvariable gain in-amps. High frequency performance isalso enhanced by the innovative pinout of the AD8225.Since Pin 1 and Pin 8 are uncommitted, Pin 1 may beconnected to Pin 4. Since Pin 4 is also ac common, thestray capacitance at Pins 2 and 3 is balanced.Figure 3-40 shows the AD8225’s CMR vs. frequencywhile Figure 3-41 shows its gain nonlinearity.Figure 3-39. AD8225 simplified schematic.CMR (dB)NONLINEARITY (ppm)130120110100908070605040301 10100 1k 10k 100kFREQUENCY (Hz)Figure 3-40. AD8225 CMR vs. frequency.431002 9010–1–2 100–3100mV–V S2V3-16–4–100OUTPUT VOLTAGE (V)Figure 3-41. AD8225 gain nonlinearity.10

Monolithic In-Amps Optimized forSingle-Supply OperationSingle-supply in-amps have special design problemsthat need to be addressed. The input stage must be ableto amplify signals that are at ground potential (or veryclose to ground), and the output stage needs to be ableto swing to within a few millivolts of ground orthe supply rail. Low power supply current is alsoimportant. And, when operating from low powersupply voltages, the in-amp needs to have an adequategain bandwidth product, low offset voltage drift, andgood CMR vs. gain and frequency.The AD623 is an instrumentation amplifier basedon the 3-op amp in-amp circuit, modified to ensureoperation on either single- or dual-power supplies, evenat common-mode voltages at, or even below, the negativesupply rail (or below ground in single-supply operation).Other features include rail-to-rail output voltage swing,low supply current, MSOP packaging, low input andoutput voltage offset, microvolt/dc offset level drift,high common-mode rejection, and only one externalresistor to set the gain.As shown in Figure 3-42, the input signal is applied toPNP transistors acting as voltage buffers and dc levelshifters. A resistor trimmed to within 0.1% of 50 kin each amplifier’s (A1 and A2) feedback path ensuresaccurate gain programmability.The differential output is⎛⎜V⎝O⎞= 1+100 kΩ VR⎟⎠where R G is in k.The differential voltage is then converted to a single-endedvoltage using the output difference amplifier, which alsorejects any common-mode signal at the output of theinput amplifiers.Since all the amplifiers can swing to either supply rail,as well as have their common-mode range extended tobelow the negative supply rail, the range over which theAD623 can operate is further enhanced.Note that the base currents of Q1 and Q2 flow directlyout of the input terminals, unlike dual-supply, inputcurrent-compensatedin-amps such as the AD620.Since the inputs (i.e., the bases of Q1 and Q2) canoperate at ground (i.e., 0 V or, more correctly, 200 mVbelow ground), it is not possible to provide inputcurrent compensation for the AD623. However, theinput bias current of the AD623 is still very small: only25 nA max.GC3-17The output voltage at Pin 6 is measured with respectto the reference potential at Pin 5. The impedance of thereference pin is 100 k. Internal ESD clamping diodesallow the input, reference, output, and gain terminalsof the AD623 to safely withstand overvoltages of 0.3 Vabove or below the supplies. This is true for all gains,and with power on or off. This last case is particularlyimportant, since the signal source and the in-amp maybe powered separately. If the overvoltage is expected toexceed this value, the current through these diodes shouldbe limited to 10 mA, using external current limitingresistors (see Input Protection Basics for ADI In-Ampssection in Chapter 5). The value of these resistors isdefined by the in-amp’s noise level, the supply voltage,and the required overvoltage protection needed.The bandwidth of the AD623 is reduced as the gainis increased since A1 and A2 are voltage feedback opamps. However, even at higher gains, the AD623 stillhas enough bandwidth for many applications.+IN3–IN2+V S71.5A+Q1 – A150k 50k 50k4 1––V SGAINA3RESISTOR++V S 8750k 50k 50k1.5A–A2+Q24–V SOUTPUT6REF5Figure 3-42. AD623 simplified schematic.The AD623’s gain is resistor-programmed by R Gor more precisely by whatever impedance appearsbetween Pins 1 and 8. Figure 3-43 shows the gain vs.frequency of the AD623. The AD623 is laser-trimmedto achieve accurate gains using 0.1% to 1% toleranceresistors.

7060V REF = 2.5V12011050100x1000GAIN (dB)403020100CMR (dB)90807060x10x1x100–1050–2040V REF = 2.5V–30100 1k 10k 100k 1MFREQUENCY (Hz)Figure 3-43. AD623 closed-loop gainvs. frequency.Table 3-3. Required Value of Gain ResistorDesired 1% Std. Calculated GainGain Value of R G () Using 1% Resistors2 100 k 25 24.9 k 5.0210 11 k 10.0920 5.23 k 20.1233 3.09 k 33.3640 2.55 k 40.2150 2.05 k 49.7865 1.58 k 64.29100 1.02 k 99.04200 499 201.4500 200 5011000 100 1001Table 3-3 shows required values of R G for various gains.Note that for G = 1, the R G terminals are unconnected(R G = ). For any arbitrary gain, R G can be calculatedusing the formulaR G = 100 k/(G – 1)Figure 3-44 shows the AD623’s CMR vs. frequency.Note that the CMR increases with gain up to a gain of100 and that CMR also remains high over frequency, upto 200 Hz. This ensures the attenuation of power linecommon-mode signals (and their harmonics).301 10 100 1k 10k 100kFREQUENCY (Hz)Figure 3-44. AD623 CMR vs. frequency (V S = 5 V).Figure 3-45 shows the gain nonlinearity of the AD623.Figure 3-45. AD623 gain nonlinearity(G = –10, 50 ppm/div).Figure 3-46 shows the small signal pulse response ofthe AD623.3-18Figure 3-46. AD623 small signal pulse response(G = 10, R L = 10 k, C L = 100 pF).

Low Power, Single-Supply In-AmpsThe AD627 is a single-supply, micropower instrumentationamplifier that can be configured for gains between5 and 1000 using just a single external resistor. It providesa rail-to-rail output voltage swing using a single 3 V to30 V power supply. With a quiescent supply current ofonly 60 A (typical), its total power consumption is lessthan 180 W, operating from a 3 V supply.Figure 3-47 is a simplified schematic of the AD627.The AD627 is a true instrumentation amplifier builtusing two feedback loops. Its general properties aresimilar to those of the classic 2-op amp instrumentationamplifier configuration and can be regarded as such,but internally the details are somewhat different. TheAD627 uses a modified current feedback scheme,which, coupled with interstage feedforward frequencycompensation, results in a much better CMRR atfrequencies above dc (notably the line frequency of50 Hz to 60 Hz) than might otherwise be expected ofa low power instrumentation amplifier.As shown in Figure 3-47, A1 completes a feedback loop,which, in conjunction with V1 and R5, forces a constantcollector current in Q1. Assume for the moment thatthe gain-setting resistor (R G ) is not present. ResistorsR2 and R1 complete the loop and force the output ofA1 to be equal to the voltage on the inverting terminalwith a gain of (almost exactly) 1.25. A nearly identicalfeedback loop completed by A2 forces a current in Q2,which is substantially identical to that in Q1, and A2 alsoprovides the output voltage. When both loops are balanced,the gain from the noninverting terminal to V OUTis equal to 5, whereas the gain from the output of A1 toV OUT is equal to –4. The inverting terminal gain of A1REFR1100k+V S(1.25), times the gain of A2 (–4), makes the gain fromthe inverting and noninverting terminals equal.The differential mode gain is equal to 1 + R4/R3,nominally 5, and is factory trimmed to 0.01% finalaccuracy (AD627B typ). Adding an external gain settingresistor (R G ) increases the gain by an amount equal to(R4 + R1)/R G . The gain of the AD627 is given by thefollowing equation:G = + ⎛ ⎞⎝ ⎜ 200 kΩ5 ⎟⎠Laser trims are performed on resistors R1 through R4to ensure that their values are as close as possible tothe absolute values in the gain equation. This ensureslow gain error and high common-mode rejection at allpractical gains.Figure 3-48 shows the AD627’s CMR vs. frequency.CMR (dB)EXTERNAL GAIN RESISTORR225kR GR325k12011010090G = 10008070G = 1006050G = 54030201001 10 100 1k 10k 100kFREQUENCY (Hz)R GFigure 3-48. AD627 CMR vs. frequency.+V SR4100k–IN2k–V SQ1A1Q2–V S2k+INA2OUTPUTR5200kV13-19R6200kFigure 3-47. AD627 simplified schematic.–V S

Figures 3-49 and 3-50 show the AD627’s gain vs.frequency and gain nonlinearity.CLOSED-LOOP GAIN (dB)706050403020100–10–20G = 1000G = 100G = 10G = 5–30100 1k 10k 100kFREQUENCY (Hz)Figure 3-49. AD627 closed-loop gainvs. frequency.Gain-Programmable In-AmpsThe AD8250 and AD8251 (Figure 3-52) are digitally gainprogrammableinstrumentation amplifiers that have high(G) input impedances and low distortion, making themsuitable for sensor interfacing and driving high sample rateanalog-to-digital converters. The two products are nearlyidentical, except for their gain ranges. The AD8250 hasprogrammable gains of 1, 2, 5, and 10, while the AD8251has a range of 1, 2, 4, and 8 (for binary applications). Bothproducts have high bandwidths of 10 MHz, low distortion,and a settling time of 0.5 s to 0.01%. Input offset drift andgain drift are only 1 V/C and 10 ppm/C, respectively. Inaddition to their wide input common-voltage range, theyboast a high common-mode rejection of 80 dB atG = 1 from dc to 100 kHz. The combination of precisiondc performance coupled with high speed capabilities makesthe AD8250 and AD8251 excellent candidates for dataacquisition and medical applications. Furthermore, thesemonolithic solutions simplify design and manufacturing,while boosting their performance, by maintaining a tightmatch of internal resistors and amplifiers.+V SA3–INA1 Figure 3-50. AD627 gain nonlinearity(V S = 2.5 V, G = 5, 4 ppm/vertical division).The AD627 also has excellent dynamic response, asshown in Figure 3-51.Figure 3-51. Small signal pulse response of theAD627 (V S = 5 V, G = +10, R L = 20 k, C L = 50 pF,20 s/horizontal division, 20 mV/vertical division).DGNDWRA1A2+INGAINLOGICA2–V SREFOUTFigure 3-52. AD8250 and AD8251 simplifiedschematic.The AD8250 and AD8251 user interfaces are comprisedof a parallel port that allows users to set the gain in oneof three different ways (Figure 3-52). A 2-bit word sent toA1 and A2 via a bus may be latched using the CLK input.An alternative is to set the gain within 1 s by using thegain port in transparent mode. The last method is to strapA1 and A2 to a high or low voltage potential, permanentlysetting the gain.The AD8250 and AD8251 are available in a 10-leadMSOP package and are specified over the –40C to+125C temperature range, making them an excellentsolution for applications where size and packing densityare important considerations. To simplify matters, theirpinout was chosen to optimize layout and increase acperformance.3-20

Chapter IVMONOLITHIC DIFFERENCE AMPLIFIERSDifference (Subtractor) Amplifier ProductsMonolithic difference amplifiers are a special categoryof in-amps that are usually designed to be used in applicationswhere large dc or ac common-mode voltagesare present. This includes many general current sensingapplications, such as motor control, battery chargers,and power converters. In addition, there are numeroushigh common-mode voltage automotive current sensingapplications, including: battery cell voltage monitoring,transmission controls, fuel injection controls, enginemanagement, suspension controls, electronic steering,electronic parking brake, and hybrid vehicle drive/hybridbattery control. Because these amplifiers are typicallyused to sense current by accurately amplifying the smalldifferential voltage across a shunt resistor in the loadpath, they are often called current shunt amplifiers.Table 4-1 provides a performance summary of AnalogDevices difference amplifier products.Table 4-1. Latest Generation of Analog Devices Difference Amps Summarized 1Power –3 dB CMR Input V OS RTISupply BW G = 10 Offset Drift Noise 2Current Typ (dB) Voltage (V/C) (nV/√Hz)Product Features Typ (G = 10) Min Max Max (G = 10)AD8202 S.S., 28 V CMV, G = 20 250 A 50 kHz 80 3, 4, 5 1 mV 6 10 300 typ 3AD8203 S.S., 28 V CMV, G = 14 250 A 60 kHz 7 80 5, 7 1 mV 6 10 300 typ 7AD8205 S.S., 65 V CMV, G = 50 1 mA 50 kHz 8 80 4, 5, 6 2 mV 6 15 typ 500 typ 8AD8206 S.S., 65 V CMV, G = 20 1 mA 100 kHz 3 76 3, 9 2 mV 6 15 typ 500 typ 3AD8210 S.S., current shunt monitor 500 A 500 kHz 3 100 3, 5 1 mV 6 5 typ 80 typ 3AD8212 Adjustable gain; CMV up to 500 V 10 200 A 500 kHz 90 1 mV 10 100 typAD8213 Dual channel 1.3 mA 11 500 kHz 100 1 mV 10 70 typAD8130 270 MHz receiver 12 mA 270 MHz 83 12, 13 1.8 mV 3.5 mV 12.5 typAD628 High CMV 1.6 mA 600 kHz 15 75 15 1.5 mV 4 300 typ 15AD629 High CMV, G = 1 0.9 mA 500 kHz 77 12 1 mV 6 550 typ 12AD626 High CMV 1.5 mA 100 kHz 55 16 500 V 1 250 typAMP03 High BW, G = 1 3.5 mA 3 MHz 85 12 400 V NS 750 typ 12NOTESNS = not specified, NA = not applicable, S.S. = single supply.1 Refer to ADI website at www.analog.com for latest products and specifications.2 At 1 kHz. RTI noise = √(e ni ) 2 + (e no /G) 2 .3 Operating at a gain of 20.4 For 10 kHz,

The AD8200 family of current sensing difference amplifiershas multiple gain options, which provide designflexibility for the following important trade-offs:1.) The shunt resistance value vs. the power dissipated inthe circuit being measured2.) The shunt resistance value vs. the signal-to-noiseratio3.) The shunt resistance value vs. the amplifier gainneededThe automotive industry standard calls for a gain of 20,which, in most cases, gives an excellent trade-off betweenall three variables. However, there are conditions whichfavor other gains. For example, the AD8203 operates at again of 14. This allows for convenient scaling of the outputto accommodate both 5 V and 3.3 V A/D converters,while still using the same value resistive shunt.Similarly, the AD8205 has a gain of 50, for use inapplications where it is most important to minimize thepower dissipation in the resistive shunt. This higher gainis used with lower resistance shunts, which, of course,have a lower output voltage. This slightly reduces thesignal-to-noise performance of the system.The AD8202 consists of a preamp and buffer arrangedas shown in Figure 4-1. Figure 4-1. AD8202 connection diagram.Figure 4-2 provides more details. The preamp incorporatesa dynamic bridge (subtractor) circuit. Identicalnetworks (within the shaded areas) consisting of R A ,R B , R C , and R G attenuate input signals applied to Pins1 and 8. Note that when equal amplitude signals areasserted at inputs 1 and 8, and the output of A1 is equalto the common potential (i.e., zero), the two attenuatorsform a balanced-bridge network. When the bridge isbalanced, the differential input voltage at A1, and thusits output, will be zero.Any common-mode voltage applied to both inputs willkeep the bridge balanced and the A1 output at zero.Because the resistor networks are carefully matched,the common-mode signal rejection approaches thisideal state. However, if the signals applied to the inputsdiffer, the result is a difference at the input to A1. A1responds by adjusting its output to drive R B , by way ofR G , to adjust the voltage at its inverting input until itmatches the voltage at its noninverting input.+IN –IN8 1R A R A100kR CM RA13 4CM(TRIMMED)A2R F5R BR BA3R FR GR CR CR GAD82022COMFigure 4-2. AD8202 simplified schematic.4-2

By attenuating voltages at Pins 1 and 8, the amplifierinputs are held within the power supply range, even ifthe input levels of Pins 1 and 8 exceed the supply orfall below common (ground). The input network alsoattenuates normal (differential) mode voltages. R Cand R G form an attenuator that scales A1 feedback,forcing large output signals to balance relatively smalldifferential inputs. The resistor ratios establish thepreamp gain at 10.Because the differential input signal is attenuated andthen amplified to yield an overall gain of 10, theamplifier A1 operates at a higher noise gain, multiplyingdeficiencies such as input offset voltage and noise withrespect to Pins 1 and 8.To minimize these errors while extending the commonmoderange, a dedicated feedback loop is employed toreduce the range of common-mode voltage applied toA1 for a given overall range at the inputs. By offsettingthe range of voltage applied to the compensator, theinput common-mode range is also offset to includevoltages more negative than the power supply. AmplifierA3 detects the common-mode signal applied to A1and adjusts the voltage on the matched R CM resistorsto reduce the common-mode voltage range at the A1inputs. By adjusting the common voltage of these resistors,the common-mode input range is extended whilethe normal mode signal attenuation is reduced, leadingto better performance referred to input.The output of the dynamic bridge taken from A1 isconnected to Pin 3 by way of a 100 k series resistor,provided for low-pass filtering and gain adjustment.The resistors in the input networks of the preamp andthe buffer feedback resistors are ratio-trimmed forhigh accuracy.The output of the preamp drives a gain-of-2 bufferamplifier, A2, implemented with carefully matchedfeedback resistors, R F .The two-stage system architecture of the AD8202(Figure 4-2) enables the user to incorporate a low-passfilter prior to the output buffer. By separating the gaininto two stages, a full-scale, rail-to-rail signal from thepreamp can be filtered at Pin 3, and a half-scale signalresulting from filtering can be restored to full scaleby the output buffer amp. The source resistance seenby the inverting input of A2 is approximately 100 k,to minimize the effects of A2’s input bias current.Typically, this current is quite small, and errorsresulting from applications that mismatch the resistanceare correspondingly small. The simplified schematic andtheory of operation given for the AD8202 also applies4-3to the AD8203. The two products are almost identical,except for their internal preset gains and their powerconsumption.AD8205 Difference AmplifierThe AD8205 is a single-supply difference amplifier thatuses a unique architecture to accurately amplify smalldifferential current shunt voltages in the presence ofrapidly changing common-mode voltages. It is offeredin both packaged and die form.In typical applications, the AD8205 is used to measurecurrent by amplifying the voltage across a current shuntplaced across the inputs.The gain of the AD8205 is 50 V/V, with an accuracy of1.2%. This accuracy is guaranteed over the operatingtemperature range of –40C to +125C. The die temperaturerange is –40C to +150C with a guaranteedgain accuracy of 1.3%.The input offset is less than 2 mV referred to the input at25C, and 4.5 mV maximum referred to the input overthe full operating temperature range for the packagedpart. The die input offset is less than 6 mV referred tothe input over the die operating temperature range.The AD8205 operates with a single supply from4.5 V to 10 V (absolute maximum = 12.5 V). Thesupply current is less than 2 mA.High accuracy trimming of the internal resistors allowsthe AD8205 to have a common-mode rejection ratiobetter than 78 dB from dc to 20 kHz. The common-moderejection ratio over the operating temperature is 76 dBfor both the die and the packaged part.The output offset can be adjusted from 0.05 V to 4.8 V(V+ = 5 V) for unipolar and bipolar operation.The AD8205 consists of two amplifiers (A1 and A2), aresistor network, a small voltage reference, and a biascircuit (not shown). See Figure 4-3.R A–INR AGND+INA1R B R B R F R F R D R DR R A2V OUTC CV REF 1AD8205250mVR E R FR REFR REFV REF 2Figure 4-3. AD8205 simplified schematic.

The set of input attenuators preceding A1 consists of R A ,R B , and R C , which reduces the common-mode voltage tomatch the input voltage range of A1. The two attenuatorsform a balanced-bridge network. When the bridge is balanced,the differential voltage created by a common-modevoltage is 0 V at the inputs of A1. The input attenuationratio is 1/16.7. The combined series resistance of R A , R B ,and R C is approximately 200 k 20%.By attenuating the voltages at Pin 1 and Pin 8, the A1amplifier inputs are held within the power supply range,even if Pin 1 and Pin 8 exceed the supply or fall belowcommon (ground). A reference voltage of 250 mVbiases the attenuator above ground. This allowsthe amplifier to operate in the presence of negativecommon-mode voltages.The input network also attenuates normal (differential)mode voltages. A1 amplifies the attenuated signal by 26.The input and output of this amplifier are differential tomaximize the ac common-mode rejection.A2 converts the differential voltage from A1 into a singleendedsignal and provides further amplification. The gainof this second stage is 32.15.The reference inputs, V REF 1 and V REF 2, are tied throughresistors to the positive input of A2, which allows theoutput offset to be adjusted anywhere in the outputoperating range. The gain is 1 V/V from the referencepins to the output when the reference pins are usedin parallel. The gain is 0.5 V/V when they are used todivide the supply.The ratios of Resistors R A , R B , R C , R D , and R F aretrimmed to a high level of precision to allow thecommon-mode rejection ratio to exceed 80 dB. Thisis accomplished by laser trimming the resistor ratiomatching to better than 0.01%.The total gain of 50 is made up of the input attenuationof 1/16.7 multiplied by the first stage gain of 26 and thesecond stage gain of 32.15.The output stage is Class A with a PNP pull-up transistorand a 300 A current sink pull-down.The AD8206 is nearly identical to the AD8205, exceptfor gain and power consumption. Please see the AD8205circuit description for AD8206 theory of operation.The AD8210 is a current shunt monitor IC. Figure 4-4shows the block diagram.The gain of the AD8210 is 20 V/V, with an accuracy of0.7%. This accuracy is guaranteed over the operatingtemperature range of –408C to +1258C.4-4The AD8210 operates with a single supply between4.5 V to 5.5 V. The supply current is typically lessthan 2 mA.The AD8210 is comprised of two main blocks: adifferential amplifier and an instrumentation amplifier. Aload current flowing through the external shunt resistorproduces a voltage at the input terminals. The inputterminals are connected to the differential amplifier (A1)by Resistors R1 and R2. A1 nulls the voltage appearingacross its own input terminals by adjusting (balancing)the current through R1 and R2 with Transistors Q1 andQ2. When the input signal to the AD8210 is zero, thecurrents in R1 and R2 are equal. When the differentialsignal is nonzero, the current increases through oneof the resistors and decreases in the other. The currentdifference is proportional to the size and polarity ofthe input signal. Since the differential input voltage isconverted into a current, common-mode rejection is notdependent on resistor matching; therefore, both highaccuracy and performance are provided throughout thewide common-mode voltage range.The differential currents through QI and Q2 areconverted into a differential voltage due to R3 and R4.A2 is configured as an instrumentation amplifier,and this differential input signal is converted into asingle-ended output voltage by A2. The gain is internallyset with thin-film resistors to 20 V/V.The output reference voltage is easily programmed by theV REF 1 and V REF 2 pins. In a typical configuration, V REF 1is connected to V CC while V REF 2 is connected to GND.In this case, the output is centered at V CC /2 when theinput signal is zero.Q1R1R3I SHUNTR SHUNTGNDA1R2R4Q2V OUT = (I SHUNT × R SHUNT ) × 20AD8210A2V REF 1V REF 2V SV OUTFigure 4-4. AD8210 block diagram.

CMRR (dB)CMRR (dB)140130120110100908070+125°C–40°C60100 1k10k100kFREQUENCY (Hz)+25°CFigure 4-5. AD8210 CMRR vs. frequency andtemperature (common-mode voltage < 5 V).140130120110100908070–40°C+125°C+25°C60100 1k10k100kFREQUENCY (Hz)Figure 4-6. AD8210 CMRR vs. frequency andtemperature (common-mode voltage > 5 V).The AMP03 is a monolithic, unity-gain, 3 MHz differentialamplifier. Incorporating a matched thin-filmresistor network, the AMP03 features stable operationover temperature without requiring expensive externalmatched components. The AMP03 is a basic analogbuilding block for differential amplifier and instrumentationapplications (Figure 4-7).–IN 225kAMP0325k5SENSEThe differential amplifier topology of the AMP03 servesboth to amplify the difference between two signals andto provide extremely high rejection of the common-modeinput voltage. With a typical common-mode rejection of100 dB, the AMP03 solves common problems encounteredin instrumentation design. It is ideal for performingeither the addition or subtraction of two input signalswithout using expensive externally matched precisionresistors. Because of its high CMRR over frequency,the AMP03 is an ideal general-purpose amplifier fordata acquisition systems that must operate in a noisyenvironment. Figures 4-8 and 4-9 show the AMP03’sCMRR and closed-loop gain vs. frequency.CMRR (dB)CLOSED-LOOP GAIN (dB)12011010090807060504030201001 10 100 1k 10k 100k 1MFREQUENCY (Hz)5040302010T A = 25CV S = 15VFigure 4-8. AMP03 CMRR vs. frequency.0–10–20T A = 25CV S = 15V–30100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 4-9. AMP03 closed-loop gainvs. frequency.7–V CC6OUTPUT+IN 325k25k41–V EEREFERENCEFigure 4-7. AMP03 functional block diagram.4-5

Figure 4-10 shows the small signal pulse response ofthe AMP03.10090T A = 25CV S = 15VThe uncommitted amplifier is a high open-loop gain,low offset, low drift op amp, with its noninverting inputconnected to the internal 10 kV resistor. Both inputs areaccessible to the user.Careful layout design has resulted in exceptionalcommon-mode rejection at higher frequencies. Theinputs are connected to Pin 1 (+IN) and Pin 8 (–IN),which are adjacent to the power pins, Pin 2 (–V S ) andPin 7 (+V S ). Because the power pins are at ac ground,input impedance balance and, therefore, common-moderejection are preserved at higher frequencies.050mV1sFigure 4-10. AMP03 small signal pulse response.The AD628 is a high common-mode voltage differenceamplifier, combined with a user-configurable outputamplifier (see Figure 4-11 and Figure 4-12). Differentialmode voltages in excess of 120 V are accurately scaled bya precision 11:1 voltage divider at the input. A referencevoltage input is available to the user at Pin 3 (V REF ).The output common-mode voltage of the differenceamplifier is the same as the voltage applied to the referencepin. If the uncommitted amplifier is configured forgain, connecting Pin 3 to one end of the external gainresistor establishes the output common-mode voltageat Pin 5 (OUT).–IN+IN81100k100kG = +0.1–INA1+IN10k10k3V REF10kR G64C FILT–INA2+IN5OUTFigure 4-11. AD628 simplified schematic.The output of the difference amplifier is internallyconnected to a 10 kV resistor trimmed to better than60.1% absolute accuracy. The resistor is connectedto the noninverting input of the output amplifier andis accessible to the user at Pin 4 (C FILT ). A capacitorcan be connected to implement a low-pass filter, aresistor can be connected to further reduce the outputvoltage, or a clamp circuit can be connected to limitthe output swing.–IN+IN+V S7 4100k 10k8G = +0.1–IN10kA1+IN+INA2–IN100k110k236–V S V REF R GREFERENCEVOLTAGER EXT2AD628R EXT3C FILTR EXT1OUT5Figure 4-12. AD628 circuit connections.Gain AdjustmentThe AD628 system gain is provided by an architectureconsisting of two amplifiers. The gain of the input stageis fixed at 0.1; the output buffer is user-adjustable asG A2 = 1 + R EXT1 /R EXT2 .GTOTAL⎛ R ⎞EXT 1= 0.1× +⎝⎜1 R ⎠ ⎟EXT 2At 2 nA maximum, the input bias current of the bufferamplifier is very low, and any offset voltage induced atthe buffer amplifier by its bias current may normallybe neglected (2 nA 3 10 kV = 20 mV). However, toabsolutely minimize bias current effects, R EXT1 andR EXT2 can be selected so that their parallel combinationis 10 kV. If practical resistor values force theparallel combination of R EXT1 and R EXT2 below 10 kV,a series resistor (R EXT3 ) can be added to make up forthe difference. Table 4-2 lists several values of gain andcorresponding resistor values.4-6

Table 4-2. Nearest Standard 1% Resistor Valuesfor Various Gains (See Figure 4-12)Total Gain A2 Gain R EXT1 R EXT2 R EXT3(V/V) (V/V) (V) (V) (V)0.1 1 10 k 00.2 2 20 k 20 k 00.25 2.5 25.9 k 18.7 k 00.5 5 49.9 k 12.4 k 01 10 100 k 11 k 02 20 200 k 10.5 k 05 50 499 k 10.2 k 010 100 1 M 10.2 k 0To set the system gain to less than 0.1, an attenuatorcan be created by placing a resistor, R EXT4 , fromPin 4 (C FILT ) to the reference voltage. A dividerwould be formed by the 10 kV resistor, which is inseries with the positive input of A2 and R EXT4 . A2would be configured for unity gain.Using a divider and setting A2 to unity gain yieldsCMRR (dB)GW / DIVIDER.130120110100908070605040REXT= 0 1 ⎛4×⎝⎜10kΩ+ RV S = 15VEXT 4⎞⎠⎟ × 13010 1001k 10k 100kFREQUENCY (Hz)V S = 2.5VFigure 4-13. AD628 CMRR vs. frequency.For extensive coverage of AD628 applications circuits,refer to Chapter 6 of this guide.GAIN (dB)6050403020100–10–20–30G = +100G = +10G = +1G = +0.1–40100 1k 10k 100k 1M 10MFREQUENCY (Hz)Figure 4-14. AD628 small signal frequencyresponse, V OUT = 200 mV p-p, G = +0.1, +1, +10,and +100.GAIN (dB)6050403020100–10–20–30G = +100G = +10G = +1G = +0.1–4010 100 1k 10k 100k 1MFREQUENCY (Hz)Figure 4-15. AD628 large signal frequencyresponse, V OUT = 20 V p-p, G = +0.1, +1, +10,and +100.The AD626 is a single- or dual-supply differentialamplifier consisting of a precision balanced attenuator,a very low drift preamplifier (A1), and an outputbuffer amplifier (A2). It has been designed so thatsmall differential signals can be accurately amplifiedand filtered in the presence of large common-modevoltages (much greater than the supply voltage) withoutthe use of any other active components.4-7

+V SFILTER+IN–INR1200kC15pFR2200kR341kC25pFR441kA1R910kR12100kR1795kAD626A2R1510kOUTR1110kR6500R54.2kR7500R810kR1010kR14555R1310kGND GAIN = 100Figure 4-16. AD626 simplified schematic.–V SFigure 4-16 shows the main elements of the AD626.The signal inputs at Pins 1 and 8 are first applied to dualresistive attenuators, R1 through R4, whose purpose isto reduce the peak common-mode voltage at the inputto the preamplifier—a feedback stage based on the verylow drift op amp A1. This allows the differential inputvoltage to be accurately amplified in the presence oflarge common-mode voltages—six times greater thanthat which can be tolerated by the actual input to A1. Asa result, the input common-mode range extends to sixtimes the quantity (V S – 1 V). The overall common-modeerror is minimized by precise laser trimming of R3 andR4, thus giving the AD626 a common-mode rejectionratio of at least 10,000:1 (80 dB). The output of A1 isconnected to the input of A2 via 100 k (R12) resistorto facilitate the low-pass filtering of the signal of interest.The AD626 is easily configured for gains of 10 or 100. Fora gain of 10, Pin 7 is simply left unconnected; similarly,for a gain of 100, Pin 7 is grounded. Gains between 10and 100 are easily set by connecting a resistor betweenPin 7 and analog GND. Because the on-chip resistorshave an absolute tolerance of 20% (although they areratio matched to within 0.1%), at least a 20% adjustmentrange must be provided. The nominal value for this gainsetting resistor is equal to⎛ 50, 000 ΩR =⎞⎝ GAIN −10⎠ − 555 Ω10090100%500mV20sFigure 4-17. The large signal pulseresponse of the AD626. G = 10.Figure 4-17 shows the large signal pulse response ofthe AD626.The AD629 is a unity-gain difference amplifier designedfor applications that require the measurement of signalswith common-mode input voltages of up to 270 V.The AD629 keeps error to a minimum by providingexcellent CMR in the presence of high common-modeinput voltages. Finally, it can operate from a wide powersupply range of 2.5 V to 18 V.The AD629 can replace costly isolation amplifiersin applications that do not require galvanic isolation.Figure 4-18 is the connection diagram of theAD629. Figure 4-19 shows the AD629’s CMR vs.frequency.4-8

CMR (dB)21.1k AD629REF A 18 NC380k 380k–IN 27 +V S380k –+IN 36 OUTPUT+–V S 45 REF B20k100959085807570656055NC = NO CONNECTFigure 4-18. AD629 connection diagram.5020 100 1k 10k 20kFREQUENCY (Hz)Figure 4-19 AD629 common-mode rejectionvs. frequency.High Frequency Differential Receiver/AmplifiersAlthough not normally associated with difference amplifiers,the AD8130 series of very high speed differentialreceiver/amplifiers represent a new class of productsthat provide effective common-mode rejection at VHFfrequencies. The AD8130 has a –3 dB bandwidth of270 MHz, an 80 dB CMR at 2 MHz, and a 70 dB CMRat 10 MHz.1V IN8REF 4FB5PD3+V S72–V S6V OUTFigure 4-20. AD8130 block diagram.Figure 4-20 is a block diagram of the AD8130. Its designuses an architecture called active feedback, which differsfrom that of conventional op amps. The most obviousdifferentiating feature is the presence of two separatepairs of differential inputs compared to a conventionalop amp’s single pair. Typically for the active feedbackarchitecture, one of these input pairs is driven by adifferential input signal, while the other is used for thefeedback. This active stage in the feedback path is wherethe term active feedback is derived. The active feedbackarchitecture offers several advantages over a conventionalop amp in several types of applications. Among these areexcellent common-mode rejection, wide input commonmoderange, and a pair of inputs that are high impedanceand totally balanced in a typical application.COMMON-MODE REJECTION (dB)–30–40–50–60–70–80–90–100–110V S = 2.5VV S = 5V, 12V–12010k100k 1M 10M100MFREQUENCY (Hz)Figure 4-21. AD8130 CMR vs. frequency.4-9

In addition, while an external feedback networkestablishes the gain response as in a conventionalop amp, its separate path makes it totally independent ofthe signal input. This eliminates any interaction betweenthe feedback and input circuits, which traditionally causesproblems with CMRR in conventional differential-inputop amp circuits.321V S = 2.5VGAIN (dB)0–1–2–3–4–5–6V S = 5VV S = 12V–71 10 100400FREQUENCY (MHz)Figure 4-22. AD8130 frequency responsevs. gain and supply voltage.Figure 4-21 shows the CMR vs. frequency of theAD8130. Figure 4-22 shows its gain vs. frequency forvarious supply voltages.4-10

Chapter VAPPLYING IN-AMPS EFFECTIVELYDual-Supply OperationThe conventional way to power an in-amp has beenfrom a split or dual polarity power supply. This hasthe obvious advantage of allowing both a positive anda negative input and output swing.Single-Supply OperationSingle-supply operation has become an increasinglydesirable characteristic of a modern in-amp. Manypresent day data acquisition systems are powered froma single low voltage supply. For these systems, thereare two vitally important characteristics. First, thein-amp’s input range should extend between the positivesupply and the negative supply (or ground). Second, theamplifier’s output should be rail-to-rail as well.The Need for True R-R Devices in Low Voltage,Single-Supply IA CircuitsSometimes problems arise when designers forgetabout amplifier headroom and use standard (nonrail-to-rail) products in low voltage, single-supplyin-amp applications. Many dual-supply in-amps willonly have an output swing within about 2 V of eitherrail. However, even the very best cannot swing asclose to the rails as a single-supply device.A good quality rail-to-rail in-amp, such as the AD623, canswing its output to within 0.5 V of the supply and within0.1 V above ground. Its input voltage range is similar.Note that these numbers are conservative: with very lightoutput loading the performance is even better. So, whenusing a 5 V single supply, the amplifier has at least a 4 Voutput swing, in many cases, more than that.In the example shown in Figure 5-1, the p-p output swingwould only be about 1 V p-p for a standard product vs.4 V p-p or more for a rail-to-rail in-amp.Power Supply Bypassing, Decoupling, andStability IssuesPower supply decoupling is an important detail thatis often overlooked by designers. Normally, bypasscapacitors (values of 0.1 F are typical) are connectedbetween the power supply pins of each IC and ground.Although usually adequate, this practice can be ineffectiveor even create worse transients than no bypassing at all.It is important to consider where the circuit’s currentsoriginate, where they will return, and by what path. Oncethat has been established, bypass these currents aroundground and other signal paths.In general, like op amps, most monolithic in-amps havetheir integrators referenced to one or both power supplylines and should be decoupled with respect to the outputreference terminal. This means that for each chip, a bypasscapacitor should be connected between each power supplypin and the point on the board where the in-amp’s referenceterminal is connected, as shown in Figure 5-2. –IN+IN+V S +V SR-RV OUT+V SIN-AMP2GNDFigure 5-1. A modern rail-to-rail in-amp canswing more than 4 V p-p with a 5 V supply, butthis is NOT possible using a standard dualsupplydevice. Note that the in-amp’s V REF pinwould normally be set at V S /2 for maximumoutput swing.5-1 Figure 5-2. Recommended method forpower supply bypassing.For a much more comprehensive discussion of theseissues, refer to Application Note AN-202, An IC AmplifierUser’s Guide to Decoupling, Grounding, and MakingThings Go Right for a Change, by Paul Brokaw, on theADI website at www.analog.com.

THE IMPORTANCE OF AN INPUT GROUNDRETURNAC coupling is an easy way to block dc voltages thatare present at the in-amp’s inputs. But ac coupling intoa high impedance in-amp input without providing a dcreturn renders the circuit nonfunctional! This is one ofthe most common applications problems that arises whenusing in-amp circuits. Figure 5-3 shows two common(incorrect) arrangements.THESE CIRCUITS WILL NOT WORK!+V SC1 I B1–INR1C2 IIN-AMPB2+INR2–V SV OS = (I B1 R 1 ) – (I B1 R 2 )V OUTREFERENCEINPUTAB–IN+INC1C2+V SIN-AMP–V STRANSFORMER COUPLEDWITH NO DC RETURNV OUTFigure 5-4. A high value resistor betweeneach input and ground provides an effectivedc return path (see Table 5-1).This is a simple and practical solution for dual-supplyin-amp circuits. The resistors allow a discharge path forinput bias currents. Now both inputs are referenced toground. There will be a small offset voltage error due tothe mismatch between the input bias currents flowingthrough the two nonidentical resistors. To avoid errorsdue to an R1/R2 mismatch, a third resistor, about onetenththeir value, can be connected between the twoin-amp inputs.Figure 5-5 shows the recommended dc return for atransformer-coupled input.– INPUT+V SFigure 5-3. Nonfunctional, ac-coupledin-amp circuits.In Figure 5-3A, the input bias currents will charge upthe ac coupling capacitors until the input common-modevoltage is exceeded. In other words, the caps will chargeup to the supply line or down to ground dependingon the direction of the input bias currents. Now, witha FET input device, and very large capacitors, it couldtake several minutes before the in-amp is rendered inoperative.As a result, a casual lab test might not detectthis problem, so it’s very important to avoid it altogether.Figure 5-3B shows a transformer-coupled input with nocenter tap or other means for a dc return; so, the sameproblem occurs.A simple solution for the circuit in Figure 5-3A is to adda high value resistance (R1, R2) between each input andground, as shown in Figure 5-4. The input bias currentscan now flow freely to ground and do not build up a largeinput offset as before.R G+ INPUTIN-AMPLOADREFERENCE–V STO POWERSUPPLYGROUNDV OUTFigure 5-5. Recommended dc return pathfor a transformer-coupled input.For transformers without a center tap, two resistors, onefrom each input pin to ground, can be used to providea dc return path.5-2

Providing Adequate Input and Output Swing(“Headroom”) When AC Coupling a Single-SupplyIn-AmpAC coupling using an in-amp powered by a singlesupply is more complicated than dual-supply operationand normally requires applying a dc common-modevoltage, V CM , to both inputs, as shown in Figure 5-6.This is necessary because the internal buffer amplifiersof a typical 3-op amp in-amp cannot swing more thana few millivolts below the negative supply (in this caseground) without clipping the signal. In addition, theoutput can never swing below the negative supply. Figure 5-6. An ac-coupled, single-supply,in-amp circuit. For maximum dynamic range,set V CM to the center of the maximum inputrange. V REF is typically set to V S /2.Choosing appropriate voltages for V CM and V REF is animportant design consideration, especially in low supplyvoltage applications. In general terms, V CM should beset to the middle of the expected input dynamic range,while V REF should be centered on the expected outputdynamic rage. As an example, say the input signal(the difference between +IN and –IN) is expected tobe between +1 V and –2 V. Under these conditions,the in-amp’s input buffers will need to swing bothpositive and negative with respect to ground. Assumethe in-amp is operating at unity gain, V CM can be set to+2 V (or a bit higher), which will allow 2 V of headroomin the minus direction. The trade-off is that there is now2 V less swing in the positive direction. If the in-amp isoperating with gain, V CM needs to be tailored to allowthe buffer outputs to swing fully without clipping (thatis, without exceeding their maximum voltage swing ineither direction).Output centering is similar: estimate the amount and thedirection of the in-amp’s output swing (in most cases thiswill be V IN 3 gain + V REF ) and then apply a referencevoltage at V REF that is in the center of that range.Selecting and Matching RC Coupling ComponentsIn ac-coupled applications, selecting values for thecapacitors and dc return resistors is a trade-off between–3 dB bandwidth, noise, input bias current, and thephysical size of the capacitors. RC components should bereasonably matched so that the time constant of R1/C1is close to that of R2, C2. Otherwise, a common-modevoltage can be converted into a differential error.Higher value input capacitors provide greater lowfrequency bandwidths and allow smaller value inputresistors. But these caps are physically larger, requiringmore board space. As a rule, capacitors largerthan 0.1 microFarad need to be polarized types such astantalums to keep their size manageable. But polarizedcaps require a known, constant polarity dc voltage tokeep them properly biased.Smaller cap values require higher value input resistorswhich have higher noise. And with larger input resistors,dc offset voltage errors also become larger. So, there isalways a trade-off that needs to be made here.Since (I B1 R 1 ) – (I B2 R 2 ) = DV OS , any mismatch betweenR1 and R2 will cause an input offset imbalance(I B1 – I B2 ). The input bias currents of Analog Devicesin-amps vary widely, depending on input architecture.However, the vast majority have maximum input biascurrents between 1.5 nA and 10 nA. A good guidelineis to keep I B R < 10 mV.5-3

Table 5-1. Recommended Component Valuesfor AC Coupling In-Amp InputsInput Bias V OS V OS ErrorRC Coupling Components Current at Each for 2%–3 dB BW C1, C2 R1, R2 (IB) Input R1, R2 Mismatch2 Hz 0.1 F 1 M 2 nA 2 mV 40 V2 Hz 0.1 F 1 M 10 nA 10 mV 200 V30 Hz 0.047 F 115 k 2 nA 230 V 5 V30 Hz 0.1 F 53.6 k 10 nA 536 V 11 V100 Hz 0.01 F 162 k 2 nA 324 V 7 V100 Hz 0.01 F 162 k 10 nA 1.6 mV 32 V500 Hz 0.002 F 162 k 2 nA 324 V 7 V500 Hz 0.002 F 162 k 10 nA 1.6 mV 32 VTable 5-1 gives typical R and C cookbook values for accoupling using 1% metal film resistors and two valuesof input bias current.Properly Driving an In-Amp’s Reference InputAnother common applications problem occurs whena high impedance source is used to drive an in-amp’sreference terminal. In the example shown in Figure 5-7,R2’s added resistance unbalances the otherwise closelymatched resistors in subtractor amplifier A3. A resistordivider is shown here, but the same problem is createdwith any input source that is even a small percentage ofR REF . This results in both a CMR error and a referencevoltage error.V IN –A1IN-AMPSUBTRACTORA CMR error is introduced because R REF 2 no longerequals R REF 1 (R2 is in series). Note that R REF 1 and R REF 2are not always equal but that introducing any significantseries resistance between the V REF terminal and groundwill unbalance A3 and cause a CMR error. A referencevoltage error is also produced because R2 becomesloaded by the in-amp’s finite reference impedance.R REFIN-AMP– +REFERENCEINPUTOP AMPBUFFERR2R1EXTERNALVOLTAGEDIVIDEREXTERNALREFERENCEVOLTAGE2A36V OUTFigure 5-8. A simple op amp buffer provides alow impedance for driving an in-amp’s input.V IN +A2R REF 1 R REF 2REFERENCEINPUTPROBLEM: R2’s RESISTANCECAUSES CMR ERROR AND R REF 1AND R REF 2 ARE NOW UNBALANCED.AN ADDITIONAL VOLTAGEREFERENCE ERROR IS INTRODUCEDBY THE SHUNTING OF R2 BY R REF 1AND R REF 2.3EXTERNALVOLTAGEDIVIDERR1R2EXTERNALREFERENCEVOLTAGEFigure 5-8 shows a simple solution to this problem.An op amp buffer is added between the voltage divider(or other high-Z source) and the in-amp’s referenceterminal. Now, the in-amp only sees the very lowoutput impedance of the op amp, which typically ismuch less than one ohm.Many other solutions are possible, as long as the impedancedriving the reference terminal is kept very low.Figure 5-7. When using this simple voltagedivider, R REF 1 and R REF 2 are now unbalanced,which introduces a large CMR error in A3.5-4

Cable TerminationWhen in-amps are used at frequencies above a few hundredkilohertz, properly terminated 50 or 75 coaxialcable should be used for input and output connections.Normally, cable termination is simply a 50 or 75 resistor connected between the cable center conductor,and its shield is at the end of the coaxial cable. Note thata buffer amplifier may be required to drive these loadsto useful levels.Input Protection BasicsFor ADI In-AmpsInput Protection from ESD and DC OverloadAs interface amplifiers for data acquisition systems,instrumentation amplifiers are often subjected to inputoverloads, i.e., voltage levels in excess of their full scalefor the selected gain range or even in excess of the supplyvoltage. These overloads fall into two general classes:steady state and transient (ESD, etc.), both of whichoccur for only a fraction of a second. With 3-op ampin-amp designs, when operating at low gains (10 orless), the gain resistor acts as a current-limiting elementin series with their resistor inputs. At high gains, thelower value of R G may not adequately protect theinputs from excessive currents.Standard practice is to place current-limiting resistorsin each input, but adding this protection also increasesthe circuit’s noise level. A reasonable balance needs to befound between the protection provided and the increasedresistor (Johnson) noise introduced. Circuits usingin-amps with a relatively high noise level can toleratemore series protection without seriously increasingtheir total circuit noise.Of course, the less added noise the better, but a goodguideline is that circuits needing this extra protectioncan easily tolerate resistor values that generate 30% ofthe total circuit noise. For example, a circuit using anin-amp with a rated noise level of 20 nV/√Hz can toleratean additional 6 nV/√Hz of Johnson noise.Use the following cookbook method to translate thisnumber into a practical resistance value. The Johnsonnoise of a 1 k resistor is approximately 4 nV/√Hz. Thisvalue varies as the square root of the resistance. So,a 20 k resistor would have √20 times as much noiseas the 1 k resistor, which is 17.88 nV/√Hz (4.4721 34 nV/√Hz). Because both inputs need to be protected,two resistors are needed, and their combined noise willadd as the square root of the number of resistors (theroot sum of squares value). In this case, the total addednoise from the two 20 k resistors will be 25.3 nV/√Hz(17.88 3 1.414).Figure 5-9 provides details on the input architectureof the AD8221 in-amp. As shown, they have internal400 resistors that are in series with each inputtransistor junction.–IN+V S +V S+V S +V S400–V SQ1R GQ2–V S400+IN6mA MAX INPUT CURRENTFigure 5-9. AD8221 in-amp input circuit.The AD8221 was designed to handle maximuminput currents of 6 mA steady state (or dc), at roomtemperature. Its internal resistors and diodes willprotect the device from input voltages 0.7 V abovethe positive supply, or 2.4 V more negative thanthe minus supply (6 mA 0.4 k). Therefore, for15 V supplies, the maximum safe input level is+15.7 V, –17.4 V. Additional external series resistorscan be added to increase this level considerably, at theexpense of a higher circuit noise level.The AD8221 in-amp is a very low noise device, with amaximum (e NI ) 8 nV/√Hz. A single 1 k resistor willadd approximately 4 nV/√Hz of Johnson noise. Theaddition of this resistor would raise the maximumdc level to approximately 22.5 V above each supply or37.5 V with 15 V supplies.–IN400+V S +V S+V S +V S–V SQ1R GQ26mA MAX INPUT CURRENT–V S400+INFigure 5-10. AD8222 and AD8225 in-ampinput circuit.The AD8222 and AD8225 have a very similar inputsection to that of the AD8221. Except that now, all sixdiodes are located on the Q1/Q2 side of the 400 inputresistor (see Figure 5-10).5-5

Figure 5-11 shows the input section of the AD620 series(AD620, AD621, and AD622) in-amps. This is verysimilar to that of the AD8221: Both use a 400 resistorin series with each input, and both use diode protection.The chief differences are the four additional AD8221diodes. One set is tied between each input and thepositive supply, and the other set is connected betweenthe base of each input transistor and the negative supply.The AD620 uses its 400 internal resistor and a singleset of diodes to protect against negative input voltages.For positive voltage overloads, it relies on its own baseemitterinput junction to act as the clamping diode.+V S +V Scase, adding two 5 k resistors will raise the circuit’snoise approximately 13 nV/√Hz (30 percent) but wouldprovide an additional 100 V of transient overloadprotection.Figure 5-13 shows the input architecture of the AD623in-amp. In this design, the internal (ESD) diodes arelocated before the input resistors and, as a consequence,provide less protection than the designs previouslydiscussed. The AD623 can tolerate 10 mA maximuminput current, but in many cases, some external seriesresistance will be needed to keep input current belowthis level.+V S +V S+V S +V S–IN400Q1Q2400+IN–IN1kQ1Q21k+IN–INR G6mA MAX INPUT CURRENTFigure 5-11. AD620 series (AD620, AD621,and AD622) in-amp input circuit.2k+V S +V S+V S +V SQ1200kQ22k+IN–V S –V–V SS –V S6mA MAX INPUT CURRENTFigure 5-12. AD627 in-amp input circuit.The AD627 can tolerate 20 mA transient input currents(Figure 5-12). In addition, it has built-in 2 k resistorsand can handle input voltages 40 volts higher than itssupply lines (20 mA 3 2 k). This level of protectionis quite beneficial. Because of its low power, many ofthe AD627’s applications will use a low voltage singlepower supply. If even more protection is needed, quitelarge external resistors can be added without seriouslydegrading the AD627’s 38 nV/√Hz noise level. In this–V S –V S–V S –V S10mA MAX INPUT CURRENTFigure 5-13. AD623 in-amp input circuit.Since the AD623’s device noise is approximately35 nV/√Hz, up to 5 k of external resistance can beadded here to provide 50 V of dc overload protection,while only increasing input noise to 38 nV/√Hz total.Figure 5-14 shows the simplified input circuitry for theAD8230 zero-drift in-amp. As shown, the AD8230 onlyhas a single ESD diode connected between each inputand the negative supply line. This diode offers ESDprotection for negative pulses larger than 0.7 below thenegative supply. However, it was not designed to protectthe in-amp against positive voltage transients or longduration voltage overloads in either direction. To protectagainst these, external low leakage diodes and resistorsare needed, as shown in Figure 5-20.–IN160160+INGDSQ1DQ2S–V S –V S6mA MAX INPUT CURRENTFigure 5-14. AD8230 in-amp input circuit.G5-6

Figure 5-15 is a simplified diagram showing the inputstructure for the AD8220 JFET in-amp. The input circuithas a very high impedance: typically 1000 GV and 6 pF.There are two ESD protection diodes at each input butno internal series resistance between the input terminalsand the JFET input stage. Therefore, external resistorsneed to be added to limit the current in applicationssubject to an input overvoltage condition.+V S +V S–INV CCV CC V CC190190M1 M2+IN–IN+V S +V S–V S–V S5mA MAX INPUT CURRENT+INFigure 5-15. AD8220 in-amp input circuit.Figure 5-16 shows a simplified version of the AD8250input circuitry. Here, two internal resistors and two diodesprotect each input. The AD8250 can tolerate maximumsustained input currents of 20 mA. Note that there aretwo pairs of input protection resistors—one between eachinput and the two ESD diodes, and the other betweenthese diodes and the transistor base. This offers moreprotection to the transistor bases than to the ESD diodes.Therefore, designers should take precautions to protectthe ESD diodes from being destroyed.5mA MAX INPUT CURRENTFigure 5-17. AD8553 in-amp simplified input circuit.Figure 5-17 shows the input section of the AD8553zero drift in-amp. This has a 190 V internal protectionresistor between each input pin and the diode clampingcircuitry.The maximum input current of the AD8553 is approximately5 mA, so additional external resistance may beneeded in some applications (see table 5-2).Also note that when the input voltage approachesV CC – 0.2 V (outside the input common-mode range),current will begin to flow into the inputs of theAD8553. If the enable pin is also held low duringthis period of time, the output of the AD8553 willno longer be high impedance. In some applications,multiple AD8553 instrumentation amplifier outputscan be connected together to mux many inputs toone output. In these applications, only one AD8553enable pin will be high, while all of the other AD8553enable pins will be low.+V S+V S+V S+V S–IN200 100100 200+IN–V S–V S20mA MAX INPUT CURRENTFigure 5-16. AD8250 in-amp input circuit.5-7

If an input overload voltage of V CC – 0.2 V or greateroccurs on any of the AD8553 instrumentation amplifierinputs while its enable pin is low, the output of thatamplifier can overload the AD8553 that is driving theoutput (enable pin is high).The AD8555 and AD8556 products are instrumentationamplifiers designed to be used in sensor applications.Figure 5-18 is a simplified input circuit for the AD8555.Here, protection diodes are connected between eachinput terminal and the supplies. The input signal thentravels through a series resistor before arriving at theamplification and switching circuitry.–IN+V S–V S388+V S+V S5mA MAX INPUT CURRENT388–V S+INFigure 5-18. AD8555 in-amp simplified input circuit.The AD8556 input circuitry (Figure 5-19) is very similarto that of the AD8555, except that there is a larger valueresistor (3.6 kV) and other components between thediode and the amplifying and switching circuitry. Theseprovide an internal RFI/EMI filtering capability.Because the input circuitry in both products lacks aninternal resistor, before the first set of clamping diodes,some external resistance is usually necessary to ensureadequate overvoltage protection.Table 5-2 provides recommended series protection resistorvalues for a 10% or 40% increase in circuit noise.Table 5-2. Recommended SeriesProtection Resistor ValuesRecommendedMax External ProtectionIn-Amp Input Resistors AddingNoise Overload Additional Noise*Device (e NI ) Current of 10% of 40%AD8220 15 nV/√Hz 5 mA 1.74 k 6.98 kAD8221 8 nV/√Hz 6 mA 500 2.0 kAD8222 8 nV/√Hz 6 mA 500 2.0 kAD8225 8 nV/√Hz 6 mA 500 2.0 kAD8230 160 nV/√Hz 6 mA 4.99 k 4.99 kAD8250 13 nV/√Hz 20 mA 1.30 k 5.23 kAD8251 13 nV/√Hz 20 mA 1.30 k 5.23 kAD8553 30 nV/√Hz 5 mA 6.98 k 28.0 kAD8555 32 nV/√Hz 5 mA 8.06 k 32.4 kAD8556 32 nV/√Hz 5 mA 8.06 k 32.4 kAD620 9 nV/√Hz 6 mA 634 2.55 kAD621 9 nV/√Hz 6 mA 634 2.55 kAD622 9 nV/√Hz 6 mA 634 2.55 kAD623 35 nV/√Hz 10 mA 9.53 k 38.3 kAD627 38 nV/√Hz 20 mA 11.3 k 45.3 k*This noise level is for two resistors, one in series witheach input.Adding External Protection DiodesDevice input protection may be increased with theaddition of external clamping diodes as shown inFigure 5-20. As high current diodes are used, inputprotection is increased, which allows the use of muchlower resistance input protection resistors that, in turn,reduces the circuit’s noise.Unfortunately, most ordinary diodes (Schottky, silicon,etc.) have high leakage currents that will cause large offseterrors at the in-amp’s output; this leakage increasesexponentially with temperature. This tends to rule outthe use of external diodes in applications where thein-amp is used with high impedance sources.+V S+V S+V S–IN–V S3.6k3.6k–V S+IN13pF5pF13pF–V S–V S5mA MAX INPUT CURRENTFigure 5-19. AD8556 simplified input circuit.5-8

Specialty diodes with much lower leakage are available,but these are often difficult to find and are expensive.For the vast majority of applications, limiting resistorsalone provide adequate protection for ESD and longerduration input transients.–IN+IN–V SRLIMRLIM+V SD1D2D3D4R G0.33F+V SIN-AMP0.01FV OUT+V S 0.33F –V 0.01FSD1–D4 ARE INTERNATIONAL RECTIFIER SD101 SERIESFAST SCHOTTKY BARRIER RECTIFIERSFigure 5-20. Using external componentsto increase input protection.Despite their limitations, external diodes are oftenrequired in some special applications, such as electricshock defibrillators, which utilize short duration, highvoltage pulses. The combination of external diodes andvery large input resistors (as high as 100 k) may beneeded to adequately protect the in-amp.It is a good idea to check the diodes’ specifications toensure that their conduction begins well before thein-amp’s internal protection diodes start drawing current.Although they provide excellent input protection,standard Schottky diodes can have leakage up to severalmA. However, as in the example of Figure 5-20, fastSchottky barrier rectifiers, such as the internationalrectifier type SD101 series, can be used; these deviceshave 200 nA max leakage currents and 400 mW typicalpower dissipation.ESD and Transient Overload ProtectionProtecting in-amp inputs from high voltage transients andESD events is very important for a circuit’s long-termreliability. Power dissipation is often a critical factor,as input resistors, whether internal or external, mustbe able to handle most of the power of the input pulsewithout failing.ESD events, while they may be very high voltage, areusually of very short duration and are normally one-timeevents. Since the circuit has plenty of time to cool downbefore the next event occurs, modest input protection issufficient to protect the device from damage.On the other hand, regularly occurring short durationinput transients can easily overheat and burn out theinput resistors or the in-amps input stage. A 1 k resistor,in series with an in-amp input terminal drawing20 mA, will dissipate 0.4 W, which can easily be handledby a standard 0.5 W or greater surface-mount resistor.If the input current is doubled, power consumptionquadruples as it increases as the square of the inputcurrent (or as the square of the applied voltage).Although it is a simple matter to use a higher power protectionresistor, this is a dangerous practice, as the powerdissipation will also increase in the in-amp’s input stage.This can easily lead to device failure (see the precedingsection on input protection basics for input currentlimitations of ADI in-amps). Except for ESD events, itis always best to adopt a conservative approach and treatall transient input signals as full duration inputs.Designs that are expected to survive such events over longperiods of time must use resistors with enough resistanceto protect the in-amp’s input circuitry from failure andenough power to prevent resistor burnout.Design Issues Affecting DC AccuracyThe modern in-amp is continually being improved,providing the user with ever increasing accuracy andversatility at a lower price. Despite these improvementsin product performance, there remain some fundamentalapplications issues that seriously affect device accuracy.Now that low cost, high resolution ADCs are commonlyused, system designers need to ensure that if an in-amp isused as a preamplifier ahead of the converter, the in-amp’saccuracy matches that of the ADC.Designing for the Lowest Possible OffsetVoltage DriftOffset drift errors include not just those associated withthe active device being used (IC in-amp or discrete in-ampdesign using op amps), but also thermocouple effects inthe circuit’s components or wiring. The in-amp’s inputbias and input offset currents flowing through unbalancedsource impedances also create additional offset errors. Indiscrete op amp in-amp designs, these errors can increasewith temperature unless precision op amps are used.Designing for the Lowest Possible Gain DriftWhen planning for gain errors, the effects of board layout,the circuit’s thermal gradients, and the characteristics ofany external gain setting resistors are often overlooked. Again resistor’s absolute tolerance, its thermal temperaturecoefficient, its physical position relative to other resistorsin the same gain network, and even its physicalorientation (vertical or horizontal) are all-importantdesign considerations if high dc accuracy is needed.5-9

In many ADC preamp circuits, an external user-selectedresistor sets the gain of the in-amp, so the absolutetolerance of this resistor and its variation over temperature,compared to that of the IC’s on-chip resistors, willaffect the circuit’s gain accuracy. Resistors commonlyused include through-hole 1% 1/4 W metal film typesand 1% 1/8 W chip resistors. Both types typically havea 100 ppm/°C temperature coefficient. However, somechip resistors can have TCs of 200 ppm/C or even250 ppm/C.Even when a 1% 100 ppm/C resistor is used, the gainaccuracy of the in-amp will be degraded. The resistor’sinitial room temperature accuracy is only 1%, andthe resistor will drift another 0.01% (100 ppm/C) forevery C change in temperature. The initial gain errorcan easily be subtracted out in software, but to correctfor the error vs. temperature, frequent recalibrations (anda temperature sensor) would be required.If the circuit is calibrated initially, the overall gain accuracyis reduced to approximately 10 bits (0.1%) accuracy fora 10C change. An in-amp with a standard 1% metal filmgain resistor should never be used ahead of even a 12-bitconverter: It would destroy the accuracy of a 14-bit or16-bit converter.Additional error sources associated with external resistorsalso affect gain accuracy. The first are variations in resistorheating caused by input signal level. Figure 5-21, a simpleop amp voltage amplifier, provides a practical example.G = 1 + ——R1= 100R2R1 = 9.9k, 1/4WR2 = 1k, 1/4WFigure 5-21. An example of how differences ininput signal level can introduce gain errors.Under zero signal conditions, there is no output signaland no resistor heating. When an input signal is applied,however, an amplified voltage appears at the op ampoutput. When the amplifier is operating with gain,Resistor R1 will be greater than R2. This means thatthere will be more voltage across R1 than across R2.The power dissipated in each resistor equals the squareof the voltage across it divided by its resistance in ohms.The power dissipated and, therefore, the internal heatingof the resistor will increase in proportion to the value ofthe resistor.In the example, R1 is 9.9 k and R2 is 1 k. Consequently,R1 will dissipate 9.9 times more power than R2. Thisleads to a gain error that will vary with input level. Theuse of resistors with different temperature coefficientscan also introduce gain errors.A1A2R125kR225kR310kR GR510kR410kA3R610kSENSEOUTPUTREFFigure 5-22. A typical discrete 3-op amp in-ampusing large value, low TC feedback resistors.Even when resistors with matched temperature coefficients(TC) are used, gain errors that vary with inputsignal level can still occur. The use of larger (i.e., higherpower) resistors will reduce these effects, but accurate,low TC power resistors are expensive and hard to find.When a discrete 3-op amp in-amp is used, as shownin Figure 5-22, these errors will be reduced. In a3-op amp in-amp, there are two feedback resistors, R1and R2, and one gain resistor, R G . Since the in-amp usestwo feedback resistors while the op amp uses only one,each of the in-amp’s resistors only needs to dissipate halfthe power (for the same gain). Monolithic in-amps, suchas the AD620, offer a further advantage by using relativelylarge value (25 k) feedback resistors. For a given gainand output voltage, large feedback resistors will dissipateless power (i.e., P = V 2 /R F ). Of course, a discrete in-ampcan be designed to use large value, low TC resistors aswell, but with added cost and complexity.Another less serious but still significant error sourceis the so-called thermocouple effect, sometimesreferred to as thermal EMF. This occurs when twodifferent conductors, such as copper and metal film,are tied together. When this bimetallic junction isheated, a simple thermocouple is created. When usingsimilar metals, such as a copper-to-copper junction,a thermoelectric error voltage of up to 0.2 mV/C maybe produced. An example of these effects is shown inFigure 5-23.5-10

A final error source occurs when there is a thermalgradient across the external gain resistor. Something assimple as mounting a resistor on end to conserve boardspace will invariably produce a temperature gradientacross the resistor. Placing the resistor flat down againstthe PC board will cure this problem unless there is airflowing along the axis of the resistor (where the air flowcools one side of the resistor more than the other side).Orienting the resistor so that its axis is perpendicular tothe airflow will minimize this effect.T1RESISTORMATERIALRESISTOR LEADST2TYPICAL RESISTOR THERMOCOUPLE EMFs• CARBON COMPOSITION 400V/C• METAL FILM20V/C• EVENOHM OR MANGANINWIRE-WOUND2V/C• RCD COMPONENTS HP-SERIES 0.05V/CFigure 5-23. Thermocouple effects insidediscrete resistors.Practical SolutionsAs outlined, a number of dc offset and gain errors areintroduced when external resistors are used with amonolithic in-amp. Discrete designs tend to have evenlarger errors. There are three practical solutions to thisproblem: use higher quality resistors, use software correction,or, better still, use an in-amp that has all of itsgain resistors on-chip, such as the AD621.Option 1: Use a Better Quality Gain ResistorAs a general rule, only 12-bit or 13-bit gain performanceis possible using commonly available 1% resistors,which assumes that some type of initial calibration isperformed.A practical solution to this problem is to simply use abetter quality resistor. A significant improvement can bemade using a 0.1%, 1/10 W, surface-mount resistor. Asidefrom having a 10 better initial accuracy, it typically hasa TC of only 25 ppm/C, which will provide better than13-bit accuracy over a 10C temperature range.If even better gain accuracy is needed, there are specialtyhouses that sell resistors with lower TCs, but these areusually expensive military varieties.Option 2: Use a Fixed-Gain In-AmpBy far, the best overall dc performance is providedby using a monolithic in-amp, such as the AD621 orAD8225, in which all the resistors are contained withinthe IC. Now all resistors have identical TCs, all are atvirtually the same temperature. Any thermal gradientsacross the chip are very small, and gain error drift isguaranteed and specified to very high standards.At a gain of 10, the AD621 has a guaranteed maximumdc offset shift of less than 2.5 µV/C and a maximum gaindrift of 5 ppm/°C, which is only 0.0005%/C.The AD8225 is an in-amp with a fixed gain of 5. It hasa maximum offset shift of 2 V/C and a maximum driftof 0.3 V/C.RTI AND RTO ERRORSAnother important design consideration is how circuitgain affects many in-amp error sources such as dc offsetand noise. An in-amp should be regarded as a two stageamplifier with both an input and an output section. Eachsection has its own error sources.Because the errors of the output section are multipliedby a fixed gain (usually 2), this section is often theprincipal error source at low circuit gains. When thein-amp is operating at higher gains, the gain of theinput stage is increased. As the gain is raised, errorscontributed by the input section are multiplied, whileoutput errors are not. So, at high gains, the input stageerrors dominate.Since device specifications on different data sheets oftenrefer to different types of errors, it is very easy for theunwary designer to make an inaccurate comparisonbetween products. Any (or several) of four basic errorcategories may be listed: input errors, output errors, totalerror RTI, and total error RTO. Here follows an attemptto list, and hopefully simplify, an otherwise complicatedset of definitions.Input errors are those contributed by the amplifier’s inputstage alone; output errors are those due to the outputsection. Input related specifications are often combinedand classified together as a referred to input (RTI) error,while all output related specifications are consideredreferred to output (RTO) errors.For a given gain, an in-amp’s input and output errorscan be calculated using the following formulas:Total Error, RTI = Input Error + (Output Error/Gain)Total Error, RTO = (Gain Input Error) + Output ErrorSometimes the specifications page will list an error termas RTI or RTO for a specified gain. In other cases, it is upto the user to calculate the error for the desired gain.5-11

Offset ErrorUsing the AD620A as an example, the total voltageoffset error of this in-amp when operating at a gain of10 can be calculated using the individual errors listed onits specifications page. The (typical) input offset of theAD620 (V OSI ) is listed as 30 V. Its output offset (V OSO )is listed as 400 V. Thus, the total voltage offset referredto input (RTI) is equal toTotal RTI Error = V OSI + (V OSO /G) = 30 V + (400 V/10)= 30 V + 40 V = 70 VThe total voltage offset referred to the output (RTO)is equal toTotal Offset Error RTO = (G (V OSI )) + V OSO = (10 (30 V))+ 400 V = 700 VNote that the two error numbers (RTI vs. RTO) aredifferent: the RTO numbers are 103 larger, andlogically they should be, as at a gain of 10, the error atthe output of the in-amp should be 10 times the errorat its input.Noise ErrorsIn-amp noise errors also need to be considered in asimilar way. Since the output section of a typical 3-opamp in-amp operates at unity gain, the noise contributionfrom the output stage is usually very small. But thereare 3-op amp in-amps that operate the output stage athigher gains, and 2-op amp in-amps regularly operate thesecond amplifier at gain. When either section is operatedat gain, its noise is amplified along with the input signal.Both RTI and RTO noise errors are calculated the sameway as offset errors, except that the noise of two sectionsadds as the root mean square. That is,Input Noise = eni , Output Noise = eno2 2= ( ) + ( )( ) + ( eno)Total Noise RTI eni eno GainTotal Noise RTO = Gain ( eni )2 2For example, the (typical) noise of the AD620Ais specified as 9 nV/√Hz eni and 72 nV/√Hz eno.Therefore, the total RTI noise of the AD620A operatingat a gain of 10 is equal toReducing RFI Rectification Errors inIn-Amp CircuitsReal-world applications must deal with an everincreasing amount of radio frequency interference(RFI). Of particular concern are situations in whichsignal transmission lines are long and signal strength islow. This is the classic application for an in-amp, sinceits inherent common-mode rejection allows the deviceto extract weak differential signals riding on strongcommon-mode noise and interference.One potential problem that is frequently overlooked,however, is that of radio frequency rectification insidethe in-amp. When strong RF interference is present, itmay become rectified by the IC and then appear as a dcoutput offset error. Common-mode signals present atan in-amp’s input are normally greatly reduced by theamplifier’s common-mode rejection.Unfortunately, RF rectification occurs because even thebest in-amps have virtually no common-mode rejectionat frequencies above 20 kHz. A strong RF signalmay become rectified by the amplifier’s input stageand then appear as a dc offset error. Once rectified,no amount of low-pass filtering at the in-amp outputwill remove the error. If the RF interference is of anintermittent nature, this can lead to measurementerrors that go undetected.Designing Practical RFI FiltersThe best practical solution is to provide RF attenuationahead of the in-amp by using a differential low-passfilter. The filter needs to do three things: remove as muchRF energy from the input lines as possible, preservethe ac signal balance between each line and ground(common), and maintain a high enough input impedanceover the measurement bandwidth to avoid loadingthe signal source.Total Noise RTI eni eno Gain2 2( ) + ( ) =2 2= ( ) + ( ) =9 72 10 11. 5nV Hz5-12

Figure 5-24 provides a basic building block for a widenumber of differential RFI filters. Component valuesshown were selected for the AD8221, which has a typical–3 dB bandwidth of 1 MHz and a typical voltage noiselevel of 7 nV/√Hz. This same filter is recommended forthe AD8222 dual in-amp and for the AD8220 JFETinput in-amp. In addition to RFI suppression, the filterprovides additional input overload protection, as resistorsR1a and R1b help isolate the in-amp’s input circuitryfrom the external signal source.Figure 5-25 is a simplified version of the RFI circuit. Itreveals that the filter forms a bridge circuit whose outputappears across the in-amp’s input pins. Because of this,any mismatch between the time constants of C1a/R1aand C1b/R1b will unbalance the bridge and reduce highfrequency common-mode rejection. Therefore, resistorsR1a and R1b and capacitors C1a and C1b shouldalways be equal.As shown, C2 is connected across the bridge outputso that C2 is effectively in parallel with the seriescombination of C1a and C1b. Thus connected, C2very effectively reduces any ac CMR errors due tomismatching. For example, if C2 is made 10 timeslarger than C1, this provides a 20 reduction in CMRerrors due to C1a/C1b mismatch. Note that the filterdoes not affect dc CMR.The RFI filter has two different bandwidths: differentialand common mode. The differential bandwidth definesthe frequency response of the filter with a differential inputsignal applied between the circuit’s two inputs, +IN and–IN. This RC time constant is established by the sum ofthe two equal-value input resistors (R1a, R1b), togetherwith the differential capacitance, which is C2 in parallelwith the series combination of C1a and C1b.RFI FILTER0.01F+V S0.33F–IN+INR1a4.02kR1b4.02kC1a1000pFC20.01FC1b1000pF1–2AD8220R G AD8221AD822236+4 5 REF8G = 1+ 49.4kR G715*V OUT0.01F0.33F–V S*AD8222 ONLYFigure 5-24. LP filter circuit used to prevent RFI rectification errors in AD8220, AD8221, and AD8222 in-amps.R1aC1a+INC2IN-AMPV OUT–INR1bC1bFigure 5-25. Capacitor C2 shunts C1a/C1b and very effectively reduces ac CMR errors due tocomponent mismatching.5-13

The –3 dB differential bandwidth of this filter isequal toBWDIFF = 12πR 2C2 + C1( )The common-mode bandwidth defines what acommon-mode RF signal sees between the two inputstied together and ground. It’s important to realize thatC2 does not affect the bandwidth of the common-modeRF signal, as this capacitor is connected between thetwo inputs (helping to keep them at the same RF signallevel). Therefore, common-mode bandwidth is set by theparallel impedance of the two RC networks (R1a/C1aand R1b/C1b) to ground.The –3 dB common-mode bandwidth is equal toBWCM =12πR1C1Using the circuit of Figure 5-24, with a C2 value of0.01 F as shown, the –3 dB differential signal bandwidthis approximately 1900 Hz. When operating at a gain of5, the circuit’s measured dc offset shift over a frequencyrange of 10 Hz to 20 MHz was less than 6 V RTI. Atunity gain, there was no measurable dc offset shift.The RFI filter should be built using a PC board withground planes on both sides. All component leads shouldbe made as short as possible. The input filter commonshould be connected to the amplifier common using themost direct path. Avoid building the filter and the in-ampcircuits on separate boards or in separate enclosures, asthis extra lead length can create a loop antenna. Instead,physically locate the filter right at the in-amp’s inputterminals. A further precaution is to use good qualityresistors that are both noninductive and nonthermal(low TC). Resistors R1 and R2 can be common 1%metal film units. However, all three capacitors need tobe reasonably high Q, low loss components. CapacitorsC1a and C1b need to be 5% tolerance devices to avoiddegrading the circuit’s common-mode rejection. Thetraditional 5% silver micas, miniature size micas, orthe new Panasonic 2% PPS film capacitors (Digi-Keypart # PS1H102G-ND) are recommended.Selecting RFI Input Filter Component Values Usinga Cookbook ApproachThe following general rules will greatly ease the designof an RC input filter.1. First, decide on the value of the two series resistorswhile ensuring that the previous circuitry canadequately drive this impedance. With typical valuesbetween 2 k and 10 k, these resistors should notcontribute more noise than that of the in-amp itself.Using a pair of 2 k resistors will add a Johnson noiseof 8 nV/√Hz; this increases to 11 nV/√Hz with 4 kresistors and to 18 nV/√Hz with 10 k resistors.2. Next, select an appropriate value for capacitor C2,which sets the filter’s differential (signal) bandwidth.It’s always best to set this as low as possible withoutattenuating the input signal. A differential bandwidthof 10 times the highest signal frequency is usuallyadequate.3. Then select values for capacitors C1a and C1b, whichset the common-mode bandwidth. For decent acCMR, these should be 10% the value of C2 or less.The common-mode bandwidth should always be lessthan 10% of the in-amp’s bandwidth at unity gain.5-14

Specific Design ExamplesAn RFI Circuit for AD620 Series In-AmpsFigure 5-26 is a circuit for general-purpose in-amps suchas the AD620 series, which have higher noise levels(12 nV/√Hz) and lower bandwidths than the AD8221.Accordingly, the same input resistors were used, butcapacitor C2 was increased approximately five timesto 0.047 F to provide adequate RF attenuation. Withthe values shown, the circuit’s –3 dB bandwidth is approximately400 Hz; the bandwidth may be increasedto 760 Hz by reducing the resistance of R1 and R2to 2.2 k. Note that this increased bandwidth does notcome free. It requires the circuitry preceding the in-ampto drive a lower impedance load and results in somewhatless input overload protection.An RFI Circuit for Micropower In-AmpsSome in-amps are more prone to RF rectification thanothers and may need a more robust filter. A micropowerin-amp, such as the AD627, with its low input stageoperating current, is a good example. The simpleexpedient of increasing the value of the two inputresistors, R1a/R1b, and/or that of capacitor C2, willprovide further RF attenuation, at the expense of areduced signal bandwidth.Since the AD627 in-amp has higher noise (38 nV/√Hz)than general-purpose ICs, such as the AD620 seriesdevices, higher value input resistors can be used withoutseriously degrading the circuit’s noise performance.The basic RC RFI circuit of Figure 5-24 was modifiedto include higher value input resistors, as shown inFigure 5-27.The filter bandwidth is approximately 200 Hz. At a gainof 100, the maximum dc offset shift with a 1 V p-p inputapplied is approximately 400 V RTI over an input rangeof 1 Hz to 20 MHz. At the same gain, the circuit’s RFsignal rejection (RF level at output/RF applied to theinput) will be better than 61 dB.RFI FILTER0.01F+V S0.33F+IN–INR1a4.02kR1b4.02kC1a1000pFC20.047FC1b1000pF3+71R G AD6208–2 45REF6V OUT0.01F0.33F–V SFigure 5-26. RFI circuit for AD620 series in-amp.RFI FILTER0.01F+V S0.33F+IN20kC1a1000pFC20.022F31R G8+7AD6276V OUT–IN20kC1b1000pF–2 45REF0.01F 0.33F5-15–V SFigure 5-27. RFI suppression circuit for the AD627.

An RFI Filter for the AD623 In-AmpFigure 5-28 shows the recommended RFI circuit foruse with the AD623 in-amp. Because this device is lessprone to RFI than the AD627, the input resistors canbe reduced in value from 20 k to 10 k; this increasesthe circuit’s signal bandwidth and lowers the resistors’noise contribution. Moreover, the 10 k resistors stillprovide very effective input protection. With the valuesshown, the bandwidth of this filter is approximately400 Hz. Operating at a gain of 100, the maximum dcoffset shift with a 1 V p-p input is less than 1 V RTI.At the same gain, the circuit’s RF signal rejection isbetter than 74 dB.AD8225 RFI Filter CircuitFigure 5-29 shows the recommended RFI filter for thisin-amp. The AD8225 in-amp has a fixed gain of 5 and abit more susceptibility to RFI than the AD8221. Withoutthe RFI filter, with a 2 V p-p, 10 Hz to 19 MHz sine waveapplied, this in-amp measures about 16 mV RTI of dcoffset. The filter used provides a heavier RF attenuationthan that of the AD8221 circuit by using larger resistorvalues: 10 k instead of 4 k. This is permissible becauseof the AD8225’s higher noise level. Using the filter, therewas no measurable dc offset error.RFI FILTER0.01F+V S0.33F+IN10kC1a1000pFC20.022F31R G8+7AD6236V OUT–IN10kC1b1000pF–2 45REF0.01F0.33F–V SFigure 5-28. AD623 RFI suppression circuit.RFI FILTER0.01F+V S0.33F+IN10kC1a1000pF2+7C20.01FAD82256V OUT–IN10kC1b1000pF–3 45REF0.01F0.33F–V SFigure 5-29. AD8225 RFI filter circuit.5-16

An RFI Filter For The AD8555 SensorAmplifierThe circuit in Figure 5-30 provides good RFI suppressionwithout reducing performance within the AD8555 passband. Using the component values shown, this filter hasa common-mode bandwidth of approximately 40 kHz.To preserve common-mode rejection in the AD8555’spass band, capacitors need to be 5% (silver mica) orbetter and should be placed as close to its inputs as possible.Resistors should be 1% metal film. The circuit’sdifferential bandwidth is approximately 4 kHz when aC3 value of 0.047 mF is used.–IN+INR24.02kC30.047FR14.02kV DDC21nF123VDDFILT/DIGOUTDIGIN4 –IN+IN 5AD8555VSSVOUTVCLAMP876C11nFFigure 5-30. AD8555 RFI filter circuit.V SSV DDIn-Amps with On-Chip EMI/RFI FilteringThe AD8556 is very similar to the AD8555. TheAD8556 features internal EMI filters on the –IN, +IN,FILT, and VCLAMP pins. These built-in filters on thepins limit the interference bandwidth and provide goodRFI suppression without reducing performance withinthe pass band of the in-amp. A functional diagram ofAD8556 along with its EMI/RFI filters is shown inFigure 5-31.AD8556 has on-chip filters on its inputs, VCLAMP,and filter pins. The first-order low-pass filters insidethe AD8556 are useful to reject high frequency EMIsignals picked up by wires and PCB traces outsidethe AD8556. The most sensitive pin of any amplifierto RFI/EMI signal is the noninverting pin. Signalspresent at this pin appear as common-mode signalsand create problems.The filters at the input of the AD8556 have two differentbandwidths: common and differential mode. The EMIfilters placed on the input pins of the AD8556 rejectEMI/RFI suppressions that appear as common-modesignals.DIG INV CLAMPV DDLOGICDACEMIFILTER12+INA5 OUT–IN3V DDV SSV POSEMIFILTER12+INA1 OUT–IN3R2R5P4R7V SSP2EMIFILTERV DDR3P112V DD+INA3 OUT–IN3RFEMIFILTER12V DD+INA4 OUT–IN3V OUTV SSV NEGEMIFILTER12+INA2 OUT–IN3R1R4P3R5V SSV SSAD8556V SSFILT/DIG OUTFigure 5-31. AD8556 block diagram showing on-chip EMI/RFI filter.5-17

Figure 5-32 simulates the presence of a noisy commonmodesignal, and Figure 5-33 shows the response dcvalues at V OUT .+2.5V123VCCFILTERDATAU3VEEVOUTVCLAMP876–2.5VVOUT(0V)+2.5V+2.5V123VCCFILTERDATAU2AD8556VEEVOUTVCLAMP4–IN+IN5876–2.5V200mV p-pGAIN = 70DC OFFSET = 2.5VVOUT+2.5V+–V24–IN5+INAD8556+–NOISEINPUTGAIN = 70DC OFFSET = 2.5VFigure 5-34. Test circuit to show AD8556performance exposed to differential-modeRFI/EMI signals.The response of AD8556 to EMI/RFI differential signalsis shown in Figure 5-35. Figure 5-32. Test circuit to show AD8556performance exposed to common-modeRFI/EMI signals. Figure 5-33. DC input offset values at V OUTcaused by common-mode RFI vs. frequency.The differential bandwidth defines the frequency responseof the filters with a differential signal applied betweenthe two inputs, VPOS (that is, +IN ) and VNEG (thatis, –IN). Figure 5-34 shows the test circuit for AD8556EMI/RFI susceptibility. Figure 5-35. DC offset shift of AD8556 due toEMI/RFI differential signals vs. frequency.For the most effective EMI rejection, the printed circuitboard leads at VPOS and VNEG should be as similar aspossible. In this way, any EMI received by the VPOSand VNEG pins will be similar (that is, a common-modeinput), and rejected by the AD8556. Furthermore, additionalfiltering at the VPOS and VNEG pins shouldprovide better reduction of unwanted behavior comparedwith filtering at the other pins.5-18

Common-Mode Filters Using X2Y ® Capacitors*Figure 5-36 shows the connection diagram for an X2Ycapacitor. These are very small, three terminal deviceswith four external connections—A, B, G1, and G2.The G1 and G2 terminals connect internally within thedevice. The internal plate structure of the X2Y capacitorforms an integrated circuit with very interestingproperties. Electrostatically, the three electrical nodesform two capacitors that share the G1 and G2 terminals.The manufacturing process automatically matches bothcapacitors very closely. In addition, the X2Y structureincludes an effective autotransformer/common-modechoke. As a result, when these devices are used forcommon-mode filters, they provide greater attenuationof common-mode signals above the filter’s cornerfrequency than a comparable RC filter. This usually allowsthe omission of capacitor C2, with subsequent savings incost and board space.Figure 5-36. X2Y electrostatic model.Figure 5-37a illustrates a conventional RC commonmodefilter, while Figure 5-37b shows a common-modefilter circuit using an X2Y device. Figure 5-38 is agraph contrasting the RF attenuation provided bythese two filters.R1A4.02k 1%–INC1A220pF C2C1B10nF220pF+INR1B4.02k 1%R GC3 +V S C4330nF 10nF1234–U1AD8221IA+C5330nF8765C610nF–V SV OUTR1A4.02k 1%–INC1*10nF+IN R1B4.02k 1%+V SC3330nFC410nF–V S12– 8U17R G AD82213 IA 64 +5C5 C6330nF 10nFFigure 5-37b. Common-mode filterusing X2Y capacitor. V OUT Figure 5-38. RF attenuation, X2Y vs.conventional RC common-mode filter.Figure 5-37a. Conventional RCcommon-mode filter.*C1 is part number 500X14W103KV4. X2Y components may be purchased from Johanson Dielectrics, Sylmar, CA 91750, (818) 364-9800. For a fulllisting of X2Y manufacturers, visit www.x2y.com/manufacturers.5-19

Using Common-Mode RF Chokes for In-AmpRFI FiltersAs an alternative to using an RC input filter, a commercialcommon-mode RF choke may be connected in front ofan in-amp, as shown in Figure 5-39. A common-modechoke is a two-winding RF choke using a commoncore. Any RF signals that are common to both inputswill be attenuated by the choke. The common-modechoke provides a simple means for reducing RFI witha minimum of components and provides a greatersignal pass band, but the effectiveness of this methoddepends on the quality of the particular common-modechoke being used. A choke with good internal matchingis preferred. Another potential problem with using thechoke is that there is no increase in input protection asis provided by the RC RFI filters.Using an AD620 in-amp with the RF choke specified, ata gain of 1000, and a 1 V p-p common-mode sine waveapplied to the input, the circuit of Figure 5-39 reducesthe dc offset shift to less than 4.5 V RTI. The highfrequency common-mode rejection ratio was also greatlyimproved, as shown in Table 5-3.Table 5-3. AC CMR vs. FrequencyUsing the Circuit of Figure 5-39FrequencyCMRR (dB)100 kHz 100333 kHz 83350 kHz 79500 kHz 881 MHz 96Because some in-amps are more susceptible to RFI thanothers, the use of a common-mode choke may sometimesprove inadequate. In these cases, an RC input filter oran X2Y-based filter is a better choice.0.01F+V S0.33F+INPULSEENGINEERING#B4001 COMMON-MODERF CHOKE+R GIN-AMPV OUT–IN–REF0.01F0.33F–V SFigure 5-39. Using a commercial common-mode RF choke for RFI suppression.5-20

RFI TESTINGFigure 5-40 shows a typical setup for measuring RFIrejection. To test these circuits for RFI suppression,connect the two input terminals together using veryshort leads. Connect a good quality sine wave generatorto this input via a 50 terminated cable.Using an oscilloscope, adjust the generator for a 1 Vpeak-to-peak output at the generator end of the cable.Set the in-amp to operate at high gain (such as a gainof 100). DC offset shift is simply read directly at thein-amp’s output using a DVM. For measuring highfrequency CMR, use an oscilloscope connected to thein-amp output by a compensated scope probe and measurethe peak-to-peak output voltage (i.e., feedthrough) vs.input frequency. When calculating CMRR vs. frequency,remember to take into account the input termination(V IN /2) and the gain of the in-amp.⎛VIN⎞⎜⎝ 2⎟⎠CMR = 20log⎛VOUT⎞⎜⎝ Gain⎟⎠USING LOW-PASS FILTERING TO IMPROVESIGNAL-TO-NOISE RATIOTo extract data from a noisy measurement, low-pass filteringcan be used to greatly improve the signal-to-noiseratio of the measurement by removing all signals that arenot within the signal bandwidth. In some cases, band-passfiltering (reducing response both below and above thesignal frequency) can be employed for an even greaterimprovement in measurement resolution.+V SRFSIGNALGENERATORCABLE+RFIINPUTFILTERR GIN-AMPV OUT TOSCOPE OR DVM–REFFigure 5-40. Typical test setup for measuring an in-amp’s RFI rejection.–V S5-21

The 1 Hz, 4-pole, active filter of Figure 5-41 is an exampleof a very effective low-pass filter that normally would beadded after the signal has been amplified by the in-amp.This filter provides high dc precision at low cost whilerequiring a minimum number of components.Note that component values can simply be scaledto provide corner frequencies other than 1 Hz (seeTable 5-4). If a 2-pole filter is preferred, simply takethe output from the first op amp.The low levels of current noise, input offset, and inputbias currents in the quad op amp (either an AD704 orOP497) allow the use of 1 M resistors without sacrificingthe 1 µV/C drift of the op amp. Thus, lower capacitorvalues may be used, reducing cost and space.Furthermore, since the input bias current of these opamps is as low as their input offset currents over mostof the MIL temperature range, there is rarely a need touse the normal balancing resistor (along with its noisereducingbypass capacitor). Note, however, that addingthe optional balancing resistor will enhance performanceat temperatures above 100C.Specified values are for a –3 dB point of 1.0 Hz.For other frequencies, simply scale capacitors C1through C4 directly; i.e., for 3 Hz Bessel response,C1 = 0.0387 F, C2 = 0.0357 F, C3 = 0.0533 F,and C4 = 0.0205 F.Q 1 = C 14C 21W =Q 2 = C 34C 41W =R 8 C 3 C 4R 6 C 1 C 2R 10R 6 = R 7R 8 = R 9INPUTR 6 R 7C 1 1/2 AD706*C 31/2 OP297* 1/2 AD7061/2 OP2971M 1M1M 1MC 4OUTPUTR 8 R 9CAPACITORS C 2 –C 4 AREC 2C 5R 102M2MC 50.01 FA1, A2 ARE AD706 OR OP297* REFER TO THE ANALOG DEVICES WEBSITE ATWWW.ANALOG.COM FOR THE LATEST OP AMPPRODUCTS AND SPECIFICATIONS.OPTIONAL BALANCERESISTOR NETWORKSCAN BE REPLACEDWITH A SHORTSOUTHERN ELECTRONICSMPCC, POLYCARBONATE,5%, 50VFigure 5-41. A 4-pole low-pass filter for data acquisition.Table 5-4. Recommended Component Values for a 1 Hz, 4-Pole, Low-Pass FilterSection 1 Section 2Desired Low- Frequency Frequency C1 C2 C3 C4Pass Response (Hz) Q (Hz) (Q) (F) (F) (F) (F)Bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616Butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.06090.1 dB Chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.03850.2 dB Chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.03470.5 dB Chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.02901.0 dB Chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.02425-22

EXTERNAL CMR AND SETTLING TIMEADJUSTMENTSWhen a very high speed, wide bandwidth in-amp isneeded, one common approach is to use several op ampsor a combination of op amps and a high bandwidthsubtractor amplifier. These discrete designs may bereadily tuned up for best CMR performance by externaltrimming. A typical circuit is shown in Figure 5-42. Thedc CMR should always be trimmed first, since it affectsCMRR at all frequencies.The +V IN and –V IN terminals should be tied togetherand a dc input voltage applied between the two inputsand ground. The voltage should be adjusted to providea 10 V dc input. A dc CMR trimming potentiometerwould then be adjusted so that the outputs are equal andas low as possible, with both a positive and a negativedc voltage applied.AC CMR trimming is accomplished in a similarmanner, except that an ac input signal is applied. Theinput frequency used should be somewhat lower than the–3 dB bandwidth of the circuit.The input amplitude should be set at 20 V p-p withthe inputs tied together. The ac CMR trimmer is thennulled-set to provide the lowest output possible. If thebest possible settling time is needed, the ac CMRtrimmer may be used, while observing the output waveform on an oscilloscope. Note that, in some cases, therewill be a compromise between the best CMR and thefastest settling time.V IN#1INVERTINGINPUTA1R1AC CMR TRIMR2C TSENSER5COMMON-MODEINPUT SIGNAL(AC OR DC)R6R GA3OUTPUTDC CMR TRIMV IN#2NONINVERTINGINPUTA2R3REFR41/2 C TFigure 5-42. External dc and ac CMR trim circuit for a discrete 3-op amp in-amp.5-23

Chapter VIIN-AMP AND DIFF AMP APPLICATIONS CIRCUITSA True Differential Output In-Amp CircuitThe AD8222 can be easily configured as a true differentialoutput in-amp, as shown in Figure 6-1. Note that thisconnection provides a low impedance output at both+OUT and –OUT.Because the differential voltage is set solely by AmplifierA1, all of the precision specifications (offset voltage, offsetdrift, and 1/f noise) are the same as if Amplifier A1 wereoperating in single-ended mode.Amplifier A1 sets the differential output voltage bymaintaining the following equation:V DIFFOUT = V +OUT – V –OUT =(V +IN – V –IN ) 3 Gain A1The output common-mode voltage is set by the averageof V REF2 voltage and V REF1 .Amplifier A2 sets the output common-mode voltage bymaintaining the following equation:VCMOUT=( ) + =( )V− + V+V V2 2OUT OUT REF 2 REF1Because the V REF1 and V REF2 pins have different properties,the reference voltage may be easily set for a wide varietyof applications. Note that V REF2 is high impedance butcannot swing to the supply rails of the part. In contrast,V REF1 must be driven with a low impedance but can go300 mV beyond the supply rails. One very commonapplication sets the common-mode output voltage tothe midscale of a differential ADC. In this case, the ADCreference voltage would be sent to the V REF2 terminal andground would be connected to the V REF1 terminal. Thiswould produce a common-mode output voltage of halfthe ADC reference voltage.0.1F–V S–IN1 16215R G A13+IN1/21/24 AD8222 AD8222+OUT10k6 G = 1(R G = )1214A2100pF0.1F 139V REF27V REF1–OUT+V SFigure 6-1. Differential output in-amp circuit.DIFFERENCE AMPLIFIER MEASURES HIGHVOLTAGESFigure 6-2 shows two conventional methods used tomeasure a large signal. One comprises a 2-resistor dividerand an output buffer, the other an inverter with a largevalue input resistor. Both approaches suffer from the factthat only one resistor dissipates power and, therefore, isself-heating and the change in resistance due to temperaturechange results in a large nonlinearity error. Anotherproblem associated with these approaches concernsthe amplifier: The combination of offset current, offsetvoltage, CMRR, gain error, and drifts of the amplifierand resistors may significantly reduce the overall systemperformance.380k400k20kV IN20k20kV OUTV IN20kV OUTFigure 6-2. Two conventional methods of measuring high voltage.6-1

Clearly, something better is needed. Figure 6-3 is aschematic of a circuit that can measure in excess of400 volts peak-to-peak input with less than five partsper million nonlinearity error. The circuit attenuates aninput signal 20 times and also provides output buffering.The amplifier, as well as the attenuator resistors, areall packaged together inside the AD629 IC so that bothresistors in the attenuator string are at the same temperature.The amplifier stage employs superbeta transistors,so that offset current error and bias current errors aresmall. Also, since there is no noise gain (i.e., there is 100%feedback at low frequencies), the AD629’s offset voltageand its drift add almost no additional error.–VAD62930pFREF(–) 21.1k 380kV INVREF(+) OUT4 –V S 51 NC 8–IN 380k2 +V S 7+IN 380kOUT3 6+V S0.1FS0.1F20kFigure 6-3. New high voltagemeasurement system.The AD629 cannot work with a 100% feedback. A30 pF capacitor adds a pole and a zero to the feedbackgain, so stability is maintained and the systembandwidth is maximized. The pole is atfp = 1/(2p (380 kV + 20 kV) 30 pF) = 13 kHzThe zero frequency is atfz = 1/(2p (20 kV) 30 pF) = 265 kHzFigure 6-4 is a performance photo showing a 400 V p-pinput (top) and a 20 V p-p output (bottom). Figure 6-5is a performance photo showing the output at 5 V p-pper division vs. the input signal at 50 V p-p per division.Figure 6-6, also a cross plot, shows nonlinearity vs. theinput signal.12CH1 100V CH2 5.00V M 200s CH1 6VFigure 6-4. Performance photo: top, input voltage(400 V p-p), bottom, output voltage (20 V p-p).V OUT (50V/DIV)TV OUTPUT (5V/DIV)Figure 6-5. Cross plot of the high voltagemeasurement system.NONLINEARITY (10ppm/DIV)6-2INPUT VOLTAGE (50V/DIV)Figure 6-6. Nonlinearity error of the high voltagemeasurement system:Y axis: output nonlinearity error, 10 ppm/division.X axis: input voltage, 50 volts/division.

Precision Current SourceFigure 6-7 shows the AD8553 configured as a currentsource. The current output node voltage (labeled I OUT )sets the voltage at the V REF pin of the AD8553. The inputsignal to the AD8553, V IN , sets the current that flowsthrough R1. Consequently, the voltage drop across R2is set by V IN , according to the following equation:(+)(–)V INV INR21R1200k109VR2 = 2(V IN /R1)R2V CC36AD855382V INR157C21FR219.1k4LOADR SET200Figure 6-7. Precision 61 mA dc current source.2921R1200k109f U =5V63AD8553812 R1257V REF( )( C I )C I1FFigure 6-8. Low frequency differential inputintegrators for PID loop.4I OUTIntegrator for PID LoopFigure 6-8 shows the AD8553 configured as an integrator.This configuration can be used within a PID(proportional integral differential) loop in a controlsystem. In this case, the integrator’s gain becomesone at F UNITY = 1/(p(R1)C I ). Note that this resultis due to the fact that the AD8553 doubles the currentthrough R1, resulting in an effective resistance(R1)/2. The input offset voltage of this configurationwill be proportional to the size of R1, assuming thatthe system is in a steady state condition. Therefore,the input offset voltage of the integrator is determinedprimarily by the size of R1 along with the internaloffsets of the AD8553, assuming that the system is ina steady state condition.Now, the voltage between V OUT and V REF is equal to VR2.As a result, the output current from this current source isI OUT = (VR2/R SET ). The value of this current can rangebetween 61 mA. This is 0.8 V < V(@I OUT ) < V CC – 0.8(single supply). Note that this range is limited by thedynamic range of the V REF pin on the AD8553. Thiscompliance range would include ground on dual-supplysystems. If R1 is adjusted, ensure that the current in R1stays below 19 mA. If R2 values are adjusted, ensure thatPin 4 of the AD8553 does not exceed its valid outputrange (75 mV from each supply). This current sourcecould be used to transmit a signal from one location toanother distant location and transform it back into avoltage at the distant location using a transimpedanceamplifier.Composite In-Amp Circuit Has Excellent HighFrequency CMRThe primary benefit of an in-amp circuit is that itprovides common-mode rejection. While the AD8221and AD8225 both have an extended CMR frequencyrange, most in-amps fail to provide decent CMR atfrequencies above the audio range.6-3

The circuit in Figure 6-9 is a composite instrumentationamplifier with a high common-mode rejection ratio. Itfeatures an extended frequency range over which theinstrumentation amplifier has good common-moderejection (Figure 6-10). The circuit consists of threeinstrumentation amplifiers. Two of these, U1 and U2, arecorrelated to one another and connected in antiphase. Itis not necessary to match these devices because they arecorrelated by design. Their outputs, OUT1 and OUT2,drive a third instrumentation amplifier that rejectscommon-mode signals and amplifiers’ differential signals.The overall gain of the system can be determined byadding external resistors. Without any external resistors,the system gain is 2 (Figure 6-11). The performance ofthe circuit with a gain of 100 is shown in Figure 6-12.+V DM+V CM+V S+U1OUT1AD623– REF–V S+V S+U2OUT2AD623– REF–V S+V S+U3AD623 OUT3– REF–V SV REFFigure 6-9. A composite instrumentation amplifier. Figure 6-11. CMR vs. frequency at a gain of 2.COMMON-MODESIGNAL,3.5V p-p @ 20kHz(1V/DIV)UNCORRECTEDCMRR ERROR(10mV/DIV)OUTPUT SIGNAL(1mV/DIV)VCMOUT1OUT3 Figure 6-12. CMR of the system at a gain of 100.Since U1 and U2 are correlated, their common-modeerrors are the same. Therefore, these errors appear ascommon-mode input signal to U3, which rejects them.In fact, if it is necessary, OUT1 and OUT2 can directlydrive an analog-to-digital converter (ADC), as seen inFigure 6-13. The differential-input stage of the ADCnormally will reject the common-mode signal.Figure 6-10. CMR of the circuit in Figure 6-9 at 20 kHz.6-4

+V DM+V CM+V S+U1OUT1AD623– REF–V S+V S+U2OUT2AD623– REF–V S+IN–IN+V S–V SAD7825V REF GNDDIGITALDATAOUTPUTFigure 6-13. The OUT1 and OUT2 signals ofthe first stage can directly drive an analogto-digitalconverter, allowing the ADC toreject the common-mode signal.Strain Gage Measurement Using AnAC ExcitationStrain gage measurements are often plagued by offsetdrift, 1/f noise, and line noise. One solution is to use anac signal to excite the bridge, as shown in Figure 6-14.The AD8221 gains the signal and an AD630ARsynchronously demodulates the waveform. What resultsis a dc output proportional to the strain on the bridge.The output signal is devoid of all dc errors associatedwith the in-amp and the detector, including offset andoffset drift.In Figure 6-14, a 400 Hz signal excites the bridge. Thesignal at the AD8221’s input is an ac voltage. Similarly,the signal at the input of the AD630 is ac; the signal is dcat the end of the low-pass filter following the AD630.The 400 Hz ac signal is rectified and then averaged; dcerrors are converted in an ac signal and removed by theAD630. Ultimately, a precision dc signal is obtained.The AD8221 is well-suited for this application becauseits high CMRR over frequency ensures that the signalof interest, which appears as a small difference voltageriding on a large sinusoidal common-mode voltage, isgained and the common-mode signal is rejected. Intypical instrumentation amplifiers, CMRR falls off atabout 200 Hz. In contrast, the AD8221 continues toreject common-mode signals beyond 10 kHz.If an ac source is not available, a commutating voltagemay be constructed using switches. The AD8221’s highCMRR over frequency rejects high frequency harmonicsfrom a commutating voltage source.+15V+15V350350350+IN35049.9–IN0.1FAD822110FREF9 11SEL B +V S16 R A AD630AR17 R IN BV OUT 1319 CHB–COMP 1220 CHA–4.99k 4.99k 4.99k2F 2F 2F+15VOP1177–15V0.1F–15V10F15 R FR IN A SEL A –V S1 10 8R B14–15VFigure 6-14. Using an ac signal to excite the bridge.6-5

Applications of the AD628 PrecisionGain BlockThe AD628 can be operated as either a differential/scalingamplifier or as a pin-strapped precision gain block.Specifically designed for use ahead of an analog-to-digitalconverter, the AD628 is extremely useful as an inputscaling and buffering amplifier. As a differential amplifier,it can extract small differential voltages riding on largecommon-mode voltages up to 120 V. As a prepackagedprecision gain block, the pins of the AD628 canbe strapped to provide a wide range of precision gains,allowing for high accuracy data acquisition with verylittle gain or offset drift.The AD628 uses an absolute minimum of external components.Its tiny MSOP provides these functions in thesmallest size package available on the market. Besideshigh gain accuracy and low drift, the AD628 provides avery high common-mode rejection, typically more than90 dB at 1 kHz while still maintaining a 60 dB CMRRat 100 kHz.The AD628 includes a V REF pin to allow a dc (midscale)offset for driving single-supply ADCs. In this case, theV REF pin may simply be tied to the ADC’s reference pin,which also allows easy ratiometric operation.Why Use a Gain Block IC?Real-world measurement requires extracting weak signalsfrom noisy sources. Even when a differential measurementis made, high common-mode voltages are often present.The usual solution is to use an op amp or, better still, anin-amp, and then perform some type of low-pass filteringto reduce the background noise level.The problem with this traditional approach is that adiscrete op amp circuit will have poor common-moderejection and its input voltage range will always be less thanthe power supply voltage. When used with a differentialsignal source, an in-amp circuit using a monolithic ICwill improve common-mode rejection. However, signalsources greater than the power supply voltage, or signalsriding on high common-mode voltages, cannot handlestandard in-amps. In addition, in-amps using a singleexternal gain resistor suffer from gain drift. Finally, lowpassfiltering usually requires the addition of a separateop amp, along with several external components. Thisdrains valuable board space.The AD628 eliminates these common problems byfunctioning as a scaling amplifier between the sensor,the shunt resistor, or another point of data acquisition,as well as the ADC. Its 120 V max input range permitsthe direct measurement of large signals or small signalsriding on large common-mode voltages.Standard Differential Input ADC Buffer Circuitwith Single-Pole LP FilterFigure 6-15 shows the AD628 connected to accept adifferential input signal riding on a very high commonmodevoltage. The AD628 gain block has two internalamplifiers: A1 and A2. Pin 3 is grounded, thus operatingamplifier A1 at a gain of 0.1. The 100 k input resistorsand other aspects of its design allow the AD628 toprocess small input signals riding on common-modevoltages up to 120 V.C1+15VC FILTER4 7+V S0.1FDIFFERENTIALINPUT SIGNALV INV CM8110kAD628100k–IN10kA1+ IN100kINA2+– IN10k–V S5V OUTTO ADCV REFR GR GR F2 3 60.1F–15VFigure 6-15. Basic differential input connection with single-pole LP filter.6-6

The output of A1 connects to the plus input of amplifierA2 through a 10 k resistor. Pin 4 allows connecting anexternal capacitor to this point, providing single-polelow-pass filtering.Changing the Output Scale FactorFigure 6-15 reveals that the output scale factor of theAD628 may be set by changing the gain of amplifierA2. This uncommitted op amp may be operated at anyconvenient gain higher than unity. When configured,the AD628 may be set to provide circuit gains between0.1 and 1000.Since the gain of A1 is 0.1, the combined gain of A1and A2 equalsTherefore,VVOUTIN= G = 0.1 1+ ( RFRG)R( 10G−1) =R( )For ADC-buffering applications, the gain of A2 shouldbe chosen so that the voltage driving the ADC is closeto its full-scale input range. The use of external resistors,FGR F and R G to set the output scale factor (i.e., gain of A2)will degrade gain accuracy and drift essentially to theresistors themselves.A separate V REF pin is available for offsetting the AD628output signal, so it is centered in the middle of the ADC’sinput range. Although Figure 6-15 indicates 15 V, thecircuit may be operated from 2.25 V to 18 V dualsupplies. This V REF pin may also be used to allow singlesupplyoperation; V REF may simply be biased at V S /2.Using an External Resistor to Operate the AD628 atGains Below 0.1The AD628 gain block may be modified to provide anydesired gain from 0.01 to 0.1, as shown in Figure 6-16.This connection is the same as the basic wide input rangecircuit of Figure 6-15, but with Pins 5 and 6 strapped,and with an external resistor, R G , connection betweenPin 4 and ground. The pin strapping operates amplifierA2 at unity gain. Acting with the on-chip 10 k resistorat the output of A1, R GAIN forms a voltage divider thatattenuates the signal between the output of A1 andthe input of A2. The gain for this connection equals0.1 V IN ((10 k + R G )/R G ).R G+15V0.1F4 710kC FILTER+V SDIFFERENTIALINPUT SIGNALV INV CM81AD628A2100k–IN10kA1+ IN100kIN+–V S V REFR G– IN10k2 3 65V OUTTO ADC0.1F–15VFigure 6-16. AD628 connection for gains less than 0.1.6-7

+15VC10.1F0.1FDIFFERENTIALINPUT SIGNALV INV CM8110k4 7C FILTER+V SAD628100k–IN10kA1+ IN100kINA2+– IN10k–V S5V OUTTO ADC0.1FV REFR GR GR F2 3 6C2–15VFigure 6-17. Differential input circuit with 2-pole low-pass filtering.Differential Input Circuit with 2-PoleLow-Pass FilteringThe circuit in Figure 6-17 is a modification of the basicADC interface circuit. Here, 2-pole low-pass filtering isadded for the price of one additional capacitor (C2).As before, the first pole of the low-pass filter is set bythe internal 10 k resistor at the output of A1 and theexternal capacitor C1. The second pole is created byan external RC time constant in the feedback path ofA2, consisting of capacitor C2 across resistor R F .Note that this second pole provides a more rapidroll-off of frequencies above its RC corner frequency(1/(2RC)) than a single-pole LP filter. However, as theinput frequency is increased, the gain of amplifier A2eventually drops to unity and will not be further reduced.So, amplifier A2 will have a voltage gain set by the ratioof R F /R G at frequencies below its –3 dB corner and willhave unity gain at higher frequencies.OUTPUT VOLTAGE (V p-p)10.01.00.100.0110R T = 49.9k, R G = 12.4kC1 = 0.047F, C2 = 0.01F100 1k 10k 100kFREQUENCY (Hz)Figure 6-18. Frequency response of the2-pole low-pass filter.Figure 6-18 shows the filter’s output vs. frequency usingcomponents chosen to provide a 200 Hz, –3 dB cornerfrequency. There is a sharp roll-off between the cornerfrequency and approximately 10 the corner frequency.Above this point, the second pole starts to become lesseffective, and the rate of attenuation is close to that of asingle-pole response.6-8

Table 6-1.2-Pole LP FilterInput Range: 10 V p-p FS for a 5 V p-p OutputR F = 49.9 k, R G = 12.4 k–3 dB Corner Frequency200 Hz 1 kHz 5 kHz 10 kHzCapacitor C2 0.01 F 0.002 F 390 pF 220 pFCapacitor C1 0.047 F 0.01 F 0.002 F 0.001 FTable 6-2.2-Pole LP FilterInput Range: 20 V p-p FS for a 5 V p-p OutputR F = 24.3 k, R G = 16.2 k–3 dB Corner Frequency200 Hz 1 kHz 5 kHz 10 kHzCapacitor C2 0.02 F 0.0039 F 820 pF 390 pFCapacitor C1 0.047 F 0.01 F 0.002 F 0.001 FTables 6-1 and 6-2 provide typical filter componentvalues for various –3 dB corner frequencies and twodifferent full-scale input ranges. Values have beenrounded off to match standard resistor and capacitorvalues. Capacitors C1 and C2 need to be high Q, lowdrift devices; low grade disc ceramics should be avoided.High quality NPO ceramic, Mylar, or polyester filmcapacitors are recommended for the lowest drift andbest settling time.Using the AD628 to Create Precision Gain BlocksReal-world data acquisition systems require amplifying weaksignals enough to apply them to an ADC. Unfortunately,when configured as gain blocks, most common amplifiershave both gain errors and offset drift.In op amp circuits, the usual two-resistor gain settingarrangement has accuracy and drift limitations. Usingstandard 1% resistors, amplifier gain can be off by 2%.The gain will also vary with temperature because eachresistor will drift differently. Monolithic resistor networkscan be used for precise gain setting, but these componentsincrease cost, complexity, and board space.The gain block circuits of Figures 6-19 to 6-23 overcomeall of these performance limitations, are very inexpensive,and offer a single MSOP solution. The AD628 providesthis complete function using the smallest IC packageavailable. Since all resistors are internal to the AD628gain block, both accuracy and drift are excellent.All of these pin-strapped circuits (using no externalcomponents) have a gain accuracy better than 0.2%,with a gain TC better than 50 ppm/°C.Operating the AD628 as a +10 or –10 PrecisionGain BlockFigure 6-19 shows an AD628 precision gain block ICconnected to provide a voltage gain of +10. The gainblock may be configured to provide different gains bystrapping or grounding the appropriate pin. The gainblock itself consists of two internal amplifiers: a gain of0.1 difference amplifier (A1) followed by an uncommittedbuffer amplifier (A2).The input signal is applied between the V REF pin (Pin 3)and ground. With the input tied to Pin 3, the voltage atthe positive input of A1 equals V IN (100 k/110 k),which is V IN (10/11). With Pin 6 grounded, the minus+15V0.1F4 7C FILTER+V S10kAD628100k8–IN10kA1+ IN100kINA21+– IN10k–V SVR GREF2 3 60.1F5V OUT–15VV INFigure 6-19. Circuit with a gain of +10 using no external components.6-9

input of A2 equals 0 V. Therefore, the positive input ofA2 will be forced by feedback from the output of A2 tobe 0 V as well. The output of A1 then must also be at0 V. Since the negative input of A1 must be equal to thepositive input of A1, both will equal V IN (10/11).This means that the output voltage of A2 (V OUT ) willequalV = V ( 10 11) 1+100k10kOUTIN( ) =( ) =VIN10 11 11 10 VINThe companion circuit in Figure 6-20 provides a gain of–10. This time the input is applied between the negativeinput of A2 (Pin 6) and ground. Operation is exactly thesame, but now the input signal is inverted 180 by A2.With Pin 3 grounded, the positive input of A1 is at 0 V,so feedback will force the negative input of A1 to zeroas well. Since A1 operates at a gain of 1/10 (0.1), theoutput of A2 that is needed to force the negative inputof A1 to zero is minus 10 V IN .The two connections will have different input impedances.When driving Pin 3 (Figure 6-19), the input impedanceto ground is 110 k, while it is approximately 50 Gwhen driving Pin 6 (Figure 6-20). The –3 dB bandwidthfor both circuits is approximately 110 kHz for 10 mVand 95 kHz for 100 mV input signals.Operating the AD628 at a Precision Gain of +11The gain of +11 circuit (Figure 6-21) is almost identicalto the gain of +10 connection, except that Pin 1 isstrapped to Pin 3, rather than being grounded. Thisconnects the two internal resistors (100 k and 10 k)+15V0.1F4 7C FILTER +V S10kAD628100k8–IN10kA1+ IN100kINA21+IN–10k–V S V R REFG2 3 60.1F5V OUT–15VFigure 6-20. Companion circuit providing a gain of –10.V IN4 7C FILTER+V S10kAD62881100k–IN10kA1+ IN100kINA2+– IN10k–V S V REFR G2 3 65V OUTV INFigure 6-21. A gain of +11 circuit.6-10

that are tied in parallel to the plus input of A1. So, thisnow removes the 10 k/110 k voltage divider betweenV IN and the positive input of A1. Thus modified, V IN drivesthe positive input through approximately a 9 k resistor.Note that this series resistance is negligible compared tothe very high input impedance of amplifier A1. The gainfrom Pin 8 to the output of A1 is 0.1. Therefore, feedbackwill force the output of A2 to equal 10 V IN . The –3 dBbandwidth of this circuit is approximately 105 kHz for10 mV and 95 kHz for 100 mV input signals.Operating the AD628 at a Precision Gain of +1Figure 6-22 shows the AD628 connected to providea precision gain of +1. As before, this connection usesthe gain block’s internal resistor networks for high gainaccuracy and stability.The input signal is applied between the V REF pinand ground. Because Pins 1 and 8 are grounded, theinput signal runs through a 100 k/110 k input attenuatorto the plus input of A1. The voltage equals V IN(10/11) = 0.909 V IN . The gain from this point to theoutput of A1 will equal 1 + (10 k/100 k) = 1.10.Therefore, the voltage at the output of A1 will equalV IN (1.10) (0.909) = 1.00. Amplifier A2 is operatedas a unity-gain buffer (as Pins 5 and 6 tied together),providing an overall circuit gain of +1.Increased BW Gain Block of –9.91 Using FeedforwardThe circuit of Figure 6-20 can be modified slightlyby applying a small amount of positive feedback toincrease its bandwidth, as shown in Figure 6-23.The output of amplifier A1 feeds back its positiveinput by connecting Pin 4 and Pin 1 together. Now,Gain = –(10 – 1/11) = –9.91.+15V10k4 7C FILTER+V S0.1F810.1F100k–IN10kA1+ IN100kIN+10kA2IN––V S V REFR G2 3 6AD6285V OUT–15VV INFigure 6-22. AD628 precision gain of +1.10k4 7C FILTER+V S81100kAD628–IN10kA1+ IN100kIN+A2– IN10k–V S V REFR G2 3 65V OUTV INFigure 6-23. Precision –10 gain block with feedforward.6-11

The resulting circuit is still stable because of the largeamount of negative feedback applied around the entirecircuit (from the output of A2 back to the negativeinput of A1). This connection actually results in a smallsignal –3 dB bandwidth of approximately 140 kHz.This is a 27% increase in bandwidth over the unmodifiedcircuit in Figure 6-17. However, gain accuracy isreduced to 2%.CURRENT TRANSMITTER REJECTSGROUND NOISEMany systems use current flow to control remote instrumentations.The advantage of such a system is its abilityto operate with two remotely connected power supplies,even if their grounds are not the same. In such cases, it isnecessary for the output to be linear with respect to theinput signal, and any interference between the groundsmust be rejected. Figure 6-24 shows such a circuit.For this circuit,( V ) INIOUT= 101kΩIOUTVIN( V)=1kΩThe AD629, a difference amplifier with very highcommon-mode range, is driven by an input signal Pin 3.Its transfer function isVOUT= VINwhere:V OUT is measured between Pin 6 and its reference(Pin 1 and Pin 5), and the input V IN is measuredbetween Pin 3 and Pin 2. The common-mode signal,VCM, will be rejected.In order to reduce the voltage at Pin 6, an inverterwith a gain of 9 is connected between Pin 6 and itsreference. The inverter sets the gain of the transmittersuch that for a 10 V input, the voltage at Pin 6 onlychanges by 1 V; yet, the difference between Pin 6 andits reference is 10 V.Since the gain between the noninverting terminal of theOP27 and the output of the AD629 is 1, no modulationof the output current will take place as a function of theoutput voltage V OUT . The scaling resistor R3 is 100 tomake 1 mA/V of input signal.32380k20kAD6295 1380k21.1kR29k6R11kR30.1kI OUTV INVCM +15VGND1OP27*–15VGROUND INTERFERENCE* REFER TO THE ANALOG DEVICES WEBSITE AT WWW.ANALOG.COMFOR THE LATEST OP AMP PRODUCTS AND SPECIFICATIONS.Figure 6-24. Current transmitter.V OUTGND2R11k6-12

OP27 was chosen because, at a noise gain of 10,its bandwidth does not compromise the transmitter.Figure 6-25 is the transfer function of the outputvoltage V OUT vs. the input voltage V IN . Figure 6-26 isa demonstration of how well the transmitter rejectsground noise.2V1mV5ms5V5VTOP: GROUND NOISE 2V/DIVBOTTOM: V OUT ERROR AT FULL-SCALE 1A/DIVFigure 6-26. Interference rejection.HORIZONTAL: INPUT 5V/DIVVERTICAL: OUTPUT 5mA/DIVFigure 6-25. Transfer function.High Level ADC InterfaceThe circuit of Figure 6-27 provides an interface betweenlarge level analog inputs as high as 10 V operating ondual supplies and a low level, differential input ADC,operating on a single supply.As shown, two AD628 difference amplifiers areconnected in antiphase. The differential output, V 1 – V 2 ,is an attenuated version of the input signalV − V =1 2( VA− VB)55VV BV A–IN+IN+IN–INV RV SC 13.3k7R4100kR310kAD6288V1 10kA11 A2 5OUTR2100k R110k3 2 4 6V REF –V S C FILT R G 3.32k18V REF3R2100kR4100kR110kA1–V S C FILT2 4R310kV27V S10kR G6A2AD6283.32k5 OUT5VADR431PRECISIONREFERENCE2.5VAD74505VREFERENCEV R5VFigure 6-27. This ADC interface circuit attenuates and level shifts a 10 V differentialsignal while operating from a single 5 V supply.6-13

The difference amplifiers reject the common-modevoltage on inputs V A and V B . The reference voltage,V R , which the ADR431 develops and the ADC and theamplifier share, sets the output common-mode voltage.A single capacitor, C, placed across the C FILT pins lowpassfilters the difference signal, V 1 – V 2 . The –3 dB polefrequency is f P = 1/(40,000 C). The differencesignal is amplified by 1.5. Thus, the total gain of thiscircuit is 3/10.Figure 6-28 shows a 10 V input signal (top), the signals atthe output of each AD628 (middle), and the differentialoutput (bottom). The benefits of this configuration gobeyond simply interfacing with the ADC. The circuitimproves specifications such as common-mode rejectionratio, offset voltage, drift, and noise by a factor of √2because the errors of each AD628 are not correlated.CH1 A SPECTRUM 12dB/REF –13dBV085dBV400HzFigure 6-29. The circuit in Figure 6-27 hasan 85 dBV SNR.Tek RUN: 50k SAMPLES/SECHI RESTT20V p-p1TINPUT20V p-pTINPUT20V p-p3SINGLE-ENDEDOUTPUTS3V p-p200V p-pCOMMON-MODEERROR OFDIFFERENTIALOUTPUTM1DIFFERENTIALOUTPUT6V p-p80V p-pCOMMON-MODEERROR OFCOMMON-MODEOUTPUT1ms/DIVFigure 6-28. The waveforms show a 10 Vinput signal (top), the signals at the outputof each AD628 (middle), and the differentialoutput (bottom).The output demonstrates an 85 dB SNR (Figure 6-29).The two AD628s interface with an AD7450 12-bit,differential-input ADC. The AD7450 easily rejectsresidual common-mode signals at the output of thedifference amplifiers. Figure 6-30 shows the commonmodeerror at the output of the AD628.Figure 6-30. The common-mode input (top)measures 20 V p-p. The common-mode error ofthe differential output (middle) is 20 V p-p. Theerror of the common-mode output (bottom) is80 V p-p.The topmost waveform is a 10 V, common-mode inputsignal. The middle waveform, measuring 150 V, isthe common-mode error measured differentiallyfrom the output of the two AD628s. The bottomwaveform, measuring 80 V, is the common-modeerror that results.6-14

A High Speed noninverting SummingAmplifierThe schematic in Figure 6-31 is that of a commonsumming amplifier with multiple inputs and one singleendedoutput. It is a variation of an inverting amplifier.Point X is a virtual ground and referred to as a summingjunction. The transfer function for this circuit is[ ]V RF R1 V1 RF R2 V 2 RF R3 V 3O = − ( ) + ( ) + ( )V1V2V3R1I1R2I2R3I3XFigure 6-31. A traditional summing amplifier.RFIFVOThis indicates that the output is a weighted sum of theinputs, with the weights being determined by the resistanceratio. If all resistances are equal, the circuit yieldsthe inverted sum of its inputs.( )VO = − V 1+ V 2 + V 3Note that if we want the result V O = (V1 + V2 + V3), weneed an additional inverter with gain = –1. Furthermore,this circuit has many disadvantages, such as a low inputimpedance, plus different impedances for positive andnegative inputs. It requires low bandwidth, and highlymatched resistors are needed.Figure 6-32 is the schematic of a high speed summingamplifier, which can sum up as many as four input voltageswithout the need for an inverter to change the signof the output. This could prove very useful in audio andvideo applications. The circuit contains three, low cost,high speed instrumentation amplifiers. The first twointerface with input signals, and their total sum is takenat the third amplifier’s output with respect to ground.The inputs are very high impedance, and the signal thatappears at the network output is noninverting.1AD8130V186VO14V251AD8130846VOV318AD8130546VO2V45Figure 6-32. A summing circuit with high input impedance.6-15

Figure 6-33 is the performance photo at 1 MHz. The toptrace is the input signal for all four inputs. The middletrace is the sum of inputs V1 and V2. The bottom traceis the output of the system, which is the total sum of allfour inputs.High Voltage MonitorA high accuracy, high voltage monitor is shown inFigure 6-35.–5V+5V1T121.11k4380k7223380k380kAD629*6V INGND3520kR1100kCH1CH31.0V CH2 1.0V1.0VM 400ns 125MS/sA CH1 40.0mVFigure 6-33. Performance photo of thecircuit in Figure 6-32.8.0ns/ptFigure 6-34 demonstrates the high bandwidth of thesystem in Figure 6-32. As we can see, the –3 dB pointis about 220 MHz.GAIN (dB)43210–1–2–3–4–5P S = 5V–61 10 100 1kFREQUENCY (MHz)Figure 6-34. Frequency response ofsumming circuit in Figure 6-32.C1–15V200pF4 2V OUT 6OP177*37+15V* REFER TO THE ANALOG DEVICES WEBSITE ATWWW.ANALOG.COM FOR THE LATEST OP AMPPRODUCT NUMBERS AND SPECIFICATIONS.Figure 6-35. High voltage monitor.An integrator (OP177) supplies negative feedback arounda difference amplifier (AD629), forcing its output to stayat 0 V. The voltage divider on the inverting input setsthe common-mode voltage of the difference amplifierto V IN /20. V OUT , the integrator output and the measurementoutput, sources the required current to maintainthe common-mode voltage. R1 and C1 compensate thesystem to a bandwidth of 200 kHz.The transfer function is V OUT = V IN /19. For example, a400 V p-p input signal will produce a 21 V p-p output.6-16

Figure 6-36 shows that the measured system nonlinearityis less than 20 ppm over the entire 400 V p-p input range.System noise is about 550 nV/√Hz referred to the input,or around 2 mV peak noise voltage (10 ppm of full scale)over a 300 kHz bandwidth.NONLINEARITY ERROR (ppm)20100–10–20–200 –150 –100 –50 0 50 100 150 200V IN (V)Figure 6-36. Nonlinearity vs. V IN .PRECISION 48 V BUS MONITORTelephone equipment power supplies normally consistof a 48 V dc power source and an array of batteries. Thebatteries provide backup power during ac power lineoutages and help regulate the 48 V dc supply voltage.Although nominally –48 V, the dc voltage on thetelephone lines can vary anywhere from –40 V to –80 Vand is subject to surges and fluctuations. Supply regulationat the source has little effect on remote voltage levels, andequipment failures resulting from surges, brownouts, orother line faults may not always be detected.Capturing power supply information from remote communicationsequipment requires precise measurementof the voltages, sometimes under outdoor temperatureconditions. High common-mode voltage differenceamplifiers have been used to monitor current. However,these versatile components can also be used as voltagedividers, enabling remote monitoring of voltage levelsas well.Figure 6-37 shows a precision monitor using justtwo integrated circuits that derives its power fromthe –48 V supply. A low cost transistor and Zenerdiode combination provide 15 V supply voltage forthe amplifiers.The AD629 IC is a self-contained, high common-modevoltage difference amplifier. Connected as shown, itreduces the differential input voltage by approximately19 V, thus acting as a precision voltage divider. Anadditional amplifier is required for loop stability.The output from the OP777AR drives an AD7476ADC.The circuit features several advantages over alternativesolutions. The AD629’s laser-trimmed divider resistorsexhibit essentially perfect matching and trackingover temperature. Linearity errors from –40 V to–80 V are nearly immeasurable. Figures 6-38 and6-39 are linearity and temperature drift curves forthis circuit.2N2222 OREQUIVALENTV BUS = +14.1V V BUS = +5VADR4255V REF15V–39V TO–79VV BUS1 –REF2 –IN3 +IN4–V SAD629NC = NO CONNECT8NC7+V SOUT 6+REF 5COMPENSATIONPOLE AMPLIFIER1nFOP777AR73246V BUS19VINV BUS = +5VVDD CSSDATAAD7476GND SCLKCHIPSELECTDATAOUTCLOCKINFigure 6-37. Precision remote voltage measurement of –48 V power distribution bus.6-17

OUTPUT VOLTAGE (V)OUTPUT VOLTAGE (V)4.54.03.53.02.52.0–30 –40 –50 –60 –70 –80 –90INPUT VOLTAGE (V)Figure 6-38. Output vs. input linearity forthe circuit of the 48 V bus monitor.2.10642.10622.10602.10582.10562.1054HIGH-SIDE CURRENT SENSE WITH ALOW-SIDE SWITCHA typical application for the AD8202 is high-sidemeasurement of a current through a solenoid for PWMcontrol of the solenoid opening. Typical applicationsinclude hydraulic transmission control and diesel injectioncontrol.Two typical circuit configurations are used for this typeof application.In this case, the PWM control switch is ground referenced.An inductive load (solenoid) is tied to a power supply. Aresistive shunt is placed between the switch and the load(see Figure 6-40). An advantage of placing the shunton the high side is that the entire current, including therecirculation current, can be measured, since the shuntremains in the loop when the switch is off. In addition,diagnostics can be enhanced because shorts to groundcan be detected with the shunt on the high side.In this circuit configuration, when the switch is closed,the common-mode voltage moves down to near thenegative rail. When the switch is opened, the voltagereversal across the inductive load causes the commonmodevoltage to be held one diode drop above the batteryby the clamp diode.2.10522.1050–50 0 50 100TEMPERATURE (C)Figure 6-39. Temperature drift of the48 V bus monitor.CLAMPDIODEINDUCTIVELOAD5VOUTPUT+INNCOUTPOWERDEVICE–INGNDBATTERY14V4-TERMSHUNT+V SA1 A2AD8202COMMONNC = NO CONNECTFigure 6-40. Low-side switch.6-18

HIGH-SIDE CURRENT SENSE WITH AHIGH-SIDE SWITCHThis configuration minimizes the possibility of unexpectedsolenoid activation and excessive corrosion(see Figure 6-41). In this case, both the switch and theshunt are on the high side. When the switch is off, thisremoves the battery from the load, which prevents damagefrom potential shorts to ground while still allowing therecirculating current to be measured and providing fordiagnostics. Removing the power supply from the load forthe majority of the time minimizes the corrosive effectsthat could be caused by the differential voltage betweenthe load and ground.When using a high-side switch, the battery voltageis connected to the load when the switch is closed,causing the common-mode voltage to increase to thebattery voltage. In this case, when the switch is opened,the voltage reversal across the inductive load causes thecommon-mode voltage to be held one diode drop belowground by the clamp diode.BATTERY14VCLAMPDIODECOMMON4-TERMSHUNTPOWERDEVICE+IN–ININDUCTIVELOADNCGND5V+V S OUTA1 A2AD8202OUTPUTNC = NO CONNECTFigure 6-41. High-side switch.Motor ControlA typical application for the AD8210 is as part of thecontrol loop in H-bridge motor control. In this case, theAD8210 is placed in the middle of the H-bridge (seeFigure 6-42) so that it can accurately measure current inboth directions by using the shunt available at the motor.This is a better solution than a ground referenced opamp because ground is not typically a stable referencevoltage in this type of application. This instability in theground reference causes the measurements that couldbe made with a simple ground referenced op amp to beinaccurate.MOTORSHUNT5V+IN V REF 1 +V S OUTAD82100.1F–IN GND V REF 2 NCNC = NO CONNECTCONTROLLERFigure 6-42. Motor control application.The AD8210 measures current in both directions as theH-bridge switches and the motor changes direction. Theoutput of the AD8210 is configured in an externalreference bidirectional mode.BRIDGE APPLICATIONSInstrumentation amplifiers are widely used for bufferingand amplifying the small voltage output fromtransducers that make use of the classic 4-resistorWheatstone bridge.A Classic Bridge CircuitFigure 6-43 shows the AD627 configured to amplify thesignal from a classic resistive bridge. This circuit willwork in either dual- or single-supply mode. Typically, thebridge will be excited by the same voltage used to powerthe in-amp. Connecting the bottom of the bridge to thenegative supply of the in-amp (usually either 0, –5 V,–12 V, or –15 V) sets up an input common-mode voltagethat is optimally located midway between the supplyvoltages. It is also appropriate to set the voltage on theREF pin to midway between the supplies, especially ifthe input signal will be bipolar. However, the voltage5V2.5V+V S0.1FV DIFFR G = 200kGAIN – 5AD627V OUT0.1FV REF–V SFigure 6-43. A classic bridge circuit for low power applications.6-19

on the REF pin can be varied to suit the application.A good example of this is when the REF pin is tied tothe V REF pin of an analog-to-digital converter (ADC)whose input range is (V REF V IN ). With an availableoutput swing on the AD627 of (–V S + 100 mV) to(+V S – 150 mV), the maximum programmable gain issimply this output range divided by the input range.A Single-Supply Data Acquisition SystemThe bridge circuit of Figure 6-44 is excited by a +5 Vsupply. The full-scale output voltage from the bridge(10 mV), therefore, has a common-mode level of2.5 V. The AD623 removes the common-mode voltagecomponent and amplifies the input signal by a factorof 100 (R GAIN = 1.02 k). This results in an outputsignal of 1 V.In order to prevent this signal from running into theAD623’s ground rail, the voltage on the REF pin hasto be raised to at least 1 V. In this example, the 2 Vreference voltage from the AD7776 ADC is used tobias the AD623’s output voltage to 2 V 1 V. Thiscorresponds to the input range of the ADC.A Low Dropout Bipolar Bridge DriverThe AD822 can be used for driving a 350 Wheatstonebridge. Figure 6-45 shows one-half of the AD822being used to buffer the AD589, a 1.235 V low powerreference. The output of +4.5 V can be used to drive anA/D converter front end. The other half of the AD822is configured as a unity-gain inverter and generates theother bridge input of –4.5 V.Resistors R1 and R2 provide a constant current forbridge excitation. The AD620 low power instrumentationamplifier is used to condition the differentialoutput voltage of the bridge. The gain of the AD620is programmed using an external resistor, R G , anddetermined by49. 4 kΩG = + 1R G+5V+5V0.1F+5V0.1F10mVR G1.02kAD623REFA INAD7776REF OUTREF INFigure 6-44. A single-supply data acquisition system.49.9k+1.235VAD58910k1%+V S+1/2AD822*–26.4k, 1%R12010k* REFER TO THE ANALOG DEVICES WEBSITE ATWWW.ANALOG.COM FOR THE LATEST OP AMPPRODUCT NUMBERS AND SPECIFICATIONS.1%+1/2AD822–35035010k1%+V STO A/D CONVERTERREFERENCE INPUT350–350R G AD620+V REF–V S+V–4.5V S +5V+ +0.1F 1FR2GND + +200.1F 1F–VS–V S–5VFigure 6-45. Low dropout bipolar bridge driver.6-20

TRANSDUCER INTERFACE APPLICATIONSInstrumentation amplifiers have long been used aspreamplifiers in transducer applications. High qualitytransducers typically provide a highly linear output,but at a very low level and a characteristically highoutput impedance. This requires the use of a highgain buffer/preamplifier that will not contributeany discernible noise of its own to that of the signal.Furthermore, the high output impedance of the typicaltransducer may require that the in-amp have a lowinput bias current.Table 6-3 gives typical characteristics for some commontransducer types.Since most transducers are slow, bandwidth requirementsof the in-amp are modest: A 1 MHz smallsignal bandwidth at unity gain is adequate for mostapplications.ELECTROCARDIOGRAM SIGNALCONDITIONINGThe AD8220 makes an excellent input amplifier fornext generation ECGs. Its small size, high CMRR overfrequency, rail-to-rail output, and JFET inputs arewell-suited for this application. Potentials measuredon the skin range from 0.2 mV to 2 mV. The AD8220solves many of the typical challenges of measuringthese body surface potentials. The AD8220’s highCMRR helps reject common-mode signals that comein the form of line noise or high frequency EMI fromequipment in the operating room. Its rail-to-rail outputoffers wide dynamic range allowing for higher gainsthan would be possible using other instrumentationamplifiers. JFET inputs offer a large input capacitanceof 5 pF. A natural RC filter is formed reducinghigh frequency noise when series input resistors areused in front of the AD8220 (see the RF Interferencesection (Reducing RFI Rectification Errors in In-AmpCircuits), Chapter 5). In addition, the AD8220 JFETinputs have ultralow input bias current and no currentnoise, making it useful for ECG applications where thereare often large impedances. The MSOP package andthe AD8220’s optimal pinout allow smaller footprintsand more efficient layout, paving the way for nextgeneration portable ECGs.Figure 6-46 shows an example of an ECG schematic.Following the AD8220 is a 0.03 Hz, high-pass filter,formed by the 4.7 mF capacitor and the 1 MV resistor,which removes the dc offset that develops between theelectrodes. An additional gain of 50, provided by theAD8618, makes use of the 0 V to 5 V input range ofthe ADC. An active, fifth-order, low-pass Bessel filterremoves signals greater than approximately 160 Hz. AnOP2177 buffers, inverts, and gains the common-modevoltage taken at the midpoint of the AD8220 gainsetting resistors. This right leg drive circuit helps cancelcommon-mode signals by inverting the common-modesignal and driving it back into the body. A 499 kV seriesresistor at the output of the OP2177 limits the currentdriven into the body.6-21

2.2pF10k10pF10k2.2pF15k+5V–5V+5V–5VC24.9k24.9kAD8220INSTRUMENTATIONAMPLIFIERG = +144.12k2.5VHIGH-PASSFILTER 0.033Hz–5V+5V+5V4.7F220pF1.18kG = +5057.6k1M+5V14kAD8618LOW-PASS FIFTH-ORDER FILTER AT 157Hz14k47nF+5V19.3kAD861833nF33nFAD8618+5V1.15k4.99k14.5k19.3k 14.5k68nFAD8618+5V22nFOP21772.5V2.5V2.5V2.5VA B499k–5V68pF866k+5VOP217712.7k5002.7nFAD7685REF+5VADC4.7FREFERENCEADR435–5VFigure 6-46. An example of an ECG schematic.6-22

Table 6-3. Typical Transducer CharacteristicsRecommendedTransducer Type Type of Output Output Z ADI In-Amp/Diff AmpThermistor resistance changes 50 to 1 M AD620, AD621, AD623,with temperature (–TC), @ +25C AD627, AD629, AD8221,4%/C @ +25C,AD8225high nonlinear output,single-supplyThermocouple low source Z, 20 to 20 k AD620, AD621, AD623,10 V/C to 100 V/C, (10 typ) AD627, AD8221, AD8222,mV output levelAD8230@ +25C single-supplyResistance Temperature Low source Z 20 to 20 k AD620, AD621, AD623,Detector (RTD) with temperature (+TC), @ 0C AD627, AD8221, AD8225,(In Bridge Circuit) 0.1%/C to 0.66%/C, AD8230, AD8250, AD8251,single- or dual-supplyAD8555, AD8556Level Sensors Thermistor output (low), 500 to 2 k AD626, AD628, AD629,Thermal Types variable resistance, 100 to 2 k AD8225, AD8553Float Typesoutput of mV to several volts,single-supplyLoad Cell Variable resistance, 120 to 1 k AD620, AD621, AD8221,(Strain Gage Bridge) 2 mV/V of excitation, AD8222, AD8225, AD8230,(Weight Measurement) 0.1% typical full-scale change, AD8555, AD8556single- or dual-supplyCurrent Sense (Shunt) Low value resistor output, A few ohms AD626, AD628, AD629,high common-mode voltage (or less) AD8202, AD8205EKG Monitors low level differential, 500 k AD620, AD621, AD623,(Single-Supply output voltage, AD627, AD8220, AD8221,Bridge Configuration) 5 mV output typical, AD8222, AD8225, AD8553single- or dual-supplyPhotodiode Sensor Current increases 10 9 AD620, AD621, AD622,with light intensity,AD623, AD627, AD8220,1 pA to 1 A I OUTPUT,single-supplyAD8221, AD8222, AD8555Hall Effect Magnetic 5 mV/kg to 120 mV/kg 1 to 1 k AD620, AD621, AD622,AD623, AD627, AD8221,AD8222, AD8230, AD8250,AD82516-23

Three in-amps are used to provide three separate outputsfor monitoring the patient’s condition. SuitableADI products include AD8221, AD627, and AD623in-amps and AD8641, AD8642 (dual), and AD8643(quad) op amps for use as the buffer. Each in-amp isfollowed by a high-pass filter that removes the dc componentfrom the signal. It is common practice to omitone of the in-amps and determine the third output bysoftware (or hardware) calculation.Proper safeguards, such as isolation, must be added tothis circuit to protect the patient from possible harm.REMOTE LOAD-SENSING TECHNIQUEThe circuit of Figure 6-47 is a unity-gain instrumentationamplifier that uses its sense and reference pins to minimizeany errors due to parasitic voltage drops within thecircuit. If heavy output currents are expected, and thereis a need to sense a load that is some distance away fromthe circuit, voltage drops due to trace or wire resistancecan cause errors. These voltage drops are particularlytroublesome with low resistance loads, such as 50 .The sense terminal completes the feedback path for theinstrumentation amplifier output stage and is normallyconnected directly to the in-amp output. Similarly, thereference terminal sets the reference voltage about whichthe in-amp’s output will swing. This connection putsthe IR drops inside the feedback loop of the in-ampand virtually eliminates any IR errors.This circuit will provide a 3 dB bandwidth better than3 MHz. Note that any net capacitance between thetwisted pairs is isolated from the in-amp’s output by25 k resistors, but any net capacitance between thetwisted pairs and ground needs to be minimized tomaintain stability. So, unshielded twisted pair cable isrecommended for this circuit. For low speed applicationsthat require driving long lengths of shielded cable,the AMP01 should be substituted for the AMP03device. The AMP01 can drive capacitance loads upto 1 F, while the AMP03 is limited to driving a fewhundred pF.A PRECISION VOLTAGE-TO-CURRENTCONVERTERFigure 6-48 is a precision voltage-to-current converterwhose scale factor is easily programmed for exact decaderatios using standard 1% metal film resistor values.The AD620 operates with full accuracy on standard5 V power supply voltages. Note that although thequiescent current of the AD620 is only 900 A, theaddition of the AD705 will add an additional 380 Acurrent consumption.A CURRENT SENSOR INTERFACEFigure 6-49 shows a novel circuit for sensing low levelcurrents. It makes use of the large common-mode range ofthe AD626. The current being measured is sensed acrossresistor R S . The value of R S should be less than 1 kand should be selected so that the average differentialvoltage across this resistor is typically 100 mV.To produce a full-scale output of +4 V, a gain of 40 isused, adjustable by +20% to absorb the tolerance in thesense resistor. Note that there is sufficient headroom toallow at least a 10% overrange (to +4.4 V).+V IN–IN225k25k5SENSETWISTEDPAIRS7+V CC*AMP036OUTPUT4–V EEREMOTELOAD+IN325k25k1REFERENCE–V IN*1N4148 DIODES ARE OPTIONAL. DIODES LIMIT THE OUTPUTTWISTEDPAIRS*OUTPUTGROUNDVOLTAGE EXCURSION IF SENSE AND/OR REFERENCE LINESBECOME DISCONNECTED FROM THE LOAD.Figure 6-47. A remote load sensing connection.6-24

V IN+3 7+V S0.1FAD705*8+ V X –R G AD620 6R115+V 0.1FV SIN–2 47–V62SVxI L =R1 = [(V IN+ ) – (V IN– )] G0.1F4R13–V SWHERE G = 1 + 49,4000.1FR G* REFER TO THE ANALOG DEVICES WEBSITE AT WWW.ANALOG.COMFOR THE LATEST OP AMP PRODUCT NUMBERS AND SPECIFICATIONS.LOADFigure 6-48. A precision voltage-to-current converter that operates on 5 V supplies.I LCURRENT INCURRENT OUTCURRENTSENSOR–V SR S123–IN200kANALOGGND–V S1/6G = 30200k+ING = 100+V S876R S+V S0.1FCFOPTIONALLOW-PASSFILTER4FILTER100kAD626G = 2OUT50.1FOUTPUTOUTPUT BUFFERING, LOW POWER IN-AMPSThe AD627 low power in-amp is designed to drive loadimpedances of 20 k or higher, but can deliver up to20 mA to heavier loads with low output voltage swings.If more than 20 mA of output current is required, theAD627’s output should be buffered with a precisionlow power op amp, such as the AD820, as shown inFigure 6-50. This op amp can swing from 0 V to 4 Von its output while driving a load as small as 600 .The addition of the AD820 isolates the in-amp from theload, thus greatly reducing any thermal effects.Figure 6-49. Current sensor interface.6-250.1F7316R G AD627852 4 REF0.1F–V S+V S320.1F760.1F4–V SAD820*V OUT* REFER TO THE ANALOG DEVICES WEBSITE ATWWW.ANALOG.COM FOR THE LATEST OP AMPPRODUCT NUMBERS AND SPECIFICATIONS.Figure 6-50. Output buffer for low power in-amps.

A 4 TO 20 mA SINGLE-SUPPLY RECEIVERFigure 6-51 shows how a signal from a 4 to 20 mAtransducer can be interfaced to the ADuC812, a 12-bitADC with an embedded microcontroller. The signal froma 4 to 20 mA transducer is single-ended. This initiallysuggests the need for a simple shunt resistor to convertthe current to a voltage at the high impedance analoginput of the converter. However, any line resistance inthe return path (to the transducer) will add a currentdependentoffset error. So, the current must be senseddifferentially. In this example, a 24.9 shunt resistorgenerates a maximum differential input voltage to theAD627 of between 100 mV (for 4 mA in) and 500 mV(for 20 mA in). With no gain resistor present, the AD627amplifies the 500 mV input voltage by a factor of 5 to2.5 V, the full-scale input voltage of the ADC. The zerocurrent of 4 mA corresponds to a code of 819, and theLSB size is 0.61 mV.4 TO 20mATRANSDUCERLINEIMPEDANCEJ-TYPETHERMOCOUPLE4 TO 20mA6-26A SINGLE-SUPPLY THERMOCOUPLEAMPLIFIERBecause the common-mode input range of the AD627extends 0.1 V below ground, it is possible to measuresmall differential signals with little or no commonmodecomponent. Figure 6-52 shows a thermocoupleapplication where one side of the J-type thermocoupleis grounded. Over a temperature range from –200Cto +200C, the J-type thermocouple delivers a voltageranging from –7.890 mV to +10.777 mV.A programmed gain on the AD627 of 100 (R G = 2.1 k)and a voltage on the AD627 REF pin of 2 V results inthe AD627’s output voltage ranging from 1.110 V to3.077 V relative to ground.SPECIALTY PRODUCTSAnalog Devices sells a number of specialty products,many of which were designed for the audio market thatare useful for some in-amp applications. Table 6-4 listssome of these products.31+5V0.1 FAD62724.9 R G852 4 REFG = 5Figure 6-51. A 4 to 20 mA receiver circuit.THERMOCOUPLEWIRESCOLD JUNCTIONCOMPENSATIONCOPPERWIRESR G73182+5V6AD627470.1F5 REFV REF AVDD DVDD+5V +5V0.1 F 0.1 FAIN 0–76ADuC812MICROCONVERTERAGNDV OUTFigure 6-52. A thermocouple amplifier using a low power, single-supply in-amp.Table 6-4. Specialty Products Available from Analog DevicesPartCMRNumber Description BW (DC) Supply FeaturesSSM2141 Diff line receiver 3 MHz 100 dB 18 V High CMR, audio subtractorSSM2143 Diff line receiver 7 MHz (G = 0.5) 90 dB 6 V to 18 V Low distortion, audio subtractorSSM2019 Audio preamp 2 MHz (G = 1) 74 dB 5 V to 18 V Low noise, low distortion, audio IA+2VDGND

Chapter VIIMATCHING IN-AMP CIRCUITS TO MODERN ADCsCalculating ADC RequirementsThe resolution of commercial ADCs is specified in bits.In an ADC, the available resolution equals (2 n ) – 1, wheren is the number of bits. For example, an 8-bit converterprovides a resolution of (2 8 ) – 1, which equals 255. In thiscase, the full-scale input range of the converter dividedby 255 will equal the smallest signal it can resolve. Forexample, an 8-bit ADC with a 5 V full-scale input rangewill have a limiting resolution of 19.6 mV.In selecting an appropriate ADC to use, we need to finda device that has a resolution better than the measurementresolution but, for economy’s sake, not a greatdeal better.Table 7-1 provides input resolution and full-scale inputrange using an ADC with or without an in-amp preamplifier.Note that the system resolution specified in the figurerefers to that provided by the converter together with thein-amp preamp (if used). Also, note that for any low levelmeasurement, not only are low noise semiconductor devicesneeded, but also careful attention to component layout,grounding, power supply bypassing, and often, the use ofbalanced, shielded inputs.For many applications, an 8-bit or 10-bit converteris appropriate. The decision to use a high resolutionconverter alone, or to use a gain stage ahead of alower resolution converter, depends on which is moreimportant: component cost, or parts count and easeof assembly.One very effective way to raise system resolution is toamplify the signal first, to allow full use of the dynamicrange of the ADC. However, this added gain ahead of theconverter will also increase noise. Therefore, it is oftenuseful to add low-pass filtering between the output of anin-amp (or other gain stage) and the input of the converter.Also, in most cases, the system bandwidth should not beset higher than that required to accurately measure thesignal of interest. A good rule of thumb is to set the –3 dBcorner frequency of the low-pass filter at 10 to 20 timesthe highest frequency that will be measured.Adding amplification before the ADC will also reducethe circuit’s full-scale input range, but it will lower theresolution requirements (and, therefore, the cost) ofthe ADC (see Figure 7-1).For example, using an in-amp with a gain of 10 ahead ofan 8-bit, 5 V ADC will increase circuit resolution from19.5 mV (5 V/256) to 1.95 mV. At the same time, thefull-scale input range of the circuit will be reduced to500 mV (5 V/10).Table 7-1. Typical System Resolutions vs. Converter Resolution and Preamp (IA) GainConverterResolutionSystemmV/Bit In-Amp FS Range ResolutionConverter Type (2 n ) – 1 (5 V/((2 n ) – 1)) Gain (V p-p) (mV p-p)10-Bit 1023 4.9 mV 1 5 4.910-Bit 1023 4.9 mV 2 2.5 2.4510-Bit 1023 4.9 mV 5 1 0.9810-Bit 1023 4.9 mV 10 0.5 0.4912-Bit 4095 1.2 mV 1 5 1.212-Bit 4095 1.2 mV 2 2.5 0.612-Bit 4095 1.2 mV 5 1 0.2412-Bit 4095 1.2 mV 10 0.5 0.1214-Bit 16,383 0.305 mV 1 5 0.30514-Bit 16,383 0.305 mV 2 2.5 0.15314-Bit 16,383 0.305 mV 5 1 0.06114-Bit 16,383 0.305 mV 10 0.5 0.03116-Bit 65,535 0.076 mV 1 5 0.07616-Bit 65,535 0.076 mV 2 2.5 0.03816-Bit 65,535 0.076 mV 5 1 0.01516-Bit 65,535 0.076 mV 10 0.5 0.0087-1

Matching ADI In-Amps with Some Popular ADCsTable 7-2 shows recommended ADCs for use with the latest generation of ADI in-amps.Table 7-2. Recommended ADCs for Use with ADI In-AmpsADI In-AmpAD8221ARSmall Signal BW: 562 kHzNoise (e NI ):8 nV/√HzV OS :60 V maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 3.9 VCMR:90 dB (dc to 60 Hz)Nonlinearity: 10 ppm maxSupply Voltage: 5 VSupply Current: 1 mA max0.01% Settling Timefor 5 V Step: 5 s0.001% Settling Timefor 5 V Step: 6 sRecommended ADI ADC#1AD7685, AD7687Resolution:16 bitsInput Range: 0 V to 5 VSampling Rate: Up to 250 kSPSS/D Supply: 3 V or 5 VPower:1.7 mW @ 2.5 V and6 mW typ @ 5 VComments:Same package, the AD7685can be driven through asimple RC from the AD8221directly. The REF pin can bedriven to fit the ADC range.Recommended ADI ADC#2AD7453/AD7457Resolution:12 bitsInput Range: 0 V to V DDSampling Rate: 555 kSPS/100 kSPSS/D Supply: 3 V or 5 VPower:0.3 mA @ 100 kSPSComments:Single channel, pseudodifferential inputs in aSOT-23 packageADI In-AmpAD620ARSmall Signal BW: 800 kHzNoise (e NI ):9 nV/√HzV OS :125 V maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 3.9 VCMR:73 dB (dc to 60 Hz)Nonlinearity: 40 ppm maxSupply Voltage: 5 VSupply Current: 1.3 mA max0.01% Settling Timefor 5 V Step: 7 sRecommended ADI ADC#1AD7610, AD7663Resolution:16 bitsInput Range: Multiple, such as 10 V,5 V, ...Sampling Rate: Up to 250 kSPSS/D Supply: 5 VPower:2.7 mA @ 100 kSPSComments:Allow more and largerinput rangesRecommended ADI ADC#2AD7895Resolution:12 bitsInput Range: Multiple, such as 10 V,2.5 V, 0 V to 2.5 VSampling Rate: 200 kSPSS/D Supply: 5 VPower:2.2 mA @ 100 kSPSComments:Allows a bipolar or unipolarinput with a single supply7-2

Table 7-2. Recommended ADCs for Use with ADIIn-Amps (continued)ADI In-Amp AD8225 Fixed Gain of 5Small Signal BW: 900 kHzNoise (e NI ):8 nV/√HzV OS :125 V maxIn-Amp Gain: 5Maximum OutputVoltage Swing: 4 VCMR:90 dB (dc to 60 Hz)Nonlinearity:10 ppm maxSupply Voltage: 5 VSupply Current: 1.2 mA max0.01% Settling Timefor 5 V Step: 3.2 s0.001% Settling Timefor 5 V Step: 4 sRecommended ADI ADC#1AD7661Resolution:16 bitsInput Range:0 V to 2.5 VSampling Rate: Up to 100 kSPSS/D Supply:5 VPower:8 mA @ 100 kSPS withreferenceComments:Provide a reference voltageRecommended ADI ADC#2AD7940Resolution:14 bitsInput Range:0 V to V DDSampling Rate: 100 kSPSS/D Supply:3 V or 5 VPower:0.83 mA @ 100 kSPSComments:Single channel in an SOT-23ADI In-AmpAD623ARSmall Signal BW: 100 kHzNoise (e NI ):35 nV/√HzV OS :200 V maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 4.5 VCMR:90 dB (dc to 60 Hz)Nonlinearity:50 ppm typSupply Voltage: 5 VSupply Current: 0.55 mA max0.01% Settling Timefor 5 V Step: 20 sRecommended ADI ADC#1AD7866Resolution:12 bitsInput Range:0 V to V REF V or 0 V to2 V REF VSampling Rate: 1 MSPS for both ADCsS/D Supply:Single, 2.7 V to 5.25 VPower:24 mW max at 1 MSPS with5 V supply 11.4 mW max at1 MSPS with 3 V supplyComments:Dual, 2-channel, simultaneoussampling ADC with aserial interfaceRecommended ADI ADC#2AD7862/AD7864Resolution:12 bitsInput Range: 0 V to +2.5 V, 0 V to +5 V,2.5 V, 5 V, 10 VSampling Rate: 600 kSPS for one channelS/D Supply:Single, 5 VPower:90 mW typComments:4-channel, simultaneoussampling ADC with aparallel interfaceRecommended ADI ADC#3AD7863/AD7865Resolution:14 bitsInput Range: 0 V to +2.5 V, 0 V to +5 V,2.5 V, 5 V, 10 VSampling Rate: 175 kSPS for both channels/360 kSPS for one channel,respectivelyS/D Supply:Single, 5 VPower:70 mW typ/115 mV typ,respectivelyComments:2-/4-channel, respectively,simultaneous sampling ADCwith a parallel interfaceRecommended ADI ADC#4AD7890/AD7891/AD7892Resolution:12 bitsInput Range:0 V to +2.5 V, 0 V to+4.096 V, 0 V to +5 V,2.5 V, 5 V10 VSampling Rate: 117/500/600 kSPS, respectivelyS/D Supply:Single, 5 VPower:30/85/60 mW typ, respectivelyComments:8-/8-/1-channel, respectively7-3

Table 7-2. Recommended ADCs for Use with ADIIn-Amps (continued)ADI In-Amp AD627ARSmall Signal BW: 30 kHzNoise (e NI ):38 nV/√HzV OS :200 V maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 4.9 VCMR:77 dB (dc to 60 Hz)Nonlinearity: 100 ppm maxSupply Voltage: 5 VSupply Current: 85 A max0.01% Settling Timefor 5 V Step: 135 sRecommended ADI ADC#1AD7923/AD7927Resolution:12 bitsInput Range: 0 V to V REF or 0 V to2 V REFSampling Rate: 200 kSPSS/D Supply: Single, 2.7 V to 5.25 VPower:3.6 mW max @ 200 kSPSwith a 3 V supplyComments:8-/4-channel ADCs,respectively, with a serialinterface and channelsequencerRecommended ADI ADC#2AD7920Resolution:12 bitsInput Range: 0 to V DDSampling Rate: 250 kSPSS/D Supply: 2.35 V or 5.25 VPower:3 mW typ @ 250 kSPS with3 V supplyComments:Single channel, serial ADC in6-lead SC70ADI In-Amp AD8220ARJFET In-AmpSmall Signal BW: 1000 kHzNoise (e NI ):15 nV/√HzV OS :1 mV maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 64.8 VCMRR:110 dB (dc to 60 Hz)Nonlinearity: 10 ppm maxSupply Voltage: Dual, 65 VSupply Current: 1 mA max0.01% Settling Timefor 5 V step: 5 msRecommended ADI ADC#1AD7610/AD7663Resolution:16 bitsInput Range: 62.5 V, 65 V, 610 VSampling Rate: 250 kSPS for both ADCsS/D Supply: 65 V to 615 V and 5 VRecommended ADC#2AD7321, AD7323, and AD7327Resolution:13 bitsInput Range: 62.5 V, 65 V, 610 VSampling Rate: 500 kSPSS/D Supply: 65 V to 615 V and +5 VPower:17 mW max at 0.5 MSPSwith 615 V, and 5 V supplyRecommended ADI ADC#3AD7898-3Resolution:12 bitsInput Range: 62.5 VSampling Rate: 220 kSPSS/D Supply: 5 VPower:22.5 mW max at 220 kSPSwith 5 V supply7-4

Table 7-2. Recommended ADCs for Use with ADIIn-Amps (continued)ADI In-Amp AD8230RZZero Drift In-AmpSmall Signal BW: 2 kHzNoise (e NI ):240 nV/√HzV OS :10 mV maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 64.7 VCMRR:120 dB (dc to 60 Hz)Nonlinearity: 20 ppm maxSupply Voltage: 65 VSupply Current: 3.5 mA maxRecommended ADI ADC#1AD7942Resolution:14 bitsInput Range: 5 VSampling Rate: 250 kSPSS/D Supply: 2.7 V to 5.25 VPower:1.25 mW, 2.5 V supplyRecommended ADI ADC#2AD7321Resolution:13 bitsInput Range: 62.5 VSampling Rate: 500 kSPSS/D Supply: 65 V to 615 V,2.7 V to 5.25 VPower:17 mW max at 500 kSPSwith 615 V, 5 V supplyNOTE: Specifications are preliminary. Refer to www.analog.com.ADI In-Amp AD8250/AD8251High Speed Programmable Gain In-AmpSmall Signal BW: 10 MHzNoise (e NI ):13 nV/√HzV OS :100 mVIn-Amp Gain: 10Maximum OutputVoltage Swing: V CC – 1.2 V, V CC + 1.2 VCMRR:100 dB (dc to 60 Hz)Nonlinearity: 40 ppm maxSupply Voltage: Dual, 65 V to 612 VSupply Current: 3 mA typ0.01% Settling Timefor 5 V step: 0.5 msRecommended ADI ADC#1AD7685, AD7687Resolution:16 bitsInput Range: 5 VSampling Rate: 250 kSPSS/D Supply: Single, 2.5 V to 5 VPower:4 mW at 0.1 kSPS, 5 V supplyRecommended ADI ADC#2AD7327, AD7323, and AD7321Resolution:13 bits/12 bitsInput Range: 62.5 VSampling Rate: 0.5 MSPSS/D Supply: 65 V to 615 V, single, 5 VPower:17 mW max at 500 kSPSwith 615 V, 5 V supply7-5

Table 7-2. Recommended ADCs for Use with ADIIn-Amps (continued)ADI In-Amp AD8553RMZero Drift In-AmpSmall Signal BW: 1 kHzNoise (e NI ):150 nV/√HzV OS :50 mV maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 0.075 V to 4.925 VCMRR:120 dB (dc to 60 Hz)Nonlinearity: 600 ppm maxSupply Voltage: Single, 5 VSupply Current: 1.3 mA maxRecommended ADI ADC#1AD7476Resolution:12 bitsInput Range: 0 to V DDSampling Rate: 1 MSPSS/D Supply: 2.35 V to 5.25 VPower:3.6 mW max at 1 MSPSwith 3 V supply15 mW max at 1 MSPSwith 5 V supplyRecommended ADI ADC#2AD7466Resolution:12 bitsInput Range: 0 to V DDSampling Rate: 100 kSPSS/D Supply: 1.6 V to 3.6 VPower:0.62 mW max at 100 kSPSwith 3 V supply0.12 mW max at 100 kSPSwith 1.6 V supplyADI In-Amp AD8555AR/AD8556ARZZero Drift In-AmpSmall Signal BW: 150 kHzNoise (e NI ):32 nV√HzV OS :10 mV maxIn-Amp Gain: 10Maximum OutputVoltage Swing: 30 mV to 4.94 VCMRR:100 dB (G = 70, dcto 200 Hz)Nonlinearity: 1000 ppm typSupply Voltage: Single, 5 VSupply Current: 2.5 mA max0.1% Settling Timefor 4 V step: 8 msRecommended ADI ADC#1AD7685Resolution:16 bitsInput Range: 5 VSampling Rate: 250 kSPSS/D Supply: Single, 2.5 V to 5 VPower:4 mW at 0.1 SPS with5 V supplyRecommended ADI ADC#2AD7476Resolution:12 bitsInput Range: 0 to V DDSampling Rate: 1 MSPSS/D Supply: 2.35 V to 5.25 VPower:3.6 mW max at 1 MSPSwith 3 V supply15 mW max at 1 MSPSwith 5 V supplyRecommended ADI ADC#3AD7476AResolution:12 bitsInput Range: 0 to V DDSampling Rate: 1 MSPSS/D Supply: 2.7 V to 5.25 VPower:3.6 mW max at 1 MSPSwith 3 V supply12.5 mW max at 1 MSPSwith 5 V supply7-6

PIXEL LEVELPIXEL#1PIXEL#2REFERENCELEVELPIXEL LEVELINPUTREFERENCELEVEL INPUTSAMPLE-AND-HOLDINSTRUMENTATIONAMPLIFIERNEED 12-BITACCURACY@1MHzDCCORRECTEDOUTPUT2MHz500nsADCAD7266,AD7322,ETC.TOTAL SETTLING TIME FOR SAMPLE-AND-HOLDAND IN-AMP MUST BE LESS THAN 500nsFigure 7-1. In-amp buffers ADC and provides dc correction.High Speed Data AcquisitionAs the speed and accuracy of modern data acquisitionsystems have increased, a growing need for highbandwidth instrumentation amplifiers has developed—particularly in the field of CCD imaging equipmentwhere offset correction and input buffering are required.Here, double-correlated sampling techniques are oftenused for offset correction of the CCD imager. As shownin Figure 7-1, two sample-and-hold amplifiers monitorthe pixel and reference levels, and a dc-correctedoutput is provided by feeding their signals into aninstrumentation amplifier.Figure 7-2 shows how a single multiplexed highbandwidth in-amp can replace several slow speednonmultiplexed buffers. The system benefits fromthe common-mode noise reduction and subsequentincrease in dynamic range provided by the in-amp.SIGNALINPUTSSIGNALINPUTSMUXMUXHIGH SPEED IAADCAD7266,AD7322,ETC.Figure 7-2. Single high speed in-amp andmux replace several slow speed buffers.Previously, the low bandwidths of commonly availableinstrumentation amplifiers, plus their inability todrive 50 loads, restricted their use to low frequencyapplications—generally below 1 MHz. Some higherbandwidth amplifiers have been available, but thesehave been fixed-gain types with internal resistors. Withthese amplifiers, there was no access to the inverting andnoninverting terminals of the amplifier. Using modernop amps and employing the complementary bipolar(CB) process, video bandwidth instrumentation amplifiersthat offer both high bandwidths and impressive dcspecifications may now be constructed. Common-moderejection may be optimized by trimming or by usinglow cost resistor arrays.7-7

The bandwidth and settling time requirements demandedof an in-amp buffering an ADC, and for thesample-and-hold function preceding it, can be quitesevere. The input buffer must pass the signal alongfast enough so that the signal is fully settled beforethe ADC takes its next sample. At least two samplesper cycle are required for an ADC to unambiguouslyprocess an input signal (FS/2)—this is referred to asthe Nyquist criteria. Therefore, a 2 MHz ADC, such asthe AD7266 or AD7322, requires that the input buffer/sample-and-holdsections preceding it provide12-bit accuracy at a 1 MHz bandwidth. Settling timeis equally important: the sampling rate of an ADC isthe inverse of its sampling frequency—for the 2 MHzADC, the sampling rate is 500 ns. This means thatfor a total throughput rate of less than 1 s, thesesame input buffer/sample-and-hold sections musthave a total settling time of less than 500 ns.A High Speed In-Amp Circuit for Data AcquisitionFigure 7-3 shows a discrete in-amp circuit using twoAD825 op amps and an AMP03 differential (subtractor)amplifier. This design provides both high performanceand high speed at moderate gains. Circuit gain is set byresistor R G where gain = 1 + 2 R F /R G . The R F resistorsshould be kept at around 1 k to ensure maximumbandwidth. Operating at a gain of 10 (using a 222 resistor for R G ) the –3 dB bandwidth of this circuitis approximately 3.4 MHz. The ac common-moderejection ratio (gain of 10, 1 V p-p common-modesignal applied to the inputs) is 60 dB from 1 Hzto 200 kHz and 43 dB at 2 MHz. And it providesbetter than 46 dB CMRR from 4 MHz to 7 MHz.The RFI rejection characteristics of this amplifier arealso excellent—the change in dc offset voltage vs.common-mode frequency is better than 80 dB from1 Hz up to 15 MHz. Quiescent supply current for thiscircuit is 15 mA.For lower speed applications requiring a low inputcurrent device, the AD823 FET input op amp can besubstituted for the AD825.This circuit can be used to drive a modern, high speedADC such as the AD871 or AD9240, and to providevery high speed data acquisition. The AD830 can alsobe used for many high speed applications.–V IN+V SV OUTAD825*–V S0.01F0.01FR F1k–IN225k25k57SENSE+V S+V IN+V S0.01FAD825*–V S0.01FR GR F222k1k+IN3AMP0325k25k* REFER TO ANALOG DEVICES WEBSITE AT WWW.ANALOG.COM FOR THE LATEST OP AMPPRODUCTS AND SPECIFICATIONS.Figure 7-3. A High performance, high speed in-amp circuit.641OUTPUT–V SREFADC7-8

Appendix AINSTRUMENTATION AMPLIFIER SPECIFICATIONSTo successfully apply any electronic component, a fullunderstanding of its specifications is required. That is tosay, the numbers contained in a data sheet are of littlevalue if the user does not have a clear picture of whateach specification means.In this section, a typical monolithic instrumentationamplifier data sheet is reviewed. Some of the moreimportant specifications are discussed in terms of howthey are measured and what errors they might contributeto the overall performance of the circuit.Table A-1 shows a portion of the data sheet for the AnalogDevices AD8221 instrumentation amplifier.ABCTable A-1. AD8221 Specifications 1AR Grade BR Grade ARM GradeParameter Conditions Min Typ Max Min Typ Max Min Typ Max UnitCOMMON-MODEREJECTION RATIO (CMRR)CMRR DC to 60 Hz with1 k Source Imbalance V CM = –10 V to +10 VG = 1 80 90 80 dBG = 10 100 110 100 dBG = 100 120 130 120 dBG = 1000 130 140 130 dBCMRR at 10 kHzV CM = –10 V to +10 VG = 1 80 80 80 dBG = 10 90 100 90 dBG = 100 100 110 100 dBG = 1000 100 110 100 dBDENOISE RTI noise = √e 2 NI + (e NO /G) 2Voltage Noise, 1 kHzInput Voltage Noise, e NI V IN+ , V IN– , V REF = 0 8 8 8 nV/√Hzoutput Voltage Noise, e NO 75 75 75 nV/√HzRTIf = 0.1 Hz to 10 HzG = 1 2 2 2 µV p-pG = 10 0.5 0.5 0.5 µV p-pG = 100 to 1000 0.25 0.25 0.25 µV p-pCurrent Noise f = 1 kHz 40 40 40 fA/√Hzf = 0.1 Hz to 10 Hz 6 6 6 pA p-pVOLTAGE OFFSET 2Input Offset, V OSI V S = 5 V to 15 V 60 25 70 µVover Temperature T = –40C to +85c 86 45 135 µVAverage TC 0.4 0.3 0.9 µV/COutput Offset, V OSO V S = 5 V to 15 V 300 200 600 µVover Temperature T = –40C to +85c 0.66 0.45 1.00 mVAverage TC 6 5 9 µV/COffset RTI vs. Supply (PSR) V S = 2.3 V to 18 VG = 1 90 110 94 110 90 100 dBG = 10 110 120 114 130 100 120 dBG = 100 124 130 130 140 120 140 dBG = 1000 130 140 140 150 120 140 dBINPUT CURRENTInput Bias Current 0.5 1.5 0.2 0.4 0.5 2 nAover Temperature T = –40C to +85c 2.0 1 3 nAAverage TC 1 1 3 pA/CInput Offset Current 0.2 0.6 0.1 0.4 0.3 1 nAover Temperature T = –40C to +85c 0.8 0.6 1.5 nAAverage TC 1 1 3 pA/CA-1

FGHHIJKAR Grade BR Grade ARM GradeParameter Conditions Min Typ Max Min Typ Max Min Typ Max UnitREFERENCE INPUTR IN 20 20 20 kI IN V IN+ , V IN– , V REF = 0 50 60 50 60 50 60 AVoltage Range –V S +V S –V S +V S –V S +V S VGain to Output 1 0.0001 1 0.0001 1 0.0001 V/VPOWER SUPPLYOperating Range V S = 2.3 V to 18 V 2.3 18 2.3 18 2.3 18 VQuiescent Current 0.9 1 0.9 1 0.9 1 mAover Temperature T = –40C to +85c 1 1.2 1 1.2 1 1.2 mADYNAMIC RESPONSESmall Signal, –3 dBBandwidthG = 1 825 825 825 kHzG = 10 562 562 562 kHzG = 100 100 100 100 kHzG = 1000 14.7 14.7 14.7 kHzSettling Time 0.01% 10 V stepG = 1 to 100 10 10 10 sG = 1000 80 80 80 sSettling Time 0.001% 10 V stepG = 1 to 100 13 13 13 sG = 1000 110 110 110 sSlew Rate G = 1 1.5 1.7 1.5 1.7 1.5 1.7 V/sG = 5 to 100 2 2.5 2 2.5 2 2.5 V/sGAIN G = 1 + (49.4 k/R G )Gain Range 1 1000 1 1000 1 1000 V/VGain ErrorV OUT 10 VG = 1 0.03 0.02 0.1 %G = 10 0.3 0.15 0.3 %G = 100 0.3 0.15 0.3 %G = 1000 0.3 0.15 0.3 %L Gain Nonlinearity V OUT = –10 V to +10 VG = 1 to 10 r L = 10 k 3 10 3 10 5 15 ppmG = 100 r L = 10 k 5 15 5 15 7 20 ppmG = 1000 r L = 10 k 10 40 10 40 10 50 ppmG = 1 to 100 r L = 2 k 10 95 10 95 15 100 ppmM Gain vs. TemperatureG = 1 3 10 2 5 3 10 ppm/CG > 1 3 –50 –50 –50 ppm/CINPUTInput ImpedanceDifferential 100 || 2 100 || 2 100 || 2 G || pFcommon Mode 100 || 2 100 || 2 100 || 2 G || pFInput OperatingVoltage Range 4 V S = 2.3 V to 5 V –V S + 1.9 +V S – 1.1 –V S + 1.9 +V S – 1.1 –V S + 1.9 +V S – 1.1 Vover Temperature T = –40C to +85C –V S + 2.0 +V S – 1.2 –V S + 2.0 +V S – 1.2 –V S + 2.0 +V S – 1.2 VInput OperatingVoltage Range V S = 5 V to 18 V –V S + 1.9 +V S – 1.2 –V S + 1.9 +V S – 1.2 –V S + 1.9 +V S – 1.2 Vover Temperature T = –40C to +85C –V S + 2.0 +V S – 1.2 –V S + 2.0 +V S – 1.2 –V S + 2.0 +V S – 1.2 VOUTPUTr L = 10 kOutput Swing V S = 2.3 V to 5 V –V S + 1.1 +V S – 1.2 –V S + 1.1 +V S – 1.2 –V S + 1.1 +V S – 1.2 VNover Temperature T = –40C to +85COutput Swing V S = 5 V to 18 V–V S + 1.4–V S + 1.2+V S – 1.3+V S – 1.4–V S + 1.4–V S + 1.2+V S – 1.3+V S – 1.4–V S + 1.4–V S + 1.2+V S – 1.3 V+V S – 1.4 Vover Temperature T = –40C to +85C –V S + 1.6 +V S – 1.5 –V S + 1.6 +V S – 1.5 –V S + 1.6 +V S – 1.5 VShort-Circuit Current 18 18 18 mATEMPERATURE RANGESpecified Performance –40 +85 –40 +85 –40 +85 °COperational 4 –40 +125 –40 +125 –40 +125 °CNOTES1 V S = 15 V, V REF = 0 V, T A = +25C, G = 1, R L = 2 k, unless otherwise noted.2 Total RTI V OS = (V OSI ) + (V OSO /G).3 Does not include the effects of external resistor R G .4 One input grounded. G = 1.A-2

(A) Specifications (Conditions)A statement at the top of the data sheet explains thatthe listed specifications are typically @ T A = 25C,V S = 15 V, and R L = 10 k, unless otherwise noted.This tells the user that these are the normal operatingconditions under which the device is tested. Deviationsfrom these conditions might degrade (or improve) performance.For situations where deviations from the normalconditions (such as a change in temperature) are likely,the significant effects are usually indicated within thespecs. The statement at the top of the specifications tablealso tells us what all numbers are unless noted; typicalis used to state that the manufacturer’s characterizationprocess has shown a number to be average; however,individual devices may vary.Instrumentation amplifiers designed for true rail-to-railoperation have a few critical specifications that need tobe considered. Their input voltage range should allow thein-amp to accept input signal levels that are close to thepower supply or ground. Their output swing should bewithin 0.1 V of the supply line or ground. In contrast, atypical dual-supply in-amp can swing only within 2 V ormore of the supply or ground. In 5 V single-supply dataacquisition systems, an extended output swing is vitalbecause it allows the full input range of the ADC to beused, providing high resolution.(B) Common-Mode RejectionCommon-mode rejection is a measure of the change inoutput voltage when the same voltage is applied to bothinputs. CMR is normally specified as input, which allowsfor in-amp gain. As the gain is increased, there will be ahigher output voltage for the same common-mode inputvoltage. These specifications may be given for either afull range input voltage change or for a specified sourceimbalance in ohms.Common-mode rejection ratio is a ratio expression,while common-mode rejection is the logarithm ofthat ratio. Both specifications are normally referred tooutput (RTO).That is,ChangeinOutputVoltageCMRR =ChangeinCommon -Mode InputVoltageWhileCMR = 20 Log10 CMRRFor example, a CMRR of 10,000 corresponds to a CMRof 80 dB. For most in-amps, the CMR increases withgain because most designs have a front-end configurationthat rejects common-mode signals while amplifyingdifferential (i.e., signal) voltages.Common-mode rejection is usually specified for a fullrange common-mode voltage change at a given frequency,and a specified imbalance of source impedance (e.g., l ksource unbalance, at 60 Hz).(C) AC Common-Mode RejectionAs might be expected, an in-amp’s common-mode rejectiondoes vary with frequency. Usually, CMR is specifiedat dc or at very low input frequencies. At higher gains, anin-amp’s bandwidth does decrease, lowering its gain andintroducing additional phase shift in its input stage.Since any imbalance in phase shift in the differential inputstage will show up as a common-mode error, ac CMRRwill usually decrease with frequency. Figure A-1 showsthe CMR vs. frequency of the AD8221.CMR (dB)1601401201008060GAIN = 1000GAIN = 100GAIN = 10GAIN = 1GAIN = 10GAIN = 100GAIN = 1000400.1 1 10 100 1k 10k 100k 1MFREQUENCY (Hz)Figure A-1. AD8221 CMR vs. frequency.(D) Voltage OffsetVoltage offset specifications are often considered afigure of merit for instrumentation amplifiers. Whileany initial offset may be adjusted to zero through theuse of hardware or software, shifts in offset voltage dueto temperature variations are more difficult to correct.Intelligent systems using a microprocessor can use atemperature reference and calibration data to correctfor this, but there are many small signal, high gain applicationsthat do not have this capability.A-3

Voltage offset and drift comprise four separate errordefinitions: room temperature (25C), input and output,offset, and offset drift over temperature referred to bothinput and output.An in-amp should be regarded as a 2-stage amplifier withboth an input and an output section. Each section hasits own error sources. Because the errors of the outputsection are multiplied by a fixed gain (usually 2), thissection is often the principal error source at low circuitgains. When the in-amp is operating at higher gains, thegain of the input stage is increased. As the gain is raised,errors contributed by the input section are multiplied,while output errors are reduced. Thus, at high gains, theinput stage errors dominate.Input errors are those contributed by the input stagealone; output errors are those due to the output section.Input-related specifications are often combined andclassified together as referred to input (RTI) errors, whileall output-related specifications are considered referred tooutput (RTO) errors. It is important to understand thatalthough these two specifications often provide numbersthat are not the same, either error term is correct becauseeach defines the total error in a different way.For a given gain, an in-amp’s input and output errorscan be calculated using the following formulas:Total Error, RTI = Input Error + (Output Error/Gain)Total Error, RTO = (Gain Input Error) + Output ErrorSometimes the specification page will list an error term asRTI or RTO for a specified gain. In other cases, it is upto the user to calculate the error for the desired gain.As an example, the total voltage offset error of theAD620A in-amp when it is operating at a gain of 10can be calculated using the individual errors listed onits specifications page. The (typical) input offset of theAD620 (V OSI ) is listed as 30 µV. Its output offset (V OSO )is listed as 400 µV. The total voltage offset referred toinput (RTI) is equal toTotal RTI Error = V OSI + (V OSO /G) = 30 V +(400 V/10) = 30 V + 40 V = 70 VThe total voltage offset referred to the output (RTO)is equal toTotal Offset Error RTO = (G (V OSI )) + V OSO =(10 (30 V)) + 400 V = 700 V.Note that the RTO error is 10 times greater in valuethan the RTI error. Logically, it should be, because at again of 10, the error at the output of the in-amp shouldbe 10 times the error at the input.(E) Input Bias and Offset CurrentsInput bias currents are those currents flowing into orout of the input terminals of the in-amp. In-amps usingFET input stages have lower room temperature bias currentsthan their bipolar cousins, but FET input currentsdouble approximately every 11C. Input bias currentscan be considered a source of voltage offset error (i.e.,input current flowing through a source resistance causesa voltage offset). Any change in bias current is usually ofmore concern than the magnitude of the bias current.Input offset current is the difference between the two inputbias currents. It leads to offset errors in in-amps when sourceresistances in the two input terminals are unequal.Although instrumentation amplifiers have differentialinputs, there must be a return path for their bias currentsto flow to common (ground).If this return path is not provided, the bases (or gates)of the input devices are left floating (unconnected), andthe in-amp’s output will rapidly drift either to commonor to the supply.Therefore, when amplifying floating input sources suchas transformers (those without a center tap ground connection),ungrounded thermocouples, or any ac-coupledinput sources, there must still be a dc path from eachinput to ground. A high value resistor of 1 M to 10 Mconnected between each input and ground will normallybe all that is needed to correct this condition.(F) Operating Voltage RangeA single-supply in-amp should have the same overalloperating voltage range whether it is using single ordual supplies. That is, a single-supply in-amp, which isspecified to operate with dual-supply voltages from 1 Vto 18 V, should also operate over a 2 V to 36 V rangewith a single supply, but this may not always be the case.In fact, some in-amps, such as the AD623, will operateto even lower equivalent voltage levels in single-supplymode than with a dual-supply mode. For this reason, itis always best to check the data sheet specifications.(G) Quiescent Supply CurrentThis specifies the quiescent or nonsignal power supplycurrent consumed by an in-amp within a specifiedoperating voltage range.With the increasing number of battery-powered applications,device power consumption becomes a criticaldesign factor. Products such as the AD627 have a verylow quiescent current consumption of only 60 A, whichat 5 V is only 0.3 mW. Compare this power level to thatof an older, vintage dual-supply product, such as theAD526. That device draws 14 mA with a 15 V supplyA-4

(30 V total) for a whopping 420 mW, 1400 times thepower consumption of the AD627. The implications forbattery life are dramatic.With the introduction of products such as the AD627,very impressive overall performance is achieved while onlymicroamps of supply current are consumed. Of course,some trade-offs are usually necessary, so micropowerin-amps tend to have lower bandwidth and higher noisethan full power devices. The ability to operate rail-to-railfrom a single-supply voltage is an essential feature of anymicropower in-amp.(H) Settling TimeSettling time is defined as the length of time requiredfor the output voltage to approach, and remain within, acertain tolerance of its final value. It is usually specifiedfor a fast full-scale input step and includes output slewingtime. Since several factors contribute to the overallsettling time, fast settling to 0.1% does not necessarilymean proportionally fast settling to 0.01%. In addition,settling time is not necessarily a function of gain. Someof the contributing factors to long settling times includeslew rate limiting, underdamping (ringing), and thermalgradients (long tails).(I) GainThese specifications relate to the transfer function of thedevice. The product’s gain equation is normally listed atthe beginning of the specifications page.The gain equation of the AD8221 is49,400 ΩGain = + 1RGTo select an R G for a given gain, solve the followingequation for R G :RG = 49, 400 ΩG −1The following are samples of calculated resistance forsome common gains:G = 1: R G = (open circuit)G = 9.998: R G = 5.49 kG = 100: R G = 499 G = 991: R G = 49.9 Note that there will be a gain error if the standard resistancevalues are different from those calculated. Inaddition, the tolerance of the resistors used (normally 1%metal film) will also affect accuracy. There also will begain drift, typically 50 ppm/C to 100 ppm/C, if standardresistors are used. Of course, the user must provide a veryclean (low leakage) circuit board to realize an accurategain of 1, since even a 200 M leakage resistance willcause a gain error of 0.2%.Normal metal film resistors are within 1% of theirstated value, which means that any two resistors couldbe as much as 2% different in value from one another.Thin film resistors in monolithic integrated circuitshave an absolute tolerance of only 20%. The matchingbetween resistors on the same chip, however, can beexcellent —typically better than 0.1%—and resistorson the same chip will track each other thermally, sogain drift over temperature is greatly reduced.(J) Gain RangeOften specified as having a gain range of 1 to 1000, manyinstrumentation amplifiers will often operate at highergains than 1000, but the manufacturer will not promisea specific level of performance.(K) Gain ErrorIn practice, as the gain resistor becomes increasinglysmaller, any errors due to the resistance of the metal runsand bond wires inside the IC package become significant.These errors, along with an increase in noise and drift,may make higher gains impractical.In 3-op amp and in-amp designs, both gain accuracyand gain drift may suffer because the external resistordoes not exactly ratio match the IC’s internal resistors.Moreover, the resistor chosen is usually the closest 1%metal film value commonly available, rather than thecalculated resistance value; so this adds an additionalgain error. Some in-amps, such as the AD8230, use tworesistors to set gain. Assuming that gain is set solely bythe ratio of these two resistors in the IC, this can providepotentially significant improvement in both gain accuracyand drift. The best possible performance is provided bymonolithic in-amps that have all their resistors internalto the IC, such as the AD621.The number provided for this specification describesmaximum deviation from the gain equation. Monolithicin-amps, such as the AD8221, have very low factorytrimmedgain errors. Although externally connectedgain networks allow the user to set the gain exactly, thetemperature coefficients of these external resistors andthe temperature differences between individual resistorswithin the network all contribute to the circuit’s overallgain error.A-5

If the data eventually is digitized and fed to an intelligentsystem (such as a microprocessor), it may be possible tocorrect for gain errors by measuring a known referencevoltage and then multiplying by a constant.(L) NonlinearityNonlinearity is defined as the deviation from a straightline on the plot of an in-amp’s output voltage vs. inputvoltage. Figure A-2 shows the transfer function of adevice with exaggerated nonlinearity.The magnitude of this error is equal toActual Output – CalculatedOutputNonlinearity =Rated Full Scale Output RangeThis deviation can be specified relative to any straightline or to a specific straight line. There are two commonlyused methods of specifying this ideal straight line relativeto the performance of the device.–V IN FULL SCALEV OUTGAIN + MAX – MAXV IN+V IN FULL SCALEIDEAL(STRAIGHT LINE)ACTUALRESPONSE + MAX > – MAX + MAX + – MAX = KFigure A-2. Transfer function illustratingexaggerated nonlinearity.The best straight line method of defining nonlinearityconsists of measuring the peak positive and the peaknegative deviation and then adjusting the gain and offsetof the in-amp so that these maximum positive and negativeerrors are equal. For monolithic in-amps, this is usuallyaccomplished by laser-trimming thin film resistors orby other means. The best straight line method providesimpressive specifications, but it is much more difficultto perform. The entire output signal range needs to beexamined before trimming to determine the maximumpositive and negative deviations.The endpoint method of specifying nonlinearity requiresthat any offset and/or gain calibrations are performed atthe minimum and maximum extremes of the output range.Usually offset is trimmed at a very low output level, whilescale factor is trimmed near the maximum output level.This makes trimming much easier to implement but mayresult in nonlinearity errors of up to twice those attainedusing the best straight line technique. This worst-caseerror will occur when the transfer function is bowed inone direction only.Most linear devices, such as instrumentation amplifiers,are specified for best straight line linearity. This needsto be considered when evaluating the error budget for aparticular application.Regardless of the method used to specify nonlinearity,the errors thus created are irreducible. That is to say,these errors are neither fixed nor proportional to inputor output voltage and, therefore, cannot be reduced byexternal adjustment.(M) Gain vs. TemperatureThese numbers provide both maximum and typicaldeviations from the gain equation as a function of temperature.As stated in the Gain Error section (K), the TCof an external gain resistor will never exactly match thatof other resistors within the IC package. Therefore, thebest performance over temperature is usually achieved byin-amps using all internal gain resistors. Gain drift errorcan be subtracted out in software by using a temperaturereference and calibration data.(N) Key Specifications for Single-Supply In-AmpsThere are some specifications that apply to single-supply(i.e., rail-to-rail) in-amp products, which are of greatimportance to designers powering in-amps from lowvoltage, single-supply voltages.Input and Output Voltage SwingA single-supply in-amp needs to be able to handleinput voltages that are very close to the supply andground. In a typical dual-supply in-amp, the input(and output) voltage range is within about 2 V of thesupply or ground. This becomes a real problem whenthe device is powered from a 5 V supply, or can beespecially difficult when using the new 3.3 V standard.A standard in-amp operating from a 5 V single-supplyline has only about 1 V of headroom remaining; witha 3.3 V supply, it has virtually none.Fortunately, a decent single-supply in-amp, such as theAD627, will allow an output swing within 100 mV ofthe supply and ground. The input level is somewhat less,within 100 mV of ground and 1 V of the supply rail. Incritical applications, the reference terminal of the in-ampcan be moved off center to allow a symmetrical inputvoltage range.A-6

Appendix BAmplifiers Selection TablePart Supply Volts Gain Setting Gain RangeNumber Description Supply Min to Max Method Min to MaxAD522 In-amp Dual 65 to 618 Resistor 1 to 1000AD524 Precision IA Dual 66 to 618 Pin select 1 to 1000AD526 Software-programmable amp Dual 64.5 to 616.5 Software 1 to 16AD620 General-purpose IA Dual 62.3 to 618 Resistor 1 to 10,000AD621 Precision IA Dual 62.3 to 618 Pin select 10 and 100AD622 Low cost IA Dual 62.6 to 618 Resistor 1 to 1000AD623 Single-supply, rail-to-rail IA Both 2.7 to 12 Resistor 1 to 1000AD624 Precision IA Dual 66 to 618 Pin select 1 to 1000AD625 Programmable gain IA Dual 66 to 618 3 resistors 1 to 10,000AD626 Differential amp Both 2.4 to 12 Pin select 10 and 100AD627 Micropower IA Both 2.2 to 36 Resistor 5 to 1000AD628 High CMV DA Both 4.5 to 36 Pin/resistor 0.1 to 100AD629 High CMV DA Dual 62.5 to 618 Fixed G = 1AD8202 High CMV DA Single 3.5 to 12 Fixed G = 20AD8203 High CMV DA Single 3.5 to 13 Fixed G = 14AD8205 Single-supply differential amp Single 4.5 to 5.5 Fixed G = 50AD8206 Single-supply differential amp Single 4.5 to 5.5 Fixed G = 20AD8210 Differential amp Single 4.5 to 5.5 Fixed G = 20AD8212 Current sense amp Single 7 to 65 resistor AdjustableAD8213 Dual, current sense amp Dual 4.5 to 5.5 Fixed Gain = 20AD8220 Rail-to-rail JFET IA Dual 62.3 to 618 Resistor 1 to 1000AD8221 High performance IA Dual 62.3 to 618 Resistor 1 to 1000AD8221 BR grade specifications Dual 62.3 to 618 Resistor 1 to 1000AD8222 High performance IA Dual 62.3 to 618 Resistor 1 to 1000AD8225 Fixed G = 5 IA Dual 61.7 to 618 Fixed G = 5AD8230 Zero drift IA Both 8 to 16 resistor 2 to 1000AD8250 Software-programmable, 10 MHz Dual 65 to 615 Software G = 1, 2, 5, 10AD8251 Software-programmable, 10 MHz Dual 65 to 615 Software G = 1, 2, 4, 8AD8553 Zero drift IA Single 1.8 to 5.5 Resistor 0.1 to 10,000AD8555 Sensor amp Single 2.7 to 5.5 Software 70 to 1280AD8556 Sensor/filter amp Single 2.7 to 5.5 Software 70 to 1280AMP03 Precision differential amp Dual 66 to 618 Fixed G = 1B-1

Amplifiers Selection Table (continued)Part CMRR at 60 Hz Bandwidth V NOISE p-p RTI 1 to Input Offset TemperatureNumber G = 1, G = 1000 Min G = 10 Typ 10 Hz Typ G = 100 Voltage Range (8C)AD522 75 dB 1 , 100 dB 2 3 kHz 3 4 mV 400 mV –55 to +125AD524 70 dB, 110 dB 400 kHz 0.3 mV 250 mV –55 to +125AD526 N/A 350 kHz 4 3 mV 1500 mV –40 to +85AD620 73 dB, 110 dB 800 kHz 0.28 mV 125 mV –55 to +125AD621 93 dB, 110 dB 5 800 kHz 0.28 mV 125 mV 6 –55 to +125AD622 66 dB, 103 dB 800 kHz 0.3 mV 125 mV –40 to +85AD623 70 dB, 105 dB 100 kHz 2 mV 200 mV –40 to +85AD624 70 dB, 110 dB 7 400 kHz 0.3 mV 200 mV –55 to +125AD625 70 dB, 110 dB 400 kHz 0.3 mV 200 mV –40 to +85AD626 55 dB 5 100 kHz 2 mV 2500 mV –40 to +85AD627 77 dB 8 30 kHz 1.2 mV 8 200 mV –40 to +85AD628 75 dB 600 kHz 15 mV 1500 mV –40 to +85AD629 77 dB 500 kHz 15 mV 1000 mV –40 to +85AD8202 82 dB 9 50 kHz 9 10 mV 9 1000 mV –40 to +125AD8203 82 dB 10 60 kHz 10 10 mV 10 1000 mV –40 to +125AD8205 78 dB 11, 12 50 kHz 12 15 mV 12 2000 mV –40 to +125AD8206 76 dB 9, 11 100 kHz 9 15 mV 12 2000 mV –40 to +125AD8210 100 dB 9 500 kHz 9 8 mV 1000 mV –40 to +150AD8212 90 dB 13 450 kHz 9 15 mV 12 1000 mV –40 to +125AD8213 90 dB 13 450 kHz 9 10 mV 12 2000 mV –40 to +125AD8220 90 dB 13 , 116 dB 13 1 MHz 0.8 mV 0.8 mV –40 to +85AD8221 80 dB, 130 dB 562 kHz 0.25 mV 60 mV –40 to +125AD8221 90 dB, 140 dB 562 kHz 0.25 mV 25 mV –40 to +125AD8222 80 dB, 130 dB 750 kHz 0.25 mV 120 mV –40 to +85AD8225 86 dB 8 900 kHz 8 1.5 mV 8 325 mV –40 to +85AD8230 110 dB 14 2 kHz 3 mV 10 mV –40 to +125AD8250 80 dB, 100 dB 10,000 kHz 0.4 mV 100 mV –40 to +125AD8251 80 dB, 100 dB 10,000 kHz 0.4 mV 100 mV –40 to +125AD8553 100 dB, 120 dB 15 1 kHz 0.7 mV 20 mV –40 to +85AD8555 80 dB 16 , 96 dB 17 700 kHz 16 0.5 mV 10 mV –40 to +125AD8556 80 dB 16 , 94 dB 17 700 kHz 16 0.5 mV 10 mV –40 to +140AMP03 85 dB 18 3000 kHz 18 2 mV 18 400 mV 18 –40 to +85NOTES1 DC to 30 Hz2 DC to 1 Hz3 Min BW at G = 1004 Typ BW at G = 165 CMRR at gains of 10 and 1006 Total offset voltage RTI at G = 1007 At Gain = 5008 At Gain = 59 At Gain = 2010 At Gain = 1411 DC to 20 kHz12 At Gain = 5013 Typical14 At Gain of 10 to 100015 At Gain = 10016 At Gain = 7017 At Gain = 128018 At Gain = 1B-2

IndexAAC CMR vs. frequency, table, 5-20AC input coupling, 5-2AD620:closed-loop gain vs. frequency, 3-4CMR vs. frequency, 3-4for EKG monitor transducer, 6-23gain nonlinearity, 3-5for Hall effect magnetic transducer, 6-23industry standard, 3-2, 3-3input circuit, 5-6for load cell transducer, 6-23low power in-amp, 6-20monolithic in-amp, 5-10for photodiode sensor transducer, 6-23pin configuration, 3-3for RTD transducer, 6-23simplified schematic, 3-4small signal pulse response, 3-5for thermistor transducer, 6-23for thermocouple transducer, 6-23AD620 series:input circuit diagram, 5-6RFI circuit, 5-15AD621:closed-loop gain vs. frequency, 3-7CMR vs. frequency, 3-7for EKG monitor transducer, 6-23gain nonlinearity, 3-7greater accuracy than AD620, 3-6for Hall effect magnetic transducer, 6-23for load cell transducer, 6-23monolithic in-amp, 5-11for photodiode sensor transducer, 6-23for RTD transducer, 6-23simplified schematic, 3-6small signal pulse response, 3-7for thermistor transducer, 6-23for thermocouple transducer, 6-23AD622:for Hall effect magnetic transducer, 6-23low cost:closed-loop gain vs. frequency,3-5, 3-6CMR vs. frequency, 3-5gain nonlinearity, 3-5for photodiode sensor transducer, 6-23AD623:3-op amp circuit basis, 3-17closed-loop gain vs. frequency, 3-18CMR vs. frequency, 3-18composite:circuits, 6-4, 5CMR, 6-4driving ADC, circuit, 6-5C-1for EKG monitor transducer, 6-23gain nonlinearity, 3-18for Hall effect magnetic transducer, 6-23input architecture, 5-6input circuit, 5-6for photodiode sensor transducer, 6-23rail-to-rail, 5-1RFI filter, 5-16RFI suppression circuit, 5-16for RTD transducer, 6-23simplified schematic, 3-17single-supply data circuit, 6-20small signal pulse response, 3-18for thermistor transducer, 6-23for thermocouple transducer, 6-23AD626:for current sense (shunt) transducer, 6-23differential amplifier:single- or dual-supply, 4-7, 4-8CMR ratio, 4-8gains, 4-8signal pulse response, 4-8simplified schematic, 4-8for level sensor transducer, 6-23AD627:classic bridge circuit, 6-19closed-loop gain vs. frequency, 3-20CMR vs. frequency, 2-6, 3-19for EKG monitor transducer, 6-23feedback loops, 3-19gain, equation, 3-19gain nonlinearity, 3-20for Hall effect magnetic transducer, 6-23input circuit, 5-6low power, 6-25, 6-26monolithic 2-op amp in-amp, 2-5, 2-6for photodiode sensor transducer, 6-23RFI suppression circuit, 5-15for RTD transducer, 6-23simplified schematic, 3-19small signal pulse response, 3-20for thermistor transducer, 6-23for thermocouple transducer, 6-23AD628:bandwidth gain block, 6-11block diagram, 1-5for current sense (shunt) transducer, 6-23difference amplifier, 6-13differential scaling amplifier, 6-6, 6-7high common-mode voltage difference amplifier,4-6, 4-7circuit connections, 4-6CMRR vs. frequency, 4-7gain adjustment, 4-6, 4-7large signal frequency response, 4-7

simplified schematic, 4-6small signal frequency response, 4-7for level sensor transducer, 6-23low gain, circuit, 6-7precision gain block:circuit, 6-6gain of –10, circuit, 6-10gain of +1, circuit, 6-11gain of +10, circuit, 6-9gain of +11, circuit, 6-10high CMR, 6-6no external components, 6-9AD629:for current sense (shunt) transducer, 6-23difference amplifier, 1-5, 1-8, 6-16high common-mode range, 6-12high common-mode voltage, 6-17high voltage measurement, 6-2circuit, 6-2for level sensor transducer, 6-23monolithic difference amplifier, 2-1for thermistor transducer, 6-23unity-gain difference amplifier, 4-8CMR vs. frequency, 4-9connection diagram, 4-9AD822, unity-gain inverter, 6-20AD8130:high frequency differential receiver/amplifier:block diagram, 4-9CMR vs. frequency, 4-9, 4-10frequency response vs. supply voltage, 4-10summing circuit:frequency response, 6-16performance photo, 6-16AD8200 family, current sensing difference amplifier, 4-2AD8202:for current sense (shunt) transducer, 6-23current sensing difference amplifier:connection diagram, 4-2simplified schematic, 4-2two-stage system architecture, 4-3high-side current measurement, 6-18AD8203:current sensing difference amplifier:gain of 14, 4-2two-stage system architecture, 4-3AD8205:for current sense (shunt) transducer, 6-23current sensing difference amplifier, gain of 50, 4-2difference amplifier:single-supply, 4-3, 4-4CMRR, 4-3simplified schematic, 4-3AD8206, difference amplifier, gain and powerconsumption, 4-4AD8210:current shunt amplifier, high common-mode input,4-1difference amplifier:CMRR vs. frequency and temperature, 4-5current shunt monitor IC, block diagram, 4-4motor control application, 6-19AD8220:CMRR vs. frequency, 3-8connection diagram, 3-8for EKG monitor transducer, 6-23FET input, gain-programmable, 3-8JFET in-amp, input circuit, 5-7JFET input circuit, 5-7for photodiode sensor transducer, 6-23AD8221:bridge circuit, 1-1characteristics, 3-2 to 3-3closed-loop gain vs. frequency, 3-3CMRR, A-1CMR vs. frequency, 3-3, A-3CMRR specification, 3-3dynamic response, A-2for EKG monitor transducer, 6-23filter circuits, 5-13, 5-16, 5-19gain, A-2gain bandwidth, 3-2gain equation, A-5for Hall effect magnetic transducer, 6-23input, A-2input circuit, 5-5input current, A-1for load cell transducer, 6-23low noise device, 5-5noise, A-1output, A-2for photodiode sensor transducer, 6-23pinout, 3-3power supply, A-2reference input, A-2for RTD transducer, 6-23simplified schematic, 3-2specifications, A-1table, A-1 to A-2in strain gage, high CMRR, 6-5temperature range, A-2for thermistor transducer, 6-23for thermocouple transducer, 6-23voltage offset, A-1AD8222:dual in-amp:connection diagram, 3-3differential output performance, 3-3for EKG monitor transducer, 6-23for Hall effect magnetic transducer, 6-23input circuit, 5-5for load cell transducer, 6-23for photodiode sensor transducer, 6-23for thermocouple transducer, 6-23true differential output in-amp, 6-1C-2

AD8225:for EKG monitor transducer, 6-23input circuit, 5-5for level sensor transducer, 6-23for load cell transducer, 6-23monolithic, 3-16, 5-11CMR vs. frequency, 3-16gain nonlinearity, 3-16simplified schematic, 3-16RFI filter circuit, 5-16for RTD transducer, 6-23for thermistor transducer, 6-23AD8230:auto-zeroing, 3-8 to 3-12CMR, 3-12connection diagram, 3-8gain setting, 3-12gain vs. frequency, 3-12internal workings, 3-9 to 3-12signal sampling rate, 3-9for Hall effect magnetic transducer, 6-23input circuit, 5-6for load cell transducer, 6-23for RTD transducer, 6-23for thermocouple transducer, 6-23zero-drift, input circuitry, 5-6AD8250:gain-programmable, 3-20data acquisition, 3-20medical applications, 3-20schematic, 3-20for Hall effect magnetic transducer, 6-23input circuit, 5-7for RTD transducer, 6-23AD8251:gain-programmable, 3-20data acquisition, 3-20medical applications, 3-20schematic, 3-20for Hall effect magnetic transducer, 6-23for RTD transducer, 6-23AD8553:auto-zeroing:connection diagram, 3-13current-mode, 3-12, 3-13schematic, 3-13chopper, 3-13for EKG monitor transducer, 6-23for level sensor transducer, 6-23precision current source:circuit, 6-3integrator, 6-3low frequency differential output, 6-3zero-drift, input circuit, 5-7AD8555:auto-zeroing/chopper, 3-13closed-loop gain vs. frequency,3-15CMRR vs. frequency, 3-15schematic, 3-14for load cell transducer, 6-23for photodiode sensor transducer, 6-23for RTD transducer, 6-23RFI filter circuit, 5-17sensor amplifier, 5-17zero-drift:input circuit, 5-8sensor applications, 5-8zero-drift, sensor signal amplifier, 3-13 to 3-15connection diagram, 3-13AD8556:for load cell transducer, 6-23on-chip EMI/RFI filter:block diagram, 5-17common-mode RFI/EMI, test circuit, 5-18dc input offset values, 5-18dc offset shift, 5-18differential-mode EMI/RFI, test circuit, 5-18for RTD transducer, 6-23input circuit, 5-8sensor applications, 5-8zero-drift sensor signal amplifier, 3-13block diagram, 3-15EMI/RFI filters, 3-15ADC:high level interface, 6-13, 6-14interface circuit:single-supply, 6-13‐6-14common-mode input, 6-14SNR, 6-14matching in-amp circuits, 7-1 to 7-8recommended for use with in-amps, tables, 7-2 to 7-6requirements, calculation, 7-1system resolution vs. converter resolution andpreamp gain, table, 7-1ADuC812, 12-bit ADC, embedded microcontroller, 6-26AMP03:differential amplifier, 7-8monolithic unity-gain difference amplifier:closed-loop gain vs. frequency, 4-5CMRR vs. frequency, 4-5functional block diagram, 4-5high CMRR vs. frequency and temperature, 4-5small signal pulse response, 4-6Auto-zeroing in-amp, 3-8 to 3-15BBandwidth, 1-8, 1-9Bessel filter, values, 5-22Bipolar bridge, low dropout, driver, 6-20Bridge:applications, 6-19, 6-20using ac excitation, 6-5Bridge circuit, 5-13Butterworth filter, values, 5-22C-3

CCable, shielded, 6-24Cable termination, 5-5CCD imaging, 7-7imaging equipment, 1-6Chebychev filter, values, 5-22Chopper in-amp, 3-13Circuit:bridge:3-op amp CMR, 1-43-op amp in-amp, CMR, 1-4bridge preamp, 1-1Classic bridge circuit, 6-19CMR, 1-1 to 1-5, 1-7, A-3AC, A-3in-amp, A-3common-mode voltage, 1-2dc values, 1-3in-amp, 1-7, A-3op amp vs. in-amp, 1-3, 1-4signal amplification, 1-1 to 1-3trimming, 5-23CMRR, A-3circuit, degradation, 2-1definition, 1-2equation, 1-2in-amp, A-3increase proportional to gain, 2-3CMV, 1-2Common-mode filter:conventional, 5-19with X2Y capacitor, 5-19Common-mode gain, 1-2Common-mode rejection, see CMRCommon-mode rejection ratio, see CMRRCommon-mode RF choke, for in-amp RFI filter, 5-20Common-mode voltage, 1-1, 1-2in op amp circuit, 1-3Composite in-amp:circuit, 6-4CMR, 6-4CMR at gain of 2, 6-4CMR at gain of 100, 6-4Composite in-amp circuit:high frequency CMR, 6-3 to 6-5at various gains, circuits, 6-4Controlling, 1-6in-amp, 1-6Conversion, differential to single-ended, 1-9Current sense transducer, characteristics, table, 6-23Current sensor interface, 6-24, 6-25Current transmitter, circuit, 6-12DData acquisition, 1-5DC return path, diagrams, 5-2Decoupling, 5-1Difference amp:high voltage measurement, 6-1 to 6-5monolithic, 4-1 to 4-10table, 4-1Difference amplifier, 6-16applications circuit, 6-1 to 6-26block diagram, 1-5circuit, 1-5IC, 1-5nonlinearity vs. voltage, 6-17selection table, B-1use, 1-5, 1-6Differential input circuit:single-pole low-pass filter, 6-62-pole low-pass filter, 6-8Differential output, circuit, 6-1Differential signal voltage, 1-1Digi-Key part # PS1H102GND, 5-14Diode, leakage, 5-9EECG:monitor transducer, characteristics, table, 6-23schematic, 6-22EKG, see ECGElectrostatic discharge, see ESDError, calculations, 5-12ESD:input protection, 5-5overload protection, 5-7External CMR, performance, 5-23External gain resistor, thermal gradient, error source, 5-11External protection diodes, 5-8FFast Schottky barrier rectifier, 5-9Filter:common-mode, using X2Y capacitors, 5-19common-mode bandwidth, 5-14component values, corner frequencies, tables, 6-9differential:bandwidths, 5-13, 5-14basic circuit, 5-13low-pass, to improve SNR, 5-21, 5-22RFI, 5-13, 5-16 to 5-182-pole low-pass, frequency response, 6-8Float sensor transducer, characteristics, table, 6-23GGain, 1-8buffered subtractor circuit, 2-2Gain drift, minimizing, 5-9Gain error, A-5, A-6input signal level differences, 5-10Gain range, A-5Gain resistor:error source, 5-11required value, table, 3-18Gain vs. temperature, A-6C-4

HHall effect magnetic transducer, characteristics, table, 6-23High frequency differential receiver/amplifier, 4-9, 4-10High-side current sense, 6-19High speed data acquisition, 7-7High speed signal conditioning, 1-6High voltage:measurement:methods, circuits, 6-1new system:circuit, 6-2cross plot, 6-2nonlinearity error, 6-2performance, 6-2High voltage monitor, circuit, 6-16IImpedance, high input, 1-8In-amp:2-op amp, 2-4 to 2-63-op amp, 2-2 to 2-4CMR trim circuit, 5-23feedback resistors, design, 5-103-op amp bridge circuit, CMR, 1-4ac-coupled circuit, 5-2ac input coupling, recommended component values,table, 5-4advantages, 1-7application, 5-1 to 5-23applications circuit, 6-1 to 6-26auto-zeroing, 3-8 to 3-15basics, 1-1 to 1-9bipolar input stages, higher CMR, 2-3buffers ADC, dc correction, 7-7characteristics, 1-7 to 1-9circuit:CMR, 6-4matched to ADCs, 7-1 to 7-8CMR, 1-7composite, circuit, 6-4dc accuracy, design issues, 5-9, 5-10definition, 1-1differential output circuit, 6-1differential vs. common-mode input signals,circuit, 1-6dual-supply operation, 5-1external protection diodes, 5-9external resistor, 1-7fixed gain, dc performance, 5-11functional block diagram, 1-6high performance, 3-2 to 3-5high quality, definition, 1-7 to 1-9high speed, high performance circuit, 7-8input characteristics, 1-2input ground return, 5-2, 5-3input protection basics, 5-5 to 5-9internal characteristics, 2-1 to 2-6low noise, 1-8low power, single-supply, 3-19, 3-20C-5low power, output buffering, 6-25micropower, RFI circuit, 5-15monolithic, 3-1 to 3-20advantages, 3-1design, 3-2 to 3-8for single-supply operation, 3-17, 3-18monolithic difference, 4-1 to 4-10multiplexed, 7-7operating gains, table, 2-4output, 1-7buffer, for low impedance, 5-3power supply bypassing, diagram, 5-1rail-to-rail output swing, diagram, 5-1reference input:CMR error, 5-4driving, 5-4RFI rejection measurement, circuit, 5-21selection table, B-1, B-2series protection resistor values, table, 5-8single-supply:input and output swing, 5-1key specifications, A-6single-supply operation, 5-1specifications, A-1 to A-6stability, 5-1summary, table, 3-1transducer interface application, 6-21uses, 1-5, 1-6vs. op amp, 3-1differences, 1-1 to 1-4Wheatstone bridge, 6-19In-amp circuit, input buffers, CMR, 1-4Input and output voltage swing, A-6Input bias, 1-8, A-4Input noise, 5-12International rectifier SD101 series, 5-9JJ-type thermocouple, 6-26Johanson Dielectrics, X2Y capacitor, 5-19Johnson noise, 5-5LLevel sensor transducer, characteristics, table, 6-23Linearity, best straight line method, A-6Load cell transducer, characteristics, table, 6-23Low-pass filter:4-pole:recommended component values, table, 5-22values, 5-22MMedical ECG monitor circuit, 6-22Medical instrumentation, 1-6Micropower in-amp, RFI circuit, 5-15Monitoring, 1-6Monolithic difference in-amp, 4-1 to 4-10applications, 4-1

NNoise, 1-9ground, 6-12, 6-13low, 1-8Noise error, 5-12Nonlinearity, A-6low, 1-8Nyquist criteria, 7-8OOffset current, A-4Offset current error, 1-8Offset error, 5-12Op amp:CMR, 1-3in-amp difference amplifier circuit, block diagram,2-1subtractor, as in-amp, 2-1vs. in-amp, 1-1 to 1-5OP27, transfer function, 6-13OP177, integrator, 6-16Operating voltage range, A-4Output buffer, for low power in-amp, 6-25Output swing, 1-9Overload:steady state, 5-5transient, 5-5PPhotodiode sensor transducer, characteristics, table, 6-23PID loop, integrator, 6-3Power, 1-9Power controlling, 1-6Power supply bypassing, 5-1Power supply decoupling, 5-1Power vs. bandwidth, 1-9Precision 48 V bus monitor:circuit, 6-17output vs. input linearity, 6-18remote voltage measurement, circuit, 6-17temperature drift, 6-18Precision voltage-to-current converter, 6-24, 6-25Proportional integral differential, see: PIDPulse Engineering, common-mode choke, 5-20QQuiescent supply current, A-4, A-5RRail-to-rail input, 1-9RC coupling component, selecting and matching, 5-3, 5-4Receiver circuit, 6-26Referred to input, see RTIReferred to output, see RTORemote load sensing, circuit, 6-24Resistance temperature detector transducer,characteristics, table, 6-23Resistor values:for in-amps, table, 5-8for various gains, table, 4-7RFI:circuit, diagram, 5-13input filter component values, selection, 5-14rectification error, reducing, 5-12 to 5-20RFI attenuation, X2Y vs. conventional common-modefilter, 5-19RFI filter, 5-16 to 5-18bandwidths, 5-13design, 5-12 to 5-20for in-amp, 5-17RFI rectification:error prevention, filter circuit, 5-13error reduction, in-amp circuit, 5-12RFI suppression, using common-mode RF choke, 5-20RFI testing, 5-21RTI, in-amp, A-4RTI error, 5-11, 5-12RTO, in-amp, A-4RTO error, 5-11, 5-12SSchottky diode, 5-8, 5-9Settling time, 5-23in-amp, A-5Signal-to-noise ratio, see SNRSignal voltage, in op amp circuit, 1-3Silicon diode, 5-8Single-supply bridge configuration transducer,characteristics, table, 6-23Single-supply receiver, circuit, 6-26Slew rate, in-amp, 1-9Software programming, in-amp, 1-6Specifications, in-amp, A-3SSM2019, audio preamplifier, 6-26SSM2141, differential line receiver, 6-26SSM2143, differential line receiver, 6-26Strain gage, measurement, with AC excitation, 6-5Strain gage bridge transducer, characteristics, table, 6-23Subtractor amp, 4-1 to 4-10Subtractor circuit:buffered, diagram, 2-2input buffering, diagram, 2-1Summing amplifier:circuit, 6-15high input impedance, 6-15high speed noninverting, 6-15 to 6-17Switch:high-side, 6-19low-side, 6-18C-6

TThermal EMF, 5-10Thermal gradient, error source, 5-11Thermal sensor transducer, characteristics, table, 6-23Thermistor transducer, characteristics, table, 6-23Thermocouple amplifier, single-supply in-amp, 6-26Thermocouple effect, 5-10Thermocouple transducer, characteristics, table, 6-233-op amp in-amp, 2-2, 2-3circuit, 2-2CMR trim circuit, 5-23design considerations, 2-3, 2-4feedback resistors, gain error, circuit, 5-10reduced CMV range, circuit, 2-3Total error, A-4Total noise, 5-12Total offset error, A-4Transducer, characteristics, table, 6-23Transfer function, nonlinearity, A-6Transformer-coupled input, dc return path, diagram, 5-2Transient, overload protection, 5-92-op amp in-amp:architecture, 2-5circuit, 2-4common-mode design, 2-5, 2-6limitations:high CMR, 2-6output swing, 2-5transfer function, 2-4VVideo applications, 1-6Voltage:common mode, 1-1differential signal, 1-1offset, 1-7Voltage drift, lowest offset, design, 5-9, 5-10Voltage offset, A-3, A-4Voltage-to-current converter, 6-25WWeight measurement transducer, characteristics, table, 6-23XX2Y capacitor, 5-19electrostatic model, 5-19ZZener diode, 6-17Zero-drift in-amp, 7-5, 7-6C-7

Device IndexProductPage2N2222.............................................................. 6-17AD520.................................................................3-2AD522......................................................... B-1, B-2AD524.................................................. 3-3, B-1, B-2AD526..................................................A-4, B-1, B-2AD580.................................................................2-5AD584.................................................................2-5AD589............................................................... 6-20AD620..... 3-1 to 3-6, 3-17, 5-6, 5-8, 5-10, 5-12, 5-15,.......................5-20, 6-20, 6-23 to 6-25, A-4, B-1, B-2AD620 series........................................ 3-2, 5-6, 5-15AD620A......................................................5-12, A-4AD620AR............................................................7-2AD621..................... 1-8, 3-1, 3-6, 3-7, 5-6, 5-8, 5-11,.................................................... 6-23, A-5, B-1, B-2AD622.............. 3-1, 3-5, 3-6, 5-6, 5-8, 6-23, B-1, B-2AD623................. 3-1, 3-17, 3-18, 5-1, 5-6, 5-8, 5-16,.....................6-4, 6-5, 6-20, 6-23, 6-24, A-4, B-1, B-2AD623AR............................................................7-3AD624......................................................... B-1, B-2AD625......................................................... B-1, B-2AD626.......... 4-1, 4-7, 4-8, 6-23, 6-24, 6-25, B-1, B-2AD627.......................... 2-5, 2-6, 3-1, 3-19, 3-20, 5-6,....................5-8, 5-15, 5-16, 6-19, 6-20, 6-23 to 6-26,.................................................. A-4 to A-6, B-1, B-2AD627AR............................................................7-4AD628.........................1-5, 4-1, 4-6, 4-7, 6-6 to 6-11,..........................................6-13, 6-14, 6-23, B-1, B-2AD629.............. 1-5, 1-8, 2-1, 4-1, 4-8, 4-9, 6-2, 6-12,..........................................6-16, 6-17, 6-23, B-1, B-2AD630.................................................................6-5AD630AR............................................................6-5AD704............................................................... 5-22AD705...................................................... 6-24, 6-25AD706............................................................... 5-22AD820............................................................... 6-25AD822............................................................... 6-20AD823.................................................................7-8AD825.................................................................7-8AD830.................................................................7-8AD871.................................................................7-8AD7266........................................................ 7-7, 7-8AD7321........................................................ 7-4, 7-5AD7322........................................................ 7-7, 7-8AD7323........................................................ 7-4, 7-5AD7327........................................................ 7-4, 7-5ProductPageAD7450.................................................... 6-13, 6-14AD7453/AD7457.................................................7-2AD7466...............................................................7-6AD7476...................................................... 6-17, 7-6AD7476A.............................................................7-6AD7610........................................................ 7-2, 7-4AD7661...............................................................7-3AD7663........................................................ 7-2, 7-4AD7685........................................ 6-22, 7-2, 7-5, 7-6AD7687........................................................ 7-2, 7-5AD7776............................................................. 6-20AD7862/AD7864.................................................7-3AD7863/AD7865.................................................7-3AD7866...............................................................7-3AD7890/AD7891/AD7892...................................7-3AD7895...............................................................7-2AD7898-3............................................................7-4AD7920...............................................................7-4AD7923/AD7927.................................................7-4AD7940...............................................................7-3AD7942...............................................................7-5AD8130.......................................4-1, 4-9, 4-10, 6-15AD8130 series......................................................4-9AD8200 family.............................................. 4-1, 4-2AD8202............ 4-1 to 4-3, 6-18, 6-19, 6-23, B-1, B-2AD8203...................................... 4-1 to 4-3, B-1, B-2AD8205..............................4-1 to 4-4, 6-23, B-1, B-2AD8206......................................... 4-1, 4-4, B-1, B-2AD8210..........................4-1, 4-4, 4-5, 6-19, B-1, B-2AD8212................................................ 4-1, B-1, B-2AD8213................................................ 4-1, B-1, B-2AD8220.................................3-1, 3-8, 5-7, 5-8, 5-13,................................................6-21 to 6-23, B-1, B-2AD8220AR..........................................................7-4AD8221................ 1-1, 3-1 to 3-3, 5-5, 5-6, 5-8, 5-13,.........................5-15, 5-16, 5-19, 6-3, 6-5, 6-23, 6-24,........................................... A-1 to A-3, A-5, B-1, B-2AD8221AR..........................................................7-2AD8222... 3-1, 3-3, 5-5, 5-8, 5-13, 6-1, 6-23, B-1, B-2AD8225...................... 3-1, 3-16, 5-5, 5-8, 5-11, 5-16,..............................................6-3, 6-23, 7-3, B-1, B-2AD8230.....................3-1, 3-8 to 3-12, 5-6, 5-8, 6-23,.............................................................A-5, B-1, B-2AD8230RZ..........................................................7-5AD8250.......... 3-1, 3-20, 5-7, 5-8, 6-23, 7-5, B-1, B-2AD8251................. 3-1, 3-20, 5-8, 6-23, 7-5, B-1, B-2D-1

ProductPageAD8553........................ 3-1, 3-12, 3-13, 5-7, 5-8, 6-3,........................................................... 6-23, B-1, B-2AD8553RM.........................................................7-6AD8555..........................3-1, 3-13 to 3-15, 5-8, 5-17,........................................................... 6-23, B-1, B-2AD8555AR/AD8556ARZ.....................................7-6AD8556............................. 3-1, 3-13, 3-15, 5-8, 5-17,...................................................5-18, 6-23, B-1, B-2AD8618.................................................... 6-21, 6-22AD8641............................................................. 6-24AD8642............................................................. 6-24AD8643............................................................. 6-24AD8698................................................. 2-1, 2-2, 2-4AD9240...............................................................7-8ADR425............................................................. 6-17ADR431.................................................... 6-13, 6-14ADR435............................................................. 6-22ADuC812.......................................................... 6-26AMP01.............................................................. 6-24AMP03.................... 4-1, 4-5, 4-6, 6-24, 7-8, B-1, B-2OP27........................................................ 6-12, 6-13OP177............................................................... 6-16OP297............................................................... 5-22OP497............................................................... 5-22OP777AR........................................................... 6-17OP1177.................................................. 2-1, 2-2, 6-5OP2177.................................2-1, 2-2, 2-4, 6-21, 6-22SSM2019........................................................... 6-26SSM2141........................................................... 6-26SSM2143........................................................... 6-26D-2

Analog Devices, Inc.Worldwide HeadquartersAnalog Devices, Inc.One Technology WayP.O. Box 9106Norwood, MA 02062-9106U.S.A.Tel: 781.329.4700(800.262.5643,U.S.A. only)Fax: 781.461.3113Analog Devices, Inc.Europe HeadquartersAnalog Devices, Inc.Wilhelm-Wagenfeld-Str.680807 MunichGermanyTel: 49.89.76903.0Fax: 49.89.76903.157Analog Devices, Inc.Japan HeadquartersAnalog Devices, KKNew Pier TakeshibaSouth Tower Building1-16-1 Kaigan, Minato-ku,Tokyo, 105-6891JapanTel: 813.5402.8200Fax: 813.5402.1064Analog Devices, Inc.Southeast AsiaHeadquartersAnalog Devices22/F One Corporate Avenue222 Hu Bin RoadShanghai, 200021ChinaTel: 86.21.5150.3000Fax: 86.21.5150.3222©2006 Analog Devices, Inc. All rights reserved.Trademarks and registered trademarks are the propertyof their respective owners.Printed in the U.S.A. G02678-15-9/06(B) www.analog.com/inamps