UC2842A/3A/4A/5A UC3842A/3A/4A/5A

®UC2842A/3A/4A/5AUC3842A/3A/4A/5AHIGH PERFORMANCE CURRENT MODE PWM CONTROLLERTRIMMED OSCILLATOR DISCHARGE CUR-RENTCURRENT MODE OPERATION TO 500kHzAUTOMATIC FEED FORWARD COMPENSA-TIONLATCHING PWM FOR CYCLE-BY-CYCLECURRENT LIMITINGINTERNALLY TRIMMED REFERENCE WITHUNDERVOLTAGE LOCKOUTHIGH CURRENT TOTEM POLE OUTPUTUNDERVOLTAGE LOCKOUT WITH HYSTER-.ESISLOW START-UP CURRENT (< 0.5mA)DOUBLE PULSE SUPPRESSIONDESCRIPTIONTheUC384xAfamilyofcontrolICsprovidesthenecessaryfeatures to implement off-line or DC to DCfixed frequencycurrent mode control schemes witha minimal external parts count. Internally implementedcircuits includea trimmed oscillator for preciseDUTY CYCLE CONTROL under voltage lockoutfeaturingstart-upcurrentlessthan0.5mA,a precisionreference trimmed for accuracy at the erroramp input, logicto insurelatchedoperation,a PWMMinidipSO8comparatorwhich alsoprovidescurrent limit control,and a totem pole output stage designed to sourceor sink high peakcurrent. The outputstage,suitablefor driving N-Channel MOSFETs, is low in the offstate.Differences between members of this family are theunder-voltagelockout thresholdsand maximum dutycycle ranges. The UC3842A and UC3844A haveUVLO thresholds of 16V (on) and 10V (off), ideallysuitedoff-lineapplicationsThecorrespondingthresholdsfor the UC3843A and UC3845A are 8.5 V and7.9V. The UC3842A and UC3843A can operate todutycycles approaching100%.A rangeof thezeroto< 50 % is obtainedby theUC3844Aand UC3845Abytheadditionof an internaltoggleflip flopwhich blanksthe outputoff every otherclock cycle.BLOCK DIAGRAM (toggle flip flop used only in UC3844A and UC3845A)Vi7GROUND534VUVLOS/R5VREF8VREF5V 50mA2.50VINTERNALBIASRT/CT4OSCVREF GOODLOGICT6OUTPUTVFBCOMPCURRENTSENSE213ERROR AMP.+2RS- R PWMR1VLATCHCURRENTSENSECOMPARATORUC3842AD95IN331March 19991/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV i Supply Voltage (low impedance source) 30 VV i Supply Voltage (Ii < 30mA) Self LimitingI O Output Current ±1 AE O Output Energy (capacitive load) 5 µJAnalog Inputs (pins 2, 3) – 0.3 to 5.5 VError Amplifier Output Sink Current 10 mAP tot Power Dissipation at T amb ≤ 25 °C (Minidip) 1.25 WP tot Power Dissipation at Tamb ≤ 25 °C (SO8) 800 mWT stg Storage Temperature Range – 65 to 150 °CT J Junction Operating Temperature – 40 to 150 °CT L Lead Temperature (soldering 10s) 300 °C* All voltages are with respect to pin 5, all currents arepositive into the specified terminal.PIN CONNECTION (top view)Minidip/SO8COMP18V REFV FB27ViI SENSE36OUTPUTR T /C T45GROUNDD95IN332PIN FUNCTIONSNo Function Description1 COMP This pin is the Error Amplifier output and is made available for loop compensation.2 V FB This is the inverting input of the Error Amplifier. It is normally connected to the switchingpower supply output through a resistor divider.3 I SENSE A voltage proportional to inductor current is connected to this input. The PWM uses thisinformation to terminate the output switch conduction.4 R T /C T The oscillator frequency and maximum Output duty cycle are programmed by connectingresistor R T to Vref and cpacitor C T to ground. Operation to 500kHz is possible.5 GROUND This pin is the combined control circuitry and power ground.6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourcedand sunk by this pin.7 V CC This pin is the positive supply of the control IC.8 V ref This is the reference output. It provides charging current for capacitor C T through resistor R T .ORDERING NUMBERSSO8UC2842AD1; UC3842AD1UC2843AD1; UC3843AD1UC2844AD1; UC3844AD1UC2845AD1; UC3845AD1MinidipUC2842AN; UC3842ANUC2843AN; UC3843ANUC2844AN; UC3844ANUC2845AN; UC3845AN2/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5ATHERMAL DATASymbol Description Minidip SO8 UnitR th j-amb Thermal Resistance Junction-ambient. max. 100 150 °C/WELECTRICAL CHARACTERISTICS ( [note 1] Unless otherwise stated, these specifications apply for-25 < Tamb

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AELECTRICAL CHARACTERISTICS (continued)Symbol Parameter Test ConditionsUC284XA UC384XAMin. Typ. Max. Min. Typ. Max.UnitOUTPUT SECTIONV OL Output Low Level I SINK = 20mA 0.1 0.4 0.1 0.4 VI SINK = 200mA 1.6 2.2 1.6 2.2 VV OH Output High Level I SOURCE = 20mA 13 13.5 13 13.5 VI SOURCE = 200mA 12 13.5 12 13.5 VV OLS UVLO Saturation V CC = 6V; I SINK = 1mA 0.7 1.2 0.7 1.2 Vt r Rise Time T j =25°C C L = 1nF (2) 50 150 50 150 nst f Fall Time T j =25°C C L = 1nF (2) 50 150 50 150 nsUNDER-VOLTAGE LOCKOUT SECTIONStart Threshold X842A/4A 15 16 17 14.5 16 17.5 VX843A/5A 7.8 8.4 9.0 7.8 8.4 9.0 VMin Operating Voltage X842A/4A 9 10 11 8.5 10 11.5 VAfter Turn-onX843A/5A 7.0 7.6 8.2 7.0 7.6 8.2 VPWM SECTIONMaximum Duty Cycle X842A/3A 94 96 100 94 96 100 %X844A/5A 47 48 50 47 48 50 %Minimum Duty Cycle 0 0 %TOTAL STANDBY CURRENTIst Start-up Current Vi = 6.5V for UCX843A/45A 0.3 0.5 0.3 0.5 mAV i = 14V for UCX842A/44A 0.3 0.5 0.3 0.5 mAI i Operating Supply Current V PIN2 =V PIN3 =0V 12 17 12 17 mAV iz Zener Voltage I i = 25mA 30 36 30 36 VNotes :1. Max package power dissipation limits must be respected; low duty cycle pulse techniques are used during test maintain Tj asclose to T amb as possible.2. These parameters, although guaranteed, are not 100% tested in production.3. Parameter measured at trip point of latch with V PIN2 =0.4. Gain defined as :∆ VPIN1A= ;0≤V PIN3 ≤ 0.8 V∆ VPIN35. Adjust Vi above the start threshold before setting at 15 V.4/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 1: Open Loop Test Circuit.4.7KΩR TV REFERROR AMP.ADJUST4.7KΩ2N2222100KΩ1KΩI SENSEADJUST5KΩV REFCOMP817V FB2I SENSEUC3842A36R T /C T45C T0.1µFV iOUTPUTGROUND0.1µFA1W1KΩV iOUTPUTD95IN343GROUNDHighpeak currentsassociatedwith capacitiveloadsnecessitate careful grounding techniques. Timingand bypass capacitors should be connectedcloseto pin 5 in a single point ground. The transistor and5KΩpotentiometerareusedto samplethe oscillatorwaveform and apply an adjustableramp to pin 3.Figure 2: Oscillator Frequency vs Timing ResistanceFigure 3: Maximum Duty Cycle vs Timing Resistorf o(Hz)D96IN362f o(Hz)D96IN3631M80100K2.2nFCT=470pF1nF604.7nF4010K201K300 1K 3K 10K 30K R T (Ω)0300 1K 3K 10K 30K R T (Ω)5/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 9: Output Saturation Voltage vs. LoadCurrent.Figure 10: Supply Current vs. Supply Voltage.V sat(V)-1V iSource Saturation(Load to Ground)T A =25°CD95IN341T A =-40°CI i(mA)20D95IN342-2V i =15V80µs Pulsed Load 120Hz Rate1532T A =-40°CT A =25°C1Sink Saturation GND(Load to V i )00 200 400 600 I O (mA)1050UCX843/45UCX842/44R T =10KC T =3.3nFV FB =0VI Sense =0VT A =25°C0 10 20 30 V i (V)Figure 11: Output Waveform.Figure 12: Output Cross Conduction90%V i =15VC L = 1.0nFT A =25°CV i =30VC L = 15pFT A =25°CV O20V/DIV10%I CC100mA/DIV50ns/DIVFigure 13: Oscillator and Output Waveforms.100ns/DIVV i7CT85V REGR TPWM6OUTPUTOUTPUTLARGE R T /SMALL C TCLOCK4OSCILLATORCTI DC TOUTPUT5GNDSMALL R T /LARGE C TD95IN3447/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 14 : Error Amp Configuration.2.5V1mA+V FB 2Z i -COMP 1Z fD95IN345Figure 15 : Under Voltage Lockout.V i7ON/OFF COMMANDTO REST OF ICI CCUC3842AUC3844AUC3843AUC3845A

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 17 : Slope Compensation Techniques.R TV REG8R TV REG8I SR SLOPER SR 1R T /C T4C TI SENSE3UC3842A5GNDI SR SLOPER SR 1R T /C T4C TI SENSE3UC3842A5GNDD95IN348Figure 18 : IsolatedMOSFET Drive and Current Transformer Sensing.V CCV in75.0Vref+-ISOLATIONBOUNDARYV GS Waveforms+-6Q1++00-50% DC-25% DC-SRQI pk = V (pin 1) -1.43R S( )N SN P+COMP/LATCH3 RCR SN SN PD95IN3499/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 19 : LatchedShutdown.4OSC8RBIASR+1mA+2R2-EAR12N390552N3903D95IN350SCR must be selected for a holding current of less than 0.5mA at T A(min) .The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.Figure 20: Error Amplifier Compensation+From V O 2.5VR i +1mA2RR d2C f R f1-EARError Amp compensation circuit for stabilizing any current-mode topology exceptfor boost and flyback converters operating with continuous inductor current.5+From V O 2.5VR P +R i-2 EAC P R d C f R f11mA2RR5 D95IN351Error Amp compensation circuit for stabilizing current-mode boost and flybacktopologies operating with continuous inductor current.10/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 21: External Clock Synchronization.V REF8RRBIASC T4+OSCEXTERNALSYNC INPUT0.01µF+2RR T147Ω2-EARThe diode clamp is required if the Sync amplitude is large enough to causethe bottom side of C T to go more than 300mV below ground5D95IN352Figure 22: External Duty Cycle Clamp and Multi Unit Synchronization.V REF8R5K8 4RBIASR B+65-R34+OSC5KQ7C2R A15K+-SNE55521+-EA2RR51.44f=(R A +2R B )CD max =R BR A +2R BTO ADDITIONALUCX84XAsD95IN35311/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AFigure 23: Soft-Start Circuit85V refRRBIAS+-4+OSC1MΩ21+-EA1mA2RR1V+-SQRC5D95IN354Figure 24: Soft-Start and Error Amplifier Output Duty Cycle Clamp.V CCV in785V ref+R+-BIAS-7R4+OSC6Q1R221+-EA1mA2RRV Clamp1V-+SQRComp/Latch55CR1BC109R SV CLAMP = ·R 1R 1 +R 2where 0

UC2842A/3A/4A/5A - UC3842A/3A/4A/5ADIM.mminchMIN. TYP. MAX. MIN. TYP. MAX.A 1.75 0.069a1 0.1 0.25 0.004 0.010a2 1.65 0.065a3 0.65 0.85 0.026 0.033b 0.35 0.48 0.014 0.019b1 0.19 0.25 0.007 0.010C 0.25 0.5 0.010 0.020c145° (typ.)D (1) 4.8 5.0 0.189 0.197E 5.8 6.2 0.228 0.244e 1.27 0.050e3 3.81 0.150F (1) 3.8 4.0 0.15 0.157L 0.4 1.27 0.016 0.050M 0.6 0.024S8° (max.)OUTLINE ANDMECHANICAL DATASO8(1) D and F do not include mold flash or protrusions. Mold flash orpotrusions shall not exceed 0.15mm (.006inch).13/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AmminchDIM.MIN. TYP. MAX. MIN. TYP. MAX.A 3.32 0.131OUTLINE ANDMECHANICAL DATAa1 0.51 0.020B 1.15 1.65 0.045 0.065b 0.356 0.55 0.014 0.022b1 0.204 0.304 0.008 0.012D 10.92 0.430E 7.95 9.75 0.313 0.384e 2.54 0.100e3 7.62 0.300e4 7.62 0.300F 6.6 0.260I 5.08 0.200L 3.18 3.81 0.125 0.150Z 1.52 0.060Minidip14/15

UC2842A/3A/4A/5A - UC3842A/3A/4A/5AInformation furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. Nolicense is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in thispublication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronicsproducts are not authorized for use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics© 1999 STMicroelectronics – Printed in Italy – All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.http://www.st.com15/15