11 IJSECTION 8THEORY8-0 INTRODUCTIONThis is the first section of supplementary material appended to the Rev 3.0 Technical<strong>Manual</strong> which covers the series referred to as Rev 3.1 and 3.2.The updates and expansion ofthe microcomputer's memory configuration which becameRev 3.1 are transparent, so, of no interest to the player. But once the PolyphonicSequencer for the <strong>Prophet</strong>- 10 was designed, we couldn't resist developing one for the<strong>Prophet</strong>-5. Thus, shortly after Rev 3.1 went into production, we again redesigned the<strong>Prophet</strong>-5 computer (and a few other circuits) to allow itto interface with the Model1005 Polyphonic Sequencer and Model 1001 Remote Keyboard/Controller. Therefore ifthey desire to use these products, owners of Rev 3.0 and 3.1their instruments upgraded to Rev 3.2.<strong>Prophet</strong>s will need to haveRev 3.0 started with serial number 1300. Specific tables of 3.1 and 3.2 serial numbersand software versions are in Section 11. Iflook at the silk-screening on PCB 3.you are in doubt about a <strong>Prophet</strong>'s Rev, justBoth revisions 3.0 and 3.2 have the numbers silkscreenedat the center top edge of the board. (Note that revision 3.0 is simply calledrevision 3.) Revision 3.1 has the number screened at the top left corner of the board.8-1 REVISION 3.1 COMPUTER and POWER SUPPLYPlease refer to SD3^i in Section 10. Revision 3.1incorporates changes to the computeroperating system PROM and the Non-Volatile program RAM, For PROM, U312/13 27162-K units were put in place of the three 2708 1-K units in Rev 3.0. This allowed the useof a higher-reliability part, elimination of the +12V and -5V power supplies, and createdprogram space for the diagnostic memory test. (The tests are covered in Section 11.)To use the higher-density 2716s, the CPU address lines to U318 Me^mory AddressDecoder are shifted up to A12-AH. All was provided for later updating this board witha 2732 ^-K. As shown, it is normally disconnected from the CPU. Instead, the All linesto U312-U31^ sockets are tied high. (On the 2716, pin 21 is for the Vpp programmingpulse.)The eight 6508 (IK x 1) NV RAM was changed to U383/8^, two ^33^ or 65U (IK x ^).These parts have a higher reliability than the parts previously used. To achieve thecorrect timing, the 3.1 (and 3.2) -NV WRITE signal is generated very differently fromthe way it is in Rev 3.0. NAND-Gate U382-8 is wired as an inverter. Thus when U311-19CPU -MREQ goes low, and A15 goes high, U382-11 goes low. U382-6, also an inverter,goes high, raising U320-13. If S3 RECORD is set to ENABLE, U320-12 will also be high,causing U320-11 to go low, enabling the NV RAM -WR inputs.The Power Distribution area of the schematic shows the spare pins (2 and 3) on P302created by removing the +12V and -5V lines from PCB 3.The back-panel cable wires tothese pins may or may not exist in a specific 3,1 unit. But on all 3.1 units, theregulators and associated components were removed from PCB 5. (See SD5^1.)TM1000D.2 10/81 8-1
I \An additional, simple change was made to the CPU which has absolutely no effect onoperation, U31 1-25 -BUSRQ is a CPU output which in REV 3-0 was tied high. In Rev 3.1this pin ispulled high through R315^ for optional use with factory test instruments,503^2 shows how TP30^ was added toU32^-10 ADC BUS DRIVER, pulled low throughR3155. Tying this point high starts the memory test routine, as discussed in Section 11.8-2 REVISION 3.2 COMPUTER and USARTRev 3.2 was created to interface with the Model 1005 Polyphonic Sequencer and Model1001 Remote Keyboard/Controller. In order to arrange the interface, the operatingsystem was again expanded and communication circuitry added. Changes were alsomade to the Common Analog circuitry to accomodate PITCH and MOD CV inputs (seepara. 8-3).See BD051 Rev 3.2 Interconnect Diagram. J17 DIGITAL INTERFACE jack on the backpanel is a ^-pin Switchcraft SL-i7-^F, SCI #3-053. To mate, use SL-^0-4M, SCI //P-053.This jack is cabled along with ANALOG inputs from J 16 (see below) through J 15, toadded connector P305. SD351 shows the DIGITAL CABLE destination, U386 SIGNETICS2661 Programmable Communications Interface. This USART exchanges data with acompatible transciever over three lines as specified below. System interface programmingis discussed in Section 9 (as well as in the current <strong>Prophet</strong>-5 Operation <strong>Manual</strong>,CMldOOC.l).WARNING! This is not an RS-232 interface. It uses 5-V TTL levels. RS-232 voltagelevels (+/- 12 or +/-15V) will most likely blow the two input gates. Furthermore, mostRS-232 interfaces lack the speed required for transparent sequencer-<strong>Prophet</strong> communications.Pin 1, GROUNDPin 2, CLOCK TO SYNTHThis input sees pin 2 of a 7^LS08 (U385-3), with a lOK pull-up to +5V. Note that thetransmit and receive clocks (TxC, RxC) are tied together. Maximum frequency: 625kHz. Minimum clock frequency for "transparent" real-time sequencer operation dependson exact operations involved. Slower speeds will generally degrade performance bycausing the <strong>Prophet</strong> to wait too long for the sequencer to complete multi-byte datatransfers. 50 kHz is probably as slow as anyone is likely to find useful.Pin 3,DATA TO SYNTHThis input sees pin ^ of a 7^LS08 (U385-6), with a lOK pull-up to +5V. Data format isdiscussed in Section 9.Pin ^, DATA FROM SYNTHThis is a M05 output direct from pin 19 of the Signetics 2661 USART. The driver Lowoutput voltage (Vql) isspecified at O.W max. with a 2.2 mA output current (Iol)- Thedriver High output voltage (Vqh) is 2.W min., specified at -^00 uA (Iqh)-Digital Cable Specificationsing used depends on the distance desired between units, and upon the noisepresent in the system environment. Using individual coaxial cables for the two data andclock lines will work best. It is likely you could have trouble-free operation at 20-ft orlonger. Three-conducter coax will probably work up to 10 ft. Single wires may be used8-2TM1000D.2 10/81
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PROPHET-5 SYNTHESIZERTECHNICAL MANU
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iJTable of ContentsISECTION 1MECHAN
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'1SECTION 1MECHANICAL1-0 GENERALThi
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Raise the top panel assembly to ser
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1-5 PCB 1/2 CONTROL PANELSOnce PCB
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Figure 1-5KEYBOARD REMOVAL1 -7/1 -8
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TOADDITIONALVCOsTOADDITIONALENV GEN
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2-2 THE PROPHETThe Prophet is a sub
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COMMON ANALOGVOICE(VOiCES e-5 ARE S
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'IAll processed CVs originate from
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ajMim—2-8 AUDIO OUTPUTAs shown in
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.'2-10 MICROPROCESSOR, MEMORY, AND
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For troubleshooting, it should be e
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2-12 ADC, DAC, AND CV OUTPUTSThe DA
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iirH- - jMg 1— -^ 'iVMUX, U201-3^
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the same CV and trigger pattern to
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SECTION 3DOCUMENTS3-0 DOCUMENT LIST
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TOP PANEL ASSEMBLY1CHASSiSLAST \NOT
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- Page 58 and 59: Inpreparation for service, set up t
- Page 60 and 61: 4-2 OSCILLATOR B TESTSTEP MODULE CO
- Page 62 and 63: 4-S FILTER TEST.STEP'MODULE CONTROL
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- Page 72 and 73: 4-21 FINAL VGA BAL1. Switch PRESET
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