Sequential Circuits Prophet-5 Service Manual - Audiofanzine
Sequential Circuits Prophet-5 Service Manual - Audiofanzine Sequential Circuits Prophet-5 Service Manual - Audiofanzine
NV RAM read and write operations are controlled by the gated A15 and the -NV CS which is only gatedthrough U309-4 if power is on. -NV CS causes the RAM to latch the address bus and place the addresseddata on the Data Bus. The CPU acknowledges receipt of the data by setting -NV CS high. For a memorywrite operation, -NV WR goes low to set "WRITE MODE," and the data is written when -NV CS returnsto a high state.ITwo 2114 1024 X 4-bit NMOS static RAMs comprise the Scratchpad RAM. The read and write logic for5PAD is similar to that for NV, with added gating ensuring -WR or -RD isappear at U310-8.low for the SPAD RAM -CS toU315 isan 8253 Programmable Interval Timer (PIT) used in the TUNE and A-440 circuits. For discussion,see paragraph 2-13.As mentioned above, the I/O Port Decoders issue chip selects which control input sources and outputdestinations. Table 2-0 shows how allCSs are specifically decoded. Eight of the fourteen Output -CS,undergo a voltage shift from 5-V to 15-V levels. The reason is that the analog switches for 10-V levelwaveforms in the synth must operate on +15V, therefore so must the latches which control the switchesand, likewise, the decoder which controls the latches. Seven bits of the Data Bus itself are also shiftedup. by U327, for compatibility with the high-voltage latches and DAC.Table 2-0CHIP SELECT DECODINGCS NAME FUNCTION -MREQ -lORQ --WR-A10-A12AO-AROMO ROMO XROM1 ROM 1 XROM 2 ROM 2 XNVXRAMI SPAD XTIMERXXXXXXXX1 X2 X3 X4 X6 XCSIOCSI1CSI2KBD/SWCASS/MISCADC111XX 02X 0401(H)CSOLOCSOL1CSOL2CSOL3CSOL4CSOL5LED DRVRLED SINKKBD/SW DRVRPOT MUX ADRCA5S/TUNECLEAR INTX 00X 08X 10X 18X 20X 28CSOHOPROG SWCSOH1 PROG SW 1CSOH2 PROG SW 2CSOH3CSOH4CSOH5CSOH6CSOH7S/H ABC/TUNES/HGATESDAC LSBDAC MSBX 30X 31X 32X 33X 38X 39XX3A3B1 = = DIGITAL HIGH== DIGITAL LOW(H) = =x = =HEXADECIMALDON'T CARE2-13
For troubleshooting, it should be emphasized that most computer malfunctions are caused by failures ofdevices connected to the Data Bus. For example, any shorted latch input can prevent an entire data linefrom ever being high. Shorts between data lines will also confuse the computer terribly. Shorts mayoccur within a device or between the PCB traces. Ifyou suspect a data bus problem try to pick out theline(s) with questionable levels: low should be 0-500 mV^ high 4-5V (3.5V min for CMOS), as shown inWaveform 2-OA. Readings of IV or 1.8V, for example, indicate a failure. The general procedure is to firstremove socketed PCB 3 devices: CPU, EPROM, SPAD RAM, and NV RAM—WHICH WILL CLEAR THEPROGRAM MEMORY! If this doesn't locate the problem you may have to cut traces. REMEMBER-SINCE THE COMPUTER WAS OBVIOUSLY RUNNING AT ONE TIME, THE SHORT IS MORE LIKELY TOBE DEVICE FAILURE THAN A PC-SHORT, SO BE SURE TO CHECK ALL POSSIBLY BAD COMPONENTSBEFORE CUTTING TRACES. The customary technique is to make the first cut at the electrical center of abus line to isolate the problem to one half or the other. Then halve the trace again, and so on, untilcorrect levels are restored. To prevent other malfunctions, cut traces should usually be repaired just afterthey have yielded information on the direction of the short. Note that a short on the high-voltage databus (DBH) will not usually degrade computer operations since DBH is buffered from DB. However it willbe easy to check DBH for malfunctioning switch bits, GATE bits, or S/H addresses.A DBO, U311-14B2.5 MHz CLOCKV:H:2V/div1 us/divWaveform 2-0DATA BUS AND CLOCK2-14
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- Page 9 and 10: Raise the top panel assembly to ser
- Page 11 and 12: 1-5 PCB 1/2 CONTROL PANELSOnce PCB
- Page 13 and 14: Figure 1-5KEYBOARD REMOVAL1 -7/1 -8
- Page 15 and 16: TOADDITIONALVCOsTOADDITIONALENV GEN
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- Page 25: .'2-10 MICROPROCESSOR, MEMORY, AND
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- Page 35 and 36: SECTION 3DOCUMENTS3-0 DOCUMENT LIST
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- Page 60 and 61: 4-2 OSCILLATOR B TESTSTEP MODULE CO
- Page 62 and 63: 4-S FILTER TEST.STEP'MODULE CONTROL
- Page 64 and 65: 4-8 POLY-MOD TEST—A.STEP MODULE C
- Page 66 and 67: i4-11 PITCH WHEEL TRIMThis trim rem
- Page 68 and 69: A)I4-16 VCO SCALE TRIMBE SURE RECOR
- Page 70 and 71: 4-19 FILTER ENVELOPE AMOUNT VCA BAL
- Page 72 and 73: 4-21 FINAL VGA BAL1. Switch PRESET
- Page 74 and 75: 115-3 PCB 3BT301 E-040L-\:!Oi 0-U45
For troubleshooting, it should be emphasized that most computer malfunctions are caused by failures ofdevices connected to the Data Bus. For example, any shorted latch input can prevent an entire data linefrom ever being high. Shorts between data lines will also confuse the computer terribly. Shorts mayoccur within a device or between the PCB traces. Ifyou suspect a data bus problem try to pick out theline(s) with questionable levels: low should be 0-500 mV^ high 4-5V (3.5V min for CMOS), as shown inWaveform 2-OA. Readings of IV or 1.8V, for example, indicate a failure. The general procedure is to firstremove socketed PCB 3 devices: CPU, EPROM, SPAD RAM, and NV RAM—WHICH WILL CLEAR THEPROGRAM MEMORY! If this doesn't locate the problem you may have to cut traces. REMEMBER-SINCE THE COMPUTER WAS OBVIOUSLY RUNNING AT ONE TIME, THE SHORT IS MORE LIKELY TOBE DEVICE FAILURE THAN A PC-SHORT, SO BE SURE TO CHECK ALL POSSIBLY BAD COMPONENTSBEFORE CUTTING TRACES. The customary technique is to make the first cut at the electrical center of abus line to isolate the problem to one half or the other. Then halve the trace again, and so on, untilcorrect levels are restored. To prevent other malfunctions, cut traces should usually be repaired just afterthey have yielded information on the direction of the short. Note that a short on the high-voltage databus (DBH) will not usually degrade computer operations since DBH is buffered from DB. However it willbe easy to check DBH for malfunctioning switch bits, GATE bits, or S/H addresses.A DBO, U311-14B2.5 MHz CLOCKV:H:2V/div1 us/divWaveform 2-0DATA BUS AND CLOCK2-14