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ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

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<strong>ATmega32A</strong>The PWM resolution for the phase correct PWM mode is fixed to eight bits. In phase correctPWM mode the counter is incremented until the counter value matches MAX. When the counterreaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for onetimer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 14-7.The TCNT0 value is in the timing diagram shown as a histogram for illustrating the dual-slopeoperation. The diagram includes non-inverted and inverted PWM outputs. The small horizontalline marks on the TCNT0 slopes represent compare matches between OCR0 and TCNT0.Figure 14-7.Phase Correct PWM Mode, Timing DiagramOCn Interrupt Flag SetOCRn UpdateTOVn Interrupt Flag SetTCNTnOCn(COMn1:0 = 2)OCn(COMn1:0 = 3)Period1 2 3The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches BOTTOM. TheInterrupt Flag can be used to generate an interrupt each time the counter reaches the BOTTOMvalue.In phase correct PWM mode, the compare unit allows generation of PWM waveforms on theOC0 pin. Setting the COM01:0 bits to 2 will produce a non-inverted PWM. An inverted PWM outputcan be generated by setting the COM01:0 to 3 (see Table 14-5 on page 86). The actual OC0value will only be visible on the port pin if the data direction for the port pin is set as output. ThePWM waveform is generated by clearing (or setting) the OC0 Register at the compare matchbetween OCR0 and TCNT0 when the counter increments, and setting (or clearing) the OC0Register at compare match between OCR0 and TCNT0 when the counter decrements. ThePWM frequency for the output when using phase correct PWM can be calculated by the followingequation:ff clk_I/OOCnPCPWM = -----------------N ⋅ 510The N variable represents the prescale factor (1, 8, 64, 256, or 1024).The extreme values for the OCR0 Register represent special cases when generating a PWMwaveform output in the phase correct PWM mode. If the OCR0 is set equal to BOTTOM, the out-8155C–AVR–02/1181

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