ATmega32A Datasheet - Sunrom Technologies
ATmega32A Datasheet - Sunrom Technologies ATmega32A Datasheet - Sunrom Technologies
ATmega32A14. 8-bit Timer/Counter0 with PWM14.1 Features14.2 Overview• Single Compare Unit Counter• Clear Timer on Compare Match (Auto Reload)• Glitch-free, Phase Correct Pulse Width Modulator (PWM)• Frequency Generator• External Event Counter• 10-bit Clock Prescaler• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simplifiedblock diagram of the 8-bit Timer/Counter is shown in Figure 14-1. For the actual placementof I/O pins, refer to “Pinout ATmega32A” on page 2. CPU accessible I/O Registers, including I/Obits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listedin the “Register Description” on page 84.Figure 14-1.8-bit Timer/Counter Block DiagramTCCRncountcleardirectionControl Logicclk TnClock SelectTOVn(Int.Req.)BOTTOMTOPEdgeDetectorTnDATABUSTimer/CounterTCNTn= 0= 0xFF( From Prescaler )OCn(Int.Req.)=WaveformGenerationOCnOCRn14.2.1 RegistersThe Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interruptrequest (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt FlagRegister (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register8155C–AVR–02/1173
- Page 22 and 23: ATmega32ASupport - Read-While-Write
- Page 24 and 25: ATmega32AThe next code examples sho
- Page 26 and 27: ATmega32A8.1.3 Flash Clock - clk FL
- Page 28 and 29: ATmega32AThe CKSEL0 Fuse together w
- Page 30 and 31: ATmega32A8.7 Calibrated Internal RC
- Page 32 and 33: ATmega32A8.10 Register Description8
- Page 34 and 35: ATmega32Aface, Timer/Counters, Watc
- Page 36 and 37: ATmega32A9.8.4 Internal Voltage Ref
- Page 38 and 39: ATmega32A10. System Control and Res
- Page 40 and 41: ATmega32AFigure 10-3.MCU Start-up,
- Page 42 and 43: ATmega32AADC is used. To reduce pow
- Page 44 and 45: ATmega32AThe WDP2, WDP1, and WDP0 b
- Page 46 and 47: ATmega32Athe case if the Reset Vect
- Page 48 and 49: ATmega32A$382D out SPL,r16$382E sei
- Page 50 and 51: ATmega32A12. I/O Ports12.1 Overview
- Page 52 and 53: ATmega32AIf PORTxn is written logic
- Page 54 and 55: ATmega32AThe following code example
- Page 56 and 57: ATmega32AFigure 12-5. Alternate Por
- Page 58 and 59: ATmega32ATable 12-3.Table 12-4 and
- Page 60 and 61: ATmega32A• MOSI - Port B, Bit 5MO
- Page 62 and 63: ATmega32A12.3.3 Alternate Functions
- Page 64 and 65: ATmega32ATable 12-11. Overriding Si
- Page 66 and 67: ATmega32A12.4 Register Description1
- Page 68 and 69: ATmega32A12.4.13 PIND - Port D Inpu
- Page 70 and 71: ATmega32Alow level interrupt is sel
- Page 74 and 75: ATmega32A(TIMSK). TIFR and TIMSK ar
- Page 76 and 77: ATmega32AFigure 14-3.Output Compare
- Page 78 and 79: ATmega32A14.6.1 Compare Output Mode
- Page 80 and 81: ATmega32Ainverted PWM outputs. The
- Page 82 and 83: ATmega32Aput will be continuously l
- Page 84 and 85: ATmega32AFigure 14-11. Timer/Counte
- Page 86 and 87: ATmega32ATable 14-5. Compare Output
- Page 88 and 89: ATmega32A15. Timer/Counter0 and Tim
- Page 90 and 91: ATmega32A15.5 Register Description1
- Page 92 and 93: ATmega32AFigure 16-1. 16-bit Timer/
- Page 94 and 95: ATmega32A16.3 Accessing 16-bit Regi
- Page 96 and 97: ATmega32AThe following code example
- Page 98 and 99: ATmega32AThe Timer/Counter Overflow
- Page 100 and 101: ATmega32ARegister has been read. Af
- Page 102 and 103: ATmega32A16.7 Compare Match Output
- Page 104: ATmega32AFigure 16-6.CTC Mode, Timi
- Page 109 and 110: ATmega32Athe maximum resolution is
- Page 112 and 113: ATmega32AFigure 16-13. Timer/Counte
- Page 114 and 115: ATmega32ATCCR1A is written when ope
- Page 116 and 117: ATmega32A16.10.3 TCNT1H and TCNT1L
- Page 118 and 119: ATmega32A• Bit 5 - ICF1: Timer/Co
- Page 120 and 121: ATmega32A17.2.1 Registers17.2.2 Def
<strong>ATmega32A</strong>14. 8-bit Timer/Counter0 with PWM14.1 Features14.2 Overview• Single Compare Unit Counter• Clear Timer on Compare Match (Auto Reload)• Glitch-free, Phase Correct Pulse Width Modulator (PWM)• Frequency Generator• External Event Counter• 10-bit Clock Prescaler• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simplifiedblock diagram of the 8-bit Timer/Counter is shown in Figure 14-1. For the actual placementof I/O pins, refer to “Pinout <strong>ATmega32A</strong>” on page 2. CPU accessible I/O Registers, including I/Obits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listedin the “Register Description” on page 84.Figure 14-1.8-bit Timer/Counter Block DiagramTCCRncountcleardirectionControl Logicclk TnClock SelectTOVn(Int.Req.)BOTTOMTOPEdgeDetectorTnDATABUSTimer/CounterTCNTn= 0= 0xFF( From Prescaler )OCn(Int.Req.)=WaveformGenerationOCnOCRn14.2.1 RegistersThe Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interruptrequest (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt FlagRegister (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register8155C–AVR–02/1173