ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies ATmega32A Datasheet - Sunrom Technologies

12.07.2015 Views

ATmega32A14. 8-bit Timer/Counter0 with PWM14.1 Features14.2 Overview• Single Compare Unit Counter• Clear Timer on Compare Match (Auto Reload)• Glitch-free, Phase Correct Pulse Width Modulator (PWM)• Frequency Generator• External Event Counter• 10-bit Clock Prescaler• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simplifiedblock diagram of the 8-bit Timer/Counter is shown in Figure 14-1. For the actual placementof I/O pins, refer to “Pinout ATmega32A” on page 2. CPU accessible I/O Registers, including I/Obits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listedin the “Register Description” on page 84.Figure 14-1.8-bit Timer/Counter Block DiagramTCCRncountcleardirectionControl Logicclk TnClock SelectTOVn(Int.Req.)BOTTOMTOPEdgeDetectorTnDATABUSTimer/CounterTCNTn= 0= 0xFF( From Prescaler )OCn(Int.Req.)=WaveformGenerationOCnOCRn14.2.1 RegistersThe Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interruptrequest (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt FlagRegister (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register8155C–AVR–02/1173

<strong>ATmega32A</strong>14. 8-bit Timer/Counter0 with PWM14.1 Features14.2 Overview• Single Compare Unit Counter• Clear Timer on Compare Match (Auto Reload)• Glitch-free, Phase Correct Pulse Width Modulator (PWM)• Frequency Generator• External Event Counter• 10-bit Clock Prescaler• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simplifiedblock diagram of the 8-bit Timer/Counter is shown in Figure 14-1. For the actual placementof I/O pins, refer to “Pinout <strong>ATmega32A</strong>” on page 2. CPU accessible I/O Registers, including I/Obits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listedin the “Register Description” on page 84.Figure 14-1.8-bit Timer/Counter Block DiagramTCCRncountcleardirectionControl Logicclk TnClock SelectTOVn(Int.Req.)BOTTOMTOPEdgeDetectorTnDATABUSTimer/CounterTCNTn= 0= 0xFF( From Prescaler )OCn(Int.Req.)=WaveformGenerationOCnOCRn14.2.1 RegistersThe Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interruptrequest (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt FlagRegister (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register8155C–AVR–02/1173

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