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ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

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<strong>ATmega32A</strong>Table 12-5.Overriding Signals for Alternate Functions in PA3:PA0Signal Name PA3/ADC3 PA2/ADC2 PA1/ADC1 PA0/ADC0PUOE 0 0 0 0PUOV 0 0 0 0DDOE 0 0 0 0DDOV 0 0 0 0PVOE 0 0 0 0PVOV 0 0 0 0DIEOE 0 0 0 0DIEOV 0 0 0 0DI – – – –AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT12.3.2 Alternate Functions of Port BThe Port B pins with alternate functions are shown in Table 12-6.Table 12-6.Port PinPB7PB6PB5PB4PB3PB2PB1PB0Port B Pins Alternate FunctionsAlternate FunctionsSCK (SPI Bus Serial Clock)MISO (SPI Bus Master Input/Slave Output)MOSI (SPI Bus Master Output/Slave Input)SS (SPI Slave Select Input)AIN1 (Analog Comparator Negative Input)OC0 (Timer/Counter0 Output Compare Match Output)AIN0 (Analog Comparator Positive Input)INT2 (External Interrupt 2 Input)T1 (Timer/Counter1 External Counter Input)T0 (Timer/Counter0 External Counter Input)XCK (USART External Clock Input/Output)The alternate pin configuration is as follows:• SCK – Port B, Bit 7SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,this pin is configured as an input regardless of the setting of DDB7. When the SPI is enabled asa Master, the data direction of this pin is controlled by DDB7. When the pin is forced by the SPIto be an input, the pull-up can still be controlled by the PORTB7 bit.• MISO – Port B, Bit 6MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,this pin is configured as an input regardless of the setting of DDB6. When the SPI is enabled asa Slave, the data direction of this pin is controlled by DDB6. When the pin is forced by the SPI tobe an input, the pull-up can still be controlled by the PORTB6 bit.8155C–AVR–02/1159

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