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ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

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<strong>ATmega32A</strong>10. System Control and Reset10.1 Resetting the AVRDuring Reset, all I/O Registers are set to their initial values, and the program starts executionfrom the Reset Vector. The instruction placed at the Reset Vector must be a JMP – absolutejump – instruction to the reset handling routine. If the program never enables an interruptsource, the Interrupt Vectors are not used, and regular program code can be placed at theselocations. This is also the case if the Reset Vector is in the Application section while the InterruptVectors are in the Boot section or vice versa. The circuit diagram in Figure 10-1 shows the resetlogic. “System and Reset Characteristics” on page 299 defines the electrical parameters of thereset circuitry.The I/O ports of the AVR are immediately reset to their initial state when a reset source goesactive. This does not require any clock source to be running.After all reset sources have gone inactive, a delay counter is invoked, stretching the InternalReset. This allows the power to reach a stable level before normal operation starts. The time-outperiod of the delay counter is defined by the user through the CKSEL Fuses. The different selectionsfor the delay period are presented in “Clock Sources” on page 26.10.2 Reset SourcesThe <strong>ATmega32A</strong> has five sources of reset:• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Resetthreshold (V POT ).• External Reset. The MCU is reset when a low level is present on the RESET pin for longerthan the minimum pulse length.• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and theWatchdog is enabled.• Brown-out Reset. The MCU is reset when the supply voltage V CC is below the Brown-outReset threshold (V BOT ) and the Brown-out Detector is enabled.• JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset Register, oneof the scan chains of the JTAG system. Refer to the section “IEEE 1149.1 (JTAG) Boundaryscan”on page 233 for details.8155C–AVR–02/1138

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