ATmega32A Datasheet - Sunrom Technologies

ATmega32A22.5 Prescaling and Conversion Timing ................................................................21222.6 Changing Channel or Reference Selection ...................................................21522.7 ADC Noise Canceler .....................................................................................21722.8 ADC Conversion Result .................................................................................22222.9 Register Description ......................................................................................22323 JTAG Interface and On-chip Debug System ..................................... 22823.1 Features ........................................................................................................22823.2 Overview ........................................................................................................22823.3 TAP – Test Access Port ................................................................................22823.4 TAP Controller ...............................................................................................23023.5 Using the Boundary-scan Chain ....................................................................23123.6 Using the On-chip Debug System .................................................................23123.7 On-chip Debug Specific JTAG Instructions ...................................................23223.8 Using the JTAG Programming Capabilities ...................................................23323.9 Register Description ......................................................................................23323.10 Bibliography ...................................................................................................23324 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 23424.1 Features ........................................................................................................23424.2 Overview ........................................................................................................23424.3 Data Registers ...............................................................................................23424.4 Boundary-scan Specific JTAG Instructions ...................................................23624.5 Boundary-scan Chain ....................................................................................23724.6 ATmega32A Boundary-scan Order ...............................................................24724.7 Boundary-scan Description Language Files ..................................................25224.8 Register Description ......................................................................................25225 Boot Loader Support – Read-While-Write Self-Programming ......... 25325.1 Features ........................................................................................................25325.2 Overview ........................................................................................................25325.3 Application and Boot Loader Flash Sections .................................................25325.4 Read-While-Write and no Read-While-Write Flash Sections ........................25425.5 Boot Loader Lock Bits ...................................................................................25625.6 Entering the Boot Loader Program ................................................................25725.7 Addressing the Flash during Self-Programming ............................................25825.8 Self-Programming the Flash ..........................................................................25925.9 Register Description ......................................................................................2658155C–AVR–02/11v