ATmega32A Datasheet - Sunrom Technologies

ATmega32Aantees that a Brown-out Reset will occur before V CC drops to a voltage where correctoperation of the microcontroller is no longer guaranteed. The test is performed usingBODLEVEL = 1 and BODLEVEL = 0 for ATmega32A.27.6 Two-wire Serial Interface CharacteristicsTable 27-2 describes the requirements for devices connected to the Two-wire Serial Bus. The ATmega32A Two-wire SerialInterface meets or exceeds these requirements under the noted conditions.Timing symbols refer to Figure 27-5.Table 27-2.Two-wire Serial Bus RequirementsSymbol Parameter Condition Min Max UnitsV IL Input Low-voltage -0.5 0.3 V CC VV IH Input High-voltage 0.7 V CC V CC + 0.5 VV hys(1)Hysteresis of Schmitt Trigger Inputs 0.05 V CC(2)– VV OL(1)Output Low-voltage 3 mA sink current 0 0.4 Vt r(1)Rise Time for both SDA and SCL 20 + 0.1C b(3)(2)300 nst of(1)Output Fall Time from V IHmin to V ILmax 10 pF < C b < 400 pF (3) 20 + 0.1C b(3)(2)250 nst SP(1)Spikes Suppressed by Input Filter 0 50 (2) nsI i Input Current each I/O Pin 0.1 V CC < V i < 0.9 V CC -10 10 µAC i(1)Capacitance for each I/O Pin – 10 pF(4)f SCL SCL Clock Frequency f CK > max(16f SCL , 250kHz) (5) 0 400 kHzf SCL ≤ 100kHzV CC– 0.4V 1000ns---------------------------- ------------------ Ω3 mAC bRp Value of Pull-up resistorf SCL > 100kHzV CC– 0.4V 300ns---------------------------- --------------- Ω3 mAC bt HD;STAt LOWt HIGHt SU;STAt HD;DATt SU;DATHold Time (repeated) START ConditionLow Period of the SCL ClockHigh period of the SCL clockSet-up time for a repeated START conditionData hold timeData setup timef SCL ≤ 100kHz 4.0 – µsf SCL > 100kHz 0.6 – µsf SCL ≤ 100kHz 4.7 – µsf SCL > 100kHz 1.3 – µsf SCL ≤ 100kHz 4.0 – µsf SCL > 100kHz 0.6 – µsf SCL ≤ 100kHz 4.7 – µsf SCL > 100kHz 0.6 – µsf SCL ≤ 100kHz 0 3.45 µsf SCL > 100kHz 0 0.9 µsf SCL ≤ 100kHz 250 – nsf SCL > 100kHz 100 – ns8155C–AVR–02/11301