ATmega32A Datasheet - Sunrom Technologies

ATmega32AFigure 26-17. Virtual Flash Page Load RegisterSTROBESTDIStateMachineADDRESSFlashEEPROMFusesLock BitsDATATDO26.10.12 Virtual Flash Page Read RegisterThe Virtual Flash Page Read Register is a virtual scan chain with length equal to the number ofbits in one Flash page plus 8. Internally the Shift Register is 8-bit, and the data are automaticallytransferred from the Flash data page byte by byte. The first 8 cycles are used to transfer the firstbyte to the internal Shift Register, and the bits that are shifted out during these 8 cycles shouldbe ignored. Following this initialization, data are shifted out starting with the LSB of the firstinstruction in the page and ending with the MSB of the last instruction in the page. This providesan efficient way to read one full Flash page to verify programming.Figure 26-18. Virtual Flash Page Read RegisterSTROBESTDIStateMachineADDRESSFlashEEPROMFusesLock BitsDATATDO26.10.13 Programming AlgorithmAll references below of type “1a”, “1b”, and so on, refer to Table 26-15.8155C–AVR–02/11293