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ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

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<strong>ATmega32A</strong>1. Power-up sequence:Apply power between V CC and GND while RESET and SCK are set to “0”. In some systems,the programmer can not guarantee that SCK is held low during power-up. In thiscase, RESET must be given a positive pulse of at least two CPU clock cycles durationafter SCK has been set to “0”.2. Wait for at least 20ms and enable SPI Serial Programming by sending the ProgrammingEnable serial instruction to pin MOSI.3. The SPI Serial Programming instructions will not work if the communication is out ofsynchronization. When in sync. the second byte ($53), will echo back when issuing thethird byte of the Programming Enable instruction. Whether the echo is correct or not, allfour bytes of the instruction must be transmitted. If the $53 did not echo back, giveRESET a positive pulse and issue a new Programming Enable command.4. The Flash is programmed one page at a time (page size found in “Page Size” on page269). The memory page is loaded one byte at a time by supplying the 6 LSB of theaddress and data together with the Load Program Memory Page instruction. To ensurecorrect loading of the page, the data low byte must be loaded before data high byte isapplied for a given address. The Program Memory Page is stored by loading the WriteProgram Memory Page instruction with the 8 MSB of the address. If polling is not used,the user must wait at least t WD_FLASH before issuing the next page. (See Table 26-13).Accessing the SPI Serial Programming interface before the Flash write operation completescan result in incorrect programming.5. The EEPROM array is programmed one byte at a time by supplying the address anddata together with the appropriate Write instruction. An EEPROM memory location isfirst automatically erased before new data is written. If polling is not used, the user mustwait at least t WD_EEPROM before issuing the next byte. (See Table 26-13). In a chiperased device, no $FFs in the data file(s) need to be programmed.6. Any memory location can be verified by using the Read instruction which returns thecontent at the selected address at serial output MISO.7. At the end of the programming session, RESET can be set high to commence normaloperation.8. Power-off sequence (if needed):Set RESET to “1”.Turn V CC power off.26.9.2 Data Polling FlashWhen a page is being programmed into the Flash, reading an address location within the pagebeing programmed will give the value $FF. At the time the device is ready for a new page, theprogrammed value will read correctly. This is used to determine when the next page can be written.Note that the entire page is written simultaneously and any address within the page can beused for polling. Data polling of the Flash will not work for the value $FF, so when programmingthis value, the user will have to wait for at least t WD_FLASH before programming the next page. Asa chip erased device contains $FF in all locations, programming of addresses that are meant tocontain $FF, can be skipped. See Table 26-13 for t WD_FLASH value26.9.3 Data Polling EEPROMWhen a new byte has been written and is being programmed into EEPROM, reading theaddress location being programmed will give the value $FF. At the time the device is ready for anew byte, the programmed value will read correctly. This is used to determine when the nextbyte can be written. This will not work for the value $FF, but the user should have the following inmind: As a chip erased device contains $FF in all locations, programming of addresses that aremeant to contain $FF, can be skipped. This does not apply if the EEPROM is re-programmed8155C–AVR–02/11282

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