ATmega32A Datasheet - Sunrom Technologies

ATmega32A26.9 SPI Serial Programming Pin MappingTable 26-12.Pin Mapping SPI Serial ProgrammingSymbol Pins I/O DescriptionMOSI PB5 I Serial Data inMISO PB6 O Serial Data outSCK PB7 I Serial ClockFigure 26-10. SPI Serial Programming and Verify (1)VCC+2.7 - 5.5VMOSIMISOSCKPB5PB6PB7AVCC+2.7 - 5.5V (2)XTAL1RESETGNDNotes: 1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to theXTAL1 pin.2. V CC -0.3V < AVCC < V CC +0.3V, however, AVCC should always be within 2.7V - 5.5VWhen programming the EEPROM, an auto-erase cycle is built into the self-timed programmingoperation (in the serial mode ONLY) and there is no need to first execute the Chip Erase instruction.The Chip Erase operation turns the content of every memory location in both the Programand EEPROM arrays into $FF.Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periodsfor the serial clock (SCK) input are defined as follows:Low: > 2 CPU clock cycles for f ck < 12MHz, 3 CPU clock cycles for f ckHigh: > 2 CPU clock cycles for f ck < 12MHz, 3 CPU clock cycles for f ck12MHz12MHz26.9.1 SPI Serial Programming AlgorithmWhen writing serial data to the ATmega32A, data is clocked on the rising edge of SCK.When reading data from the ATmega32A, data is clocked on the falling edge of SCK. See Figure26-11 for timing details.To program and verify the ATmega32A in the SPI Serial Programming mode, the followingsequence is recommended (See four byte instruction formats in Table 26-14):8155C–AVR–02/11281