ATmega32A Datasheet - Sunrom Technologies

ATmega32ATable 24-5.SignalNameBoundary-scan Signals for the ADCDirection as Seenfrom the ADCDescriptionRecommendedInput when Notin UseOutput Values when RecommendedInputs are used, and CPU is notUsing the ADCCOMP Output Comparator Output 0 0ACLK Input Clock signal to gain stagesimplemented as Switch-cap filtersACTEN Input Enable path from gain stages tothe comparatorADCBGEN Input Enable Band-gap reference asnegative input to comparator0 00 00 0ADCEN Input Power-on signal to the ADC 0 0AMPEN Input Power-on signal to the gain stages 0 0DAC_9 Input Bit 9 of digital value to DAC 1 1DAC_8 Input Bit 8 of digital value to DAC 0 0DAC_7 Input Bit 7 of digital value to DAC 0 0DAC_6 Input Bit 6 of digital value to DAC 0 0DAC_5 Input Bit 5 of digital value to DAC 0 0DAC_4 Input Bit 4 of digital value to DAC 0 0DAC_3 Input Bit 3 of digital value to DAC 0 0DAC_2 Input Bit 2 of digital value to DAC 0 0DAC_1 Input Bit 1 of digital value to DAC 0 0DAC_0 Input Bit 0 of digital value to DAC 0 0EXTCH Input Connect ADC channels 0 - 3 to bypasspath around gain stages1 1G10 Input Enable 10x gain 0 0G20 Input Enable 20x gain 0 0GNDEN Input Ground the negative input tocomparator when trueHOLD Input Sample&Hold signal. Sampleanalog signal when low. Holdsignal when high. If gain stagesare used, this signal must goactive when ACLK is high.IREFEN Input Enables Band-gap reference asAREF signal to DAC0 01 10 0MUXEN_7 Input Input Mux bit 7 0 0MUXEN_6 Input Input Mux bit 6 0 0MUXEN_5 Input Input Mux bit 5 0 0MUXEN_4 Input Input Mux bit 4 0 0MUXEN_3 Input Input Mux bit 3 0 08155C–AVR–02/11244