12.07.2015 Views

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

ATmega32A Datasheet - Sunrom Technologies

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<strong>ATmega32A</strong>Figure 24-2.Reset RegisterToTDOFrom other Internal andExternal Reset SourcesFromTDIDQInternal ResetClockDR · AVR_RESET24.3.4 Boundary-scan ChainThe Boundary-scan Chain has the capability of driving and observing the logic levels on the digitalI/O pins, as well as the boundary between digital and analog logic for analog circuitry havingOff-chip connections.See “Boundary-scan Chain” on page 236 for a complete description.24.4 Boundary-scan Specific JTAG InstructionsThe instruction register is 4-bit wide, supporting up to 16 instructions. Listed below are the JTAGinstructions useful for Boundary-scan operation. Note that the optional HIGHZ instruction is notimplemented, but all outputs with tri-state capability can be set in high-impedant state by usingthe AVR_RESET instruction, since the initial state for all port pins is tri-state.As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.The OPCODE for each instruction is shown behind the instruction name in hex format. The textdescribes which Data Register is selected as path between TDI and TDO for each instruction.24.4.1 EXTEST; $024.4.2 IDCODE; $1Mandatory JTAG instruction for selecting the Boundary-scan Chain as Data Register for testingcircuitry external to the AVR package. For port-pins, Pull-up Disable, Output Control, OutputData, and Input Data are all accessible in the scan chain. For Analog circuits having Off-chipconnections, the interface between the analog and the digital logic is in the scan chain. The contentsof the latched outputs of the Boundary-scan chain is driven out as soon as the JTAG IRregisteris loaded with the EXTEST instruction.The active states are:• Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain.• Shift-DR: The Internal Scan Chain is shifted by the TCK input.• Update-DR: Data from the scan chain is applied to output pins.Optional JTAG instruction selecting the 32-bit ID-register as Data Register. The ID-register consistsof a version number, a device number and the manufacturer code chosen by JEDEC. Thisis the default instruction after power-up.8155C–AVR–02/11236

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