ATmega32A Datasheet - Sunrom Technologies
ATmega32A Datasheet - Sunrom Technologies ATmega32A Datasheet - Sunrom Technologies
ATmega32A21. Analog Comparator21.1 OverviewThe Analog Comparator compares the input values on the positive pin AIN0 and negative pinAIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pinAIN1, the Analog Comparator Output, ACO, is set. The comparator’s output can be set to triggerthe Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separateinterrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on comparatoroutput rise, fall or toggle. A block diagram of the comparator and its surrounding logic isshown in Figure 21-1.Figure 21-1. Analog Comparator Block Diagram (2)BANDGAPREFERENCEACBGACMEADENADC MULTIPLEXEROUTPUT (1)Notes: 1. See Table 21-1 on page 206.2. Refer to Figure 1-1 on page 2 and Table 12-6 on page 59 for Analog Comparator pinplacement.21.2 Analog Comparator Multiplexed InputIt is possible to select any of the ADC7:0 pins to replace the negative input to the Analog Comparator.The ADC multiplexer is used to select this input, and consequently, the ADC must beswitched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME inSFIOR) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX2:0 in ADMUXselect the input pin to replace the negative input to the Analog Comparator, as shown in Table8155C–AVR–02/11206
ATmega32A21.3 Register Description21.3.1 SFIOR – Special Function IO Register21-1. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the AnalogComparator.Table 21-1.Analog Comparator Multiplexed InputACME ADEN MUX2:0 Analog Comparator Negative Input0 x xxx AIN11 1 xxx AIN11 0 000 ADC01 0 001 ADC11 0 010 ADC21 0 011 ADC31 0 100 ADC41 0 101 ADC51 0 110 ADC61 0 111 ADC7Bit 7 6 5 4 3 2 1 0ADTS2 ADTS1 ADTS0 – ACME PUD PSR2 PSR10 SFIORRead/Write R/W R/W R/W R R/W R/W R/W R/WInitial Value 0 0 0 0 0 0 0 0• Bit 3 – ACME: Analog Comparator Multiplexer EnableWhen this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), theADC multiplexer selects the negative input to the Analog Comparator. When this bit is writtenlogic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detaileddescription of this bit, see “Analog Comparator Multiplexed Input” on page 205.21.3.2 ACSR – Analog Comparator Control and Status RegisterBit 7 6 5 4 3 2 1 0ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 ACSRRead/Write R/W R/W R R/W R/W R/W R/W R/WInitial Value 0 0 N/A 0 0 0 0 0• Bit 7 – ACD: Analog Comparator DisableWhen this bit is written logic one, the power to the Analog Comparator is switched off. This bitcan be set at any time to turn off the Analog Comparator. This will reduce power consumption inactive and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must bedisabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit ischanged.8155C–AVR–02/11207
- Page 155 and 156: ATmega32AThe following code example
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<strong>ATmega32A</strong>21.3 Register Description21.3.1 SFIOR – Special Function IO Register21-1. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the AnalogComparator.Table 21-1.Analog Comparator Multiplexed InputACME ADEN MUX2:0 Analog Comparator Negative Input0 x xxx AIN11 1 xxx AIN11 0 000 ADC01 0 001 ADC11 0 010 ADC21 0 011 ADC31 0 100 ADC41 0 101 ADC51 0 110 ADC61 0 111 ADC7Bit 7 6 5 4 3 2 1 0ADTS2 ADTS1 ADTS0 – ACME PUD PSR2 PSR10 SFIORRead/Write R/W R/W R/W R R/W R/W R/W R/WInitial Value 0 0 0 0 0 0 0 0• Bit 3 – ACME: Analog Comparator Multiplexer EnableWhen this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), theADC multiplexer selects the negative input to the Analog Comparator. When this bit is writtenlogic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detaileddescription of this bit, see “Analog Comparator Multiplexed Input” on page 205.21.3.2 ACSR – Analog Comparator Control and Status RegisterBit 7 6 5 4 3 2 1 0ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 ACSRRead/Write R/W R/W R R/W R/W R/W R/W R/WInitial Value 0 0 N/A 0 0 0 0 0• Bit 7 – ACD: Analog Comparator DisableWhen this bit is written logic one, the power to the Analog Comparator is switched off. This bitcan be set at any time to turn off the Analog Comparator. This will reduce power consumption inactive and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must bedisabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit ischanged.8155C–AVR–02/11207