MPU-6000 and MPU-6050 Product Specification Revision 1.0

MPU-6000/MPU-6050 Product SpecificationDocument Number: PS-MPU-6000A-00Revision: 1.0Release Date: 11/24/2010Pin Number7 Applications Information7.1 Pin Out and Signal DescriptionMPU-6000MPU-6050Pin NamePin Description1 Y Y CLKIN Optional external reference clock input. Connect to GND if unused.6 Y Y AUX_DA I 2 C master serial data, for connecting to external sensors7 Y Y AUX_CL I 2 C Master serial clock, for connecting to external sensors8 Y /CS SPI chip select (0=SPI mode)8 Y VLOGIC Digital I/O supply voltage9 Y AD0 / SDO I 2 C Slave Address LSB (AD0); SPI serial data output (SDO)9 Y AD0 I 2 C Slave Address LSB (AD0)10 Y Y REGOUT Regulator filter capacitor connection11 Y Y FSYNC Frame synchronization digital input12 Y Y INT Interrupt digital output (totem pole or open-drain)13 Y Y VDD Power supply voltage and Digital I/O supply voltage18 Y Y GND Power supply ground19, 21 Y Y RESV Reserved. Do not connect.20 Y Y CPOUT Charge pump capacitor connection22 Y Y CLKOUT System clock output23 Y SCL / SCLK I 2 C serial clock (SCL); SPI serial clock (SCLK)23 Y SCL I 2 C serial clock (SCL)24 Y SDA / SDI I 2 C serial data (SDA); SPI serial data input (SDI)24 Y SDA I 2 C serial data (SDA)2, 3, 4, 5, 14,15, 16, 17Y Y NC Not internally connected. May be used for PCB trace routing.Top ViewTop ViewRESVCPOUTRESVCLKOUTSCLSDARESVCPOUTRESVCLKOUTSCL/SCLKSDA/SDI24 23 22 21 20 1924 23 22 21 20 19+ZCLKIN118GNDCLKIN118GNDNC217NCNC217NC+Z+YNCNC34MPU-60001615NCNCNCNC34MPU-60501615NCNCMPU-6000MPU-6050+YNC514NCNC514NC+X+XAUX_DA613VDDAUX_DA613VDD7 8 9 10 11 127 8 9 10 11 12INTFSYNCREGOUTAD0VLOGICAUX_CLINTFSYNCREGOUTAD0/SDO/CSAUX_CLQFN Package24-pin, 4mm x 4mm x 0.9mmQFN Package24-pin, 4mm x 4mm x 0.9mmOrientation of Axes of Sensitivity andPolarity of RotationCONFIDENTIAL & PROPRIETARY 19 of 53