MPU-6000 and MPU-6050 Product Specification Revision 1.0
MPU-6000 and MPU-6050 Product Specification Revision 1.0
MPU-6000 and MPU-6050 Product Specification Revision 1.0
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<strong>MPU</strong>-<strong>6000</strong>/<strong>MPU</strong>-<strong>6050</strong> <strong>Product</strong> <strong>Specification</strong>Document Number: PS-<strong>MPU</strong>-<strong>6000</strong>A-00<strong>Revision</strong>: <strong>1.0</strong>Release Date: 11/24/20106.8 SPI Timing Characterization (<strong>MPU</strong>-<strong>6000</strong> only)Typical Operating Circuit of Section 7.2, VDD = 2.5V±5%, 3.0V±5%, or 3.3V±5%, VLOGIC (<strong>MPU</strong>-<strong>6050</strong> only)= 1.8V±5% or VDD,T A = -40°C to +85°C, unless otherwise noted.Parameters Conditions Min Typical Max Units NotesSPI TIMINGf SCLK, SCLK Clock Frequency 1 MHzt LOW, SCLK Low Period 400 nst HIGH, SCLK High Period 400 nst SU.CS, CS Setup Time 8 nst HD.CS, CS Hold Time 500 nst SU.SDI, SDI Setup Time 11 nst HD.SDI, SDI Hold Time 7 nst VD.SDO, SDO Valid Time C load = 20pF 100 nst HD.SDO, SDO Hold Time C load = 20pF 4 nst DIS.SDO, SDO Output Disable Time 10 nsSPI Bus Timing DiagramCONFIDENTIAL & PROPRIETARY 17 of 53
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