MEMC Glossary - MEMC Electronic Materials, Inc.

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FFace: Parallel lines along the surface of the crystal, also known as growth lines or ZD, zero defect, lines.Flat: Straight edge on the wafer’s outer perimeter. It is used to identify certain characteristics. (AKA the JLS).Flat (major): May be the only flat (straight edge) on the wafer. If there is more than one flat then it is the longest flat on the perimeterof the wafer.Flat (minor): Shortest flat (straight edge) on the wafer.Flatness: The maximum deviation of the wafer surface from a flat plane. Flatness measurement is usually done with the backside heldto a flat surface (a vacuum chuck) and excludes linear thickness variations.Focal Plane: That plane whose normal provides the shortest distance between the absolute maximum and absolute minimum on thewafer surface.Focal Plane Deviation (FPD): Maximum deviation of the wafer surface above and below the focal plane.FTIR: Fourier Transform Infrared, a means of measuring oxygen or carbon levels in the crystal.GGettering: Gettering is a process that attracts contaminents and traps defects when the wafers are heated. Can be initiated throughmechanical damage or interstial oxygen. Extrinsic gettering is caused by BSD. Intrinsic gettering is caused by interstial oxygen.Global Flatness: Overall flatness of the wafer.Grind: Abrade/remove material by grinding; rod diameter reduction method to specifications and for flattening.GFA: Gas Fusion Analysis, a means of testing oxygen or carbon levels in the crystal.GOI: Gate Oxide IntegrityHHaze: Light scattering caused by microscopic surface irregularities (such as a high concentration of pits, mounds, small ridges,particles, etc.) on epitaxial wafers or polished slices.Hillocks: Defect in the surface of the wafer resembling a hill; cannot be seen with the naked eye.IIngot: A semiconductor grown cylinder, polycrystalline or single crystal, generally of irregular diameter or in the as-grown state.Integrated circuits: Tiny complex electronic components and their connections produced on a silicon slice.Interstitial: Relating to crystalline compound in which small atoms or ions of a nonmetal occupy holes between the larger metalatoms and ions in the crystal lattice.JJLS (Joseph Larry Schaefer): Method of physically identifying a wafer. Major flats, minor flats and notches are ground on thesilicon rod before it is cut. These markings identify the molecular orientation.
KKerf: The notch left by a saw cut; the width of a saw cut.Kerf Loss: The amount of material lost while slicing wafers. The kerf is the cut and swarf is the chips and fillings from the kerf.LLapping: Process to remove controlled amounts of silicon from the slice using a lapping compound. This process removes sawdamage and positively impacts the slice’s flatness.Laser mark: Method of identification required by some customers. Series of letters and numbers inscribed onto the wafer by laser.Lifetime: The average time a free-electron or hole can exist in a crystal, measured in seconds. Lifetime may vary within a crystal:bulk lifetime within the crystal and surface lifetime at, of course, the surface.Linear Thickness Variation: Thickness variation within a slice whose front and back surfaces can be represented by two, nonparallelplanes.Local or Site Flatness: Flatness of specifically defined areas on the slice.Lot: Group of wafers going to the same area with the same identities and are to be processed together.Low Temperature Oxide (LTO): Sealant to keep the dopant in the wafer when it goes through the Epi process. It is applied inFurnace/Enhanced Gettering Area.LPCVD: Low Pressure CVD, deposits a layer of polysilicon to the wafer, later removed by polishing. A backside layer can act as agettering agent.LPD: Light Particle Defect, sometimes known as particles.MMelt: The pure, molten silicon from which single crystal silicon is grown in a crystal pulling furnace during the Czochralski process.Meltdown: Changing a polysilicon charge from a solid to a liquid state by heating it in the crystal puller.Micron: A unit of length, 1/1,000,000 (one millionth) of a meter.MOScap: Test structure used for Bvox, GOI, VTW, and Zerbst tests. Capacitor structure: silicon wafer/gate oxide/polysilicon gate.NNanotopology: Surface variations over a small areaN-Type: Property of the silicon semiconductor material. Doping with donor atoms increases the density of negative charge carriers(electrons) in the conduction band and produces an N-type semiconductor.Neck: Portion of the crystal below the seed and above the taper. The first growth step in a crystal.OOhm: Unit of electrical resistance.Oi: Interstitial Oxygen.Opposite End (OE): End of the grown crystal rod. Known more formally as the ‘tang’ portion of the rod.Optical Comparator: Instrument held close to the wafer’s edge for evaluation of the edge grinding process.Optical Precipitation Profiler (OPP): Non-destructive measurement of bulk defects.
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MEMC Glossary - MEMC Electronic Materials, Inc.

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