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Wireless Ad Hoc and Sensor Networks

Wireless Ad Hoc and Sensor Networks

Wireless Ad Hoc and Sensor Networks

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Distributed Power Control <strong>and</strong> Rate <strong>Ad</strong>aptation 2876.11.1.5 RF SetupThe wireless channel for the DAPC implementation is chosen to be similarto the one in RFID systems. The nodes will operate at the central frequencyof 915 MHz with 20-kHz channel b<strong>and</strong>width. To test the performance ofonly the DAPC, no other MAC is used. The data rate is set up at 12 kbpsusing FSK modulation with no encoding method. The output power atthe transmitter can vary from 16 to +13dBm by 0.3-dB increments.6.11.2 Software ArchitectureA layered networking architecture is considered for the Gen-4 SSN wirelesstest platform. This would allow easier future implementations <strong>and</strong>protocol evaluations. A block diagram of the layered software architectureis shown in Figure 6.28. In this section, a detailed description of thebaseb<strong>and</strong> controller <strong>and</strong> DAPC MAC design is given.6.11.2.1 Frame FormatFrame format used for DAPC implementation is shown in Figure 6.29.The physical layer header is composed of a series of SYNC bytes <strong>and</strong> apreamble sequence. The SYNC bytes, which are used to synchronize thetransmitter <strong>and</strong> receiver clock, should be a DC-free pattern, such as10101010 … pattern. The preamble sequence is a unique pattern indicatingthe beginning of a packet <strong>and</strong> must be universal to all nodes in theApplication layerMAC layer8051 platformRAMpacketbufferTx/Rx statemachineMACheadercontrolPHY headercontrolData pumpRSSI bufferRSSIreadbackPowercontrolDistributed adaptive powercontrolBaseb<strong>and</strong> controllerData ratecontrolFrequencycontrolSPI interfaceSPI interfacePreambledetectioninterruptData busControl busPhysical layer – radio transceiverFIGURE 6.28Software architecture.

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