Table of Contents - TG Drives

EXTENDED REGISTER GROUPS
TMR, SYSTEM TIMERS
Group Group
No
Description
Tmr 8 System timers for timekeeping, etc.
GENERAL
Tmr, System timers
The timer system is based on the cycle time of the DMC 2 software. A crystal -
controlled frequency (40 MHz) is divided down to a 1 kHz cycle using the CPU’s
internal interrupt system. This 1 ms cycle time is then used for all timer functions.
Due to crystal tolerances, 1 ms in one DMC 2 is not exactly the same as 1 ms in
another DMC 2 . Time measurements must therefore be non-critical in application
usage. To achieve simultaneous cycles in several DMC 2 ’s the 1 kHz clock can be
synchronized between units.
FUNCTION
Tmr.Abs The timer system has one absolute measurement in the
Tmr.Abs. This counter
holds the number of cycles since the
last power up (or reset). The timers are all 32 bit wide, except
for the word wide Tmr.CycInt, which means that they will wrap
around after 596.5 hours (24.9 days).
Tmr.CycInt The Tmr.CycInt is intended
to be used for generating a
cyclical event (timer interrupt) within the application software.
The rest of the timers (Tmr.T0 through Tmr.T3) are free for
application usage
RELATED ITEMS
Vector.CycInt System
interrupt vector for timer interrupt.
Int.SysMask
Int.SysPend
Ireturn sys 1 Return statement.
EXAMPLE USAGE
; Cyclical event
CycEvent:
Bit mask for system interrupts, bit 0 (bit value 1) enables the cyclical event.
Bit mask for pending events, bit 0 (bit value 1) indicates the cyclical event.
.
Vector.CycInt , @CycEvent
Tmr.CycInt , 100
or Int.SysMask , 1
.
clr Tmr.T2
wait Tmr.T2 > 186
.
Ireturn sys 1
;pointer to service routine
;100 ms event rate
;enable the event
;reset timer T2
;wait here for 186 ms
;return from event
User's Manual 5.1 Inmotion Technologies AB
Doc. No.9032 0027 01 (B), Rev. 11.07.2001
93