Table of Contents - TG Drives
Table of Contents - TG Drives Table of Contents - TG Drives
44 Standard set Mnemonics Connect Ana.IN1 TO Sval Ana.IN2 TO Sval Ana.OUT1 TO Sval Ana.OUT2 TO Sval Dstore.In1 TO Sval Dstore.In2 TO Sva Dstore.Peek1 TO Sva Dstore.Peek2 TO Sva Ana.ConnTMR = 1 Connect Ana.In1 TO 0 Connect Ana.In2 TO Pg.Speed Connect Ana.Out1 TO Reg.PosErr PL2 MNEMONICS the statement REF POS, set Pg.PosOffs = 0. The connection is enabled by connecting the analog I/O to a Reg or XReg, it is disabled by connecting it to a Const. The update rate is set in the Ana.ConnTMR register. The maximum number of active connections at one time is four. However, running four connections at 1 ms update rate will take a considerable amount of CPU-time from the execution of the program. Example: ; Want 1 ms update rate. ; Turn off the connectionto Ana.In1 ; Set speed from Ana.In2 ; POS error to Ana.Out1 EEStore Store the contents of the EEProm extended register group in nonvolatile memory. NOTE: Because this is a time consuming process, verify the operation has completed before continuing with the next instruction. 10 EEStore 20 wait SysIo.MemStat and 1 30 .... EELoad Load the information from the nonvolatile memory into the EEProm extended register group. NOTE: Because this is a time consuming process, verify the operation has completed before continuing with the next instruction. 10 EELoad 20 wait SysIo.MemStat and 1 30 .... Peek Debug use only Poke Debug use only RESET SYSTEM Reset CPU-board. Recommended way to warm start system FHbit Xreg, Xreg, Sva Find highest bit in second argument. Reports bit number in first argument. RegEncode Xreg, SRval, SRval Ex: R100 = 255 Fhbit R10, R100, 32 will return R10 = 7 since bit7 is set in R100, The Sval is a limiter of how many bits to search for.If there are bits higher then the search limiter it will return the limiter value. Calculates the internal adress to a Xreg similar to the computer mode specification Ex: RegEncode R100,4,6 will return R100 =33798 User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001
PL2 MNEMONICS TRACE RELATED MNEMONICS Trace Related Mnemonics Used in combination with SET and GET instructions to simplify indexing into extended registers. Regencode R100,4,5 would give the adress to the register Pg.Posspeed.(32768+256*group+member) The Trace function allows the user to trace the execution of the PL program. The trace will save a time stamp and the current line number where code is executing. There is room for 512 entries in the buffer. If the PL program is modified after/during the trace, it will make the trace invalid. To conserve space in the buffer, the tracing can be limited to interesting parts, by use of the Trace OFF/Trace CONT command or a snapshot that fills the buffer, Trace ONCE. To inspect the trace buffer content, use the TLIST command. When the Trace is active it slows down the PL2 rate to about 70 % of the normal. That means if Trace is used for measuring execution speed that has to be compensated for. It also states that leaving trace active during normal operation is a waste of resources!!! To debug an error situation the Trace can be used like this: Turn on the Trace function with TRACE ON at the beginning of the program. Put TRACE OFF at the end of the error handling routine. When the error occurs there will be a log of the last 512 lines of PL2 code that lead up to the error. Trace ON Initializes the trace buffer and starts trace. Trace OFF Stops the trace. Trace CONT Continue trace without initializing the buffer. Trace ONCE Trace until buffer is full.(Single shot trace) LAN1/ LAN1 RELATED MNEMONICS SetObj Lan1 Sval Map the content in MsgObjLan1 to the priority level specified in Sval. For a detailed description see the LAN1 group. GetObj Lan1 Sval Fill in the MsgObjLan1 with the message object at priority level Sval. For a detailed description see the LAN1 group. Read Lan1 Reg, len, level Read len bytes and put in register Reg from the buffer for message object at level. Where len and level are Sval. For a detailed description see the LAN1 group. If len is specified as negative the data will be byte swapped. Write Lan1 Reg, len, level Write len bytes to the buffer for message object at level from register Reg. For a detailed description see the LAN1 group. If len is specified as negative the data will be byte swapped. User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001 45
- Page 1 and 2: HEAD OFFICE INMOTION TECHNOLOGIES A
- Page 3 and 4: Table of Contents Table of Contents
- Page 5 and 6: Related items .....................
- Page 7 and 8: Related items .....................
- Page 9: Creating/Editing Source Code ......
- Page 12 and 13: 12 System architecture register val
- Page 14 and 15: 14 B002 Timing and execution flow T
- Page 16 and 17: 16 Function Block Diagram SOFTWARE
- Page 18 and 19: 18 Function Block Diagram Figure 5.
- Page 20 and 21: 20 Function Block Diagram Function
- Page 22 and 23: 22 Load a new firmware release SOFT
- Page 24 and 25: 24 User's Manual 5.1 Inmotion Techn
- Page 26 and 27: 26 Argument types executing results
- Page 28 and 29: 28 Mnemonic Operators PL2 NATIVE PO
- Page 30 and 31: 30 Compiler Symbols PL2 NATIVE POSI
- Page 32 and 33: 32 Compiler directives PL2 NATIVE P
- Page 34 and 35: 34 Compiler directives Warnings: No
- Page 36 and 37: 36 Spline function compilation dire
- Page 38 and 39: 38 Multiline Macro MACRO DEFINITION
- Page 41 and 42: PL2 Mnemonics GENERAL The general f
- Page 43: PL2 MNEMONICS Standard set Mnemonic
- Page 47 and 48: PL2 MNEMONICS Indexed Addressing Mn
- Page 49 and 50: PL2 MNEMONICS If r_length < r_Membe
- Page 51 and 52: PL2 MNEMONICS Text mode \000 Intern
- Page 53 and 54: Extended register groups INTRODUCTI
- Page 55 and 56: EXTENDED REGISTER GROUPS STACK HAND
- Page 57 and 58: EXTENDED REGISTER GROUPS RD1, Resol
- Page 59 and 60: EXTENDED REGISTER GROUPS RD1, Resol
- Page 61 and 62: EXTENDED REGISTER GROUPS RD1.FiltSp
- Page 63 and 64: EXTENDED REGISTER GROUPS RD2, Resol
- Page 65 and 66: EXTENDED REGISTER GROUPS RD2, Resol
- Page 67 and 68: EXTENDED REGISTER GROUPS RD2.ChkLow
- Page 69 and 70: EXTENDED REGISTER GROUPS Pos Inc Pr
- Page 71 and 72: EXTENDED REGISTER GROUPS Pg.ASpeed
- Page 73 and 74: EXTENDED REGISTER GROUPS MOTOR, MOT
- Page 75 and 76: EXTENDED REGISTER GROUPS 2-Pole: 81
- Page 77 and 78: EXTENDED REGISTER GROUPS Motor.Base
- Page 79 and 80: EXTENDED REGISTER GROUPS REG, PID R
- Page 81 and 82: EXTENDED REGISTER GROUPS GROUP MEMB
- Page 83 and 84: EXTENDED REGISTER GROUPS Positive T
- Page 85 and 86: EXTENDED REGISTER GROUPS Reg, PID r
- Page 87 and 88: EXTENDED REGISTER GROUPS Gear.Incr
- Page 89 and 90: EXTENDED REGISTER GROUPS GROUP MEMB
- Page 91 and 92: EXTENDED REGISTER GROUPS Gear, Elec
- Page 93 and 94: EXTENDED REGISTER GROUPS TMR, SYSTE
44<br />
Standard set Mnemonics<br />
Connect Ana.IN1 TO Sval<br />
Ana.IN2 TO Sval<br />
Ana.OUT1 TO Sval<br />
Ana.OUT2 TO Sval<br />
Dstore.In1 TO Sval<br />
Dstore.In2 TO Sva<br />
Dstore.Peek1 TO Sva<br />
Dstore.Peek2 TO Sva<br />
Ana.ConnTMR = 1<br />
Connect Ana.In1 TO 0<br />
Connect Ana.In2 TO<br />
Pg.Speed<br />
Connect Ana.Out1 TO<br />
Reg.PosErr<br />
PL2 MNEMONICS<br />
the statement REF POS, set Pg.PosOffs = 0.<br />
The connection is enabled by connecting the<br />
analog I/O to a Reg or XReg, it is disabled by<br />
connecting it to a Const.<br />
The update rate is set in the Ana.ConnTMR<br />
register. The maximum number <strong>of</strong> active<br />
connections at one time is four. However,<br />
running four connections at 1 ms update rate will<br />
take a<br />
considerable amount <strong>of</strong> CPU-time from the<br />
execution <strong>of</strong> the program.<br />
Example:<br />
; Want 1 ms update rate.<br />
; Turn <strong>of</strong>f the connectionto Ana.In1<br />
; Set speed from Ana.In2<br />
; POS error to Ana.Out1<br />
EEStore Store the contents <strong>of</strong> the EEProm extended<br />
register group in nonvolatile memory.<br />
NOTE: Because this is a time consuming<br />
process, verify the operation has completed<br />
before continuing with the next instruction.<br />
10 EEStore<br />
20 wait SysIo.MemStat and 1<br />
30 ....<br />
EELoad Load the information from the nonvolatile<br />
memory into the EEProm extended register<br />
group.<br />
NOTE: Because this is a time consuming<br />
process, verify the operation has completed<br />
before continuing with the next instruction.<br />
10 EELoad<br />
20 wait SysIo.MemStat and 1<br />
30 ....<br />
Peek Debug use only<br />
Poke Debug use only<br />
RESET<br />
SYSTEM<br />
Reset CPU-board. Recommended way to warm<br />
start system<br />
FHbit Xreg, Xreg, Sva Find highest bit in second argument. Reports bit<br />
number in first argument.<br />
RegEncode Xreg, SRval,<br />
SRval<br />
Ex: R100 = 255<br />
Fhbit R10, R100, 32 will return R10 = 7 since<br />
bit7 is set in R100, The Sval is a limiter <strong>of</strong> how<br />
many bits to search for.If there are bits higher<br />
then the search limiter it will return the limiter<br />
value.<br />
Calculates the internal adress to a Xreg similar to<br />
the computer mode specification<br />
Ex: RegEncode R100,4,6 will return R100<br />
=33798<br />
User's Manual 5.1 Inmotion Technologies AB<br />
Doc. No.9032 0027 01 (B), Rev. 11.07.2001
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