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Table of Contents - TG Drives

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16<br />

Function Block Diagram<br />

SOFTWARE SYSTEM<br />

When programming a PL2 application an event triggered programming technique<br />

is recommended. Figure 3 illustrates the principle.<br />

• After startup <strong>of</strong> the system when the PL2 code initially gains access to the<br />

processor, a number <strong>of</strong> initializations normally take place. These may include<br />

setting up motor and resolver parameters, regulator and interrupt system.<br />

• After setup program execution enters some main loop. The main loop may<br />

contain nothing. Instead all action to be taken may be triggered by interrupts.<br />

• Special interrupt routines are executed for each detected interrupt. In this way<br />

the program assumes a function oriented structure which is easier to maintain.<br />

There are justified exceptions to this principal.<br />

• For example, operator interface functions may be handled in the main loop.<br />

• It is important to realize the meaning <strong>of</strong> interrupt in the PL2 environment. An<br />

interrupt does alter the natural flow <strong>of</strong> PL2 code execution, but it is not the<br />

direct result <strong>of</strong> a change <strong>of</strong> sequence flow estate <strong>of</strong> the hardware.<br />

• Most PL2 interrupts are generated by the FW, sometimes in reaction to a<br />

hardware interrupt, but more <strong>of</strong>ten by polling the hardware status each servo<br />

cycle.<br />

• A PL2 interrupt response time is therefore always approximately 1ms.<br />

• The predictable interrupt response time is yet another advantage <strong>of</strong> event<br />

triggered programming.<br />

• The rate <strong>of</strong> PL2 statements executed varies with the complexity <strong>of</strong> the<br />

statements and the number <strong>of</strong> real time functions active in the servo cycle. It is<br />

not advisable to base any real time related functions on the execution times <strong>of</strong><br />

PL2 code.<br />

FUNCTION BLOCK DIAGRAM<br />

Each function blocks in Figure 4. is explained in the following tables. For each<br />

function block the related register set, the input signals or ”trigger” to the block and<br />

the resulting output (or what is affected) from the block are listed.<br />

User's Manual 5.1 Inmotion Technologies AB<br />

Doc. No.9032 0027 01 (B), Rev. 11.07.2001

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