Table of Contents - TG Drives
Table of Contents - TG Drives Table of Contents - TG Drives
146 LAN1, Local area network 1 LAN1.StdFilter 5 0..2047 RW EXTENDED REGISTER GROUPS Message Acceptance Filter for Standard Frames. Allows the user to globally mask, or ”don’t care” any identifier bits in the incoming message object. Range, 11-bit message ID. Default is that all bits must match. NOTE. This is a global filter, it affects all descriptors, and use only if you are familiar with the arbitration method of CAN. LAN1.ExtFilter 6 0..536870911 RW Message Acceptance Filter for Extended Frames. Allows the user to globally mask, or ”don’t care” any identifier bits in the incoming message object. Range, 29-bit message ID. Default is, all bits must match. NOTE. This is a global filter, it affects all descriptors, and use only if you are familiar with the arbitration method of CAN. LAN1.Mask 7 0..65535 RW Specify the object(s) at respective level that can generate interrupt to the PL code interpreter. Also the error vector. 0 No message object can generate interrupt. Bit0(1) Message object at level 1 will generate interrupt Bit1(2) Message object at level 2 will generate interrupt Bit2(4) Message object at level 3 will generate interrupt Bit3(8) Message object at level 4 will generate interrupt Bit4(16) Message object at level 5 will generate interrupt Bit5(32) Message object at level 6 will generate interrupt Bit6(64) Message object at level 7 will generate interrupt Bit7(128) Message object at level 8 will generate interrupt Bit8(256) Message object at level 9 will generate interrupt Bit9(512) Message object at level 10 will generate interrupt Bit10(1024) Message object at level 11 will generate interrupt Bit11(2048) Message object at level 12 will generate interrupt Bit12(4096) Message object at level 13 will generate interrupt Bit13(8192) Message object at level 14 will generate interrupt Bit14(16384) Message object at level 15 will generate interrupt Bit15(32768) CAN low level error will generate interrupt i The objects at level 13, 14 and 15 are reserved for system usage, they may not be available in future versions. LAN1.Pend 8 0..65535 RW Indicate a pending interrupt at the respective level. See LAN1.Mask for bit description. User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001
EXTENDED REGISTER GROUPS LAN1.ErrVector 9 1..Max. line of PL2 program lines LAN1, Local area network 1 User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001 RW Address of the PL-code line to execute when a comm error occurs. LAN1.LastErr 10 1..7 R The last error reported by the low level CAN protocol. This member is most useful when the ErrVector is used. 0. No error 1. Stuff error More than5 equal bits in a sequense have occured in a part of a received message where this is not allowed. 2. Form Error The fixed format part of a receivedframe has the wrong format. 3. Acknowledgment Error The message transmitted by this device was not acknowledged by another node. 4. Bit 1 Error During the transmission of a message, the 82527 wanted to send a recessive level, (bit of logical value 1), but the monitored CAN bus value dominant. 5. Bit 0 Error During the transmission of a message, the 82527 wanted to send a recessive level, (bit of logical value 0), but the monitored CAN bus value was recessive. During busoff recovery, this status is set each time a recessive bit is received. 6. CRC Error The CRC checksum was incorrect in the message received. The CRC recevied for an incoming message does not match with the CRC value calculated by this device for the received data. 7. Unused. LAN1.Handler 11 1..xx R An interrupt handler for cascading interrupts from the LAN1 group. See cascading interrupts, Vector and Int. This member is used when installing an interrupt cascade handler for the LAN1 group. The Vector.Cascade member must be initialized with this handler before interrupts can be generated from the LAN1 group. Example: ; Setup the cascaded interrupt handler. Vector.Cascade1 = LAN1.Handler Or Int.SysMask, 256 ; LAN1 can generate cascaded system ;interrupts LAN1.ErrVector = @isrLANERR or LAN1.Mask, 32768 ; Allow errors to generate an interrupt 147
- Page 95 and 96: EXTENDED REGISTER GROUPS Tmr, Syste
- Page 97 and 98: EXTENDED REGISTER GROUPS RELATED IT
- Page 99 and 100: EXTENDED REGISTER GROUPS SysIo.ADC1
- Page 101 and 102: EXTENDED REGISTER GROUPS Bit10 (102
- Page 103 and 104: EXTENDED REGISTER GROUPS INT, INTER
- Page 105 and 106: EXTENDED REGISTER GROUPS Bit2 (4) =
- Page 107 and 108: EXTENDED REGISTER GROUPS Int, Inter
- Page 109 and 110: EXTENDED REGISTER GROUPS IN, DIGITA
- Page 111 and 112: EXTENDED REGISTER GROUPS X7A:6. In.
- Page 113 and 114: EXTENDED REGISTER GROUPS X7B:33. Ou
- Page 115 and 116: EXTENDED REGISTER GROUPS GROUP MEMB
- Page 117 and 118: EXTENDED REGISTER GROUPS Vector, In
- Page 119 and 120: EXTENDED REGISTER GROUPS CAPTURE, C
- Page 121 and 122: EXTENDED REGISTER GROUPS CAPTURE, C
- Page 123 and 124: EXTENDED REGISTER GROUPS CAPTURE, C
- Page 125 and 126: EXTENDED REGISTER GROUPS Ana.ConnTM
- Page 127 and 128: EXTENDED REGISTER GROUPS EEPROM Gro
- Page 129 and 130: EXTENDED REGISTER GROUPS Bit(0..3)
- Page 131 and 132: EXTENDED REGISTER GROUPS GROUP MEMB
- Page 133 and 134: EXTENDED REGISTER GROUPS RD1CORR, P
- Page 135 and 136: EXTENDED REGISTER GROUPS OptAD, ana
- Page 137 and 138: EXTENDED REGISTER GROUPS OptAD.7 7
- Page 139 and 140: EXTENDED REGISTER GROUPS LAN1, LOCA
- Page 141 and 142: EXTENDED REGISTER GROUPS WriteLAN1
- Page 143 and 144: EXTENDED REGISTER GROUPS LAN1, Loca
- Page 145: EXTENDED REGISTER GROUPS LAN1, Loca
- Page 149 and 150: EXTENDED REGISTER GROUPS MsgObjLAN1
- Page 151 and 152: EXTENDED REGISTER GROUPS isrDone: M
- Page 153 and 154: EXTENDED REGISTER GROUPS MsgObjLAN2
- Page 155 and 156: EXTENDED REGISTER GROUPS Denominato
- Page 157 and 158: EXTENDED REGISTER GROUPS ABIN Group
- Page 159 and 160: EXTENDED REGISTER GROUPS DSTORE, Gr
- Page 161 and 162: EXTENDED REGISTER GROUPS PARAREA, G
- Page 163 and 164: EXTENDED REGISTER GROUPS XENDAT, Gr
- Page 165 and 166: EXTENDED REGISTER GROUPS wait tmr.t
- Page 167 and 168: EXTENDED REGISTER GROUPS XENDAT.Tra
- Page 169 and 170: EXTENDED REGISTER GROUPS XENDAT, Af
- Page 171 and 172: EXTENDED REGISTER GROUPS XENDAT.RPo
- Page 173 and 174: EXTENDED REGISTER GROUPS Counter 0
- Page 175 and 176: EXTENDED REGISTER GROUPS IDENTIFIER
- Page 177 and 178: EXTENDED REGISTER GROUPS >RPDATA.Ar
- Page 179 and 180: EXTENDED REGISTER GROUPS EXAMPLE US
- Page 181 and 182: EXTENDED REGISTER GROUPS SAnyBus ;
- Page 183 and 184: EXTENDED REGISTER GROUPS GROUP MEMB
- Page 185 and 186: EXTENDED REGISTER GROUPS SAnyBus As
- Page 187 and 188: EXTENDED REGISTER GROUPS PutLONG Pu
- Page 189 and 190: EXTENDED REGISTER GROUPS ABOUTMAIL
- Page 191 and 192: EXTENDED REGISTER GROUPS EN1-EN4, E
- Page 193 and 194: EXTENDED REGISTER GROUPS IENC Group
- Page 195 and 196: EXTENDED REGISTER GROUPS MODEN3-MOD
146<br />
LAN1, Local area network 1<br />
LAN1.StdFilter<br />
5 0..2047 RW<br />
EXTENDED REGISTER GROUPS<br />
Message Acceptance Filter for Standard Frames. Allows the<br />
user to globally mask, or ”don’t care” any identifier bits in the<br />
incoming message object. Range, 11-bit message ID. Default<br />
is that all bits must match.<br />
NOTE. This is a global filter, it affects all descriptors, and use<br />
only if you are familiar with the arbitration method <strong>of</strong> CAN.<br />
LAN1.ExtFilter 6 0..536870911 RW<br />
Message Acceptance Filter for Extended Frames. Allows the<br />
user to globally mask, or ”don’t care” any identifier bits in the<br />
incoming message object. Range, 29-bit message ID. Default<br />
is, all bits must match.<br />
NOTE. This is a global filter, it affects all descriptors, and use<br />
only if you are familiar with the arbitration method <strong>of</strong> CAN.<br />
LAN1.Mask 7 0..65535 RW<br />
Specify the object(s) at respective level that can generate<br />
interrupt to the PL code interpreter. Also the error vector.<br />
0 No message object can generate interrupt.<br />
Bit0(1) Message object at level 1 will generate interrupt<br />
Bit1(2) Message object at level 2 will generate interrupt<br />
Bit2(4) Message object at level 3 will generate interrupt<br />
Bit3(8) Message object at level 4 will generate interrupt<br />
Bit4(16) Message object at level 5 will generate interrupt<br />
Bit5(32) Message object at level 6 will generate interrupt<br />
Bit6(64) Message object at level 7 will generate interrupt<br />
Bit7(128) Message object at level 8 will generate interrupt<br />
Bit8(256) Message object at level 9 will generate interrupt<br />
Bit9(512) Message object at level 10 will generate interrupt<br />
Bit10(1024) Message object at level 11 will generate interrupt<br />
Bit11(2048) Message object at level 12 will generate interrupt<br />
Bit12(4096) Message object at level 13 will generate interrupt<br />
Bit13(8192) Message object at level 14 will generate interrupt<br />
Bit14(16384) Message object at level 15 will generate interrupt<br />
Bit15(32768) CAN low level error will generate interrupt<br />
i<br />
The objects at level 13, 14 and 15 are reserved for system<br />
usage, they may not be available in future versions.<br />
LAN1.Pend 8 0..65535 RW<br />
Indicate a pending interrupt at the respective level.<br />
See<br />
LAN1.Mask for bit description.<br />
User's Manual 5.1 Inmotion Technologies AB<br />
Doc. No.9032 0027 01 (B), Rev. 11.07.2001
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