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114 Vector, Interrupt vectors VECTOR, INTERRUPT VECTORS Group Group No. Vector GENERAL EXTENDED REGISTER GROUPS Description 13 Vector table for various interrupts. Holds the start address for an interrupt routine associated with the member. To enable an interrupt in this group, the appropriate bit must be set in Int.SysMask or Int.Mask. The registers in the vector group are the pointers to all interrupt routines. The registers contain line numbers within the application program. FUNCTION When an event occurs, system or input related the interpreter would set the pending bit for that event. If the mask bit for the event is set, the program will start to execute on the line pointed out by the related vector provided that it is not zero. i The Ireturn statement causes program execution to resume at the instruction where normal program flow was interrupted. If a normal return statement is used the interrupt will be executed only once. DO NOT USE NORMAL RETURN IF INT:MODE = 1. Use Ireturn with argument 0. RELATED ITEMS Int.SysMask Bit mask for system interrupts. Int.SysPend Bit mask for pending events. Int.Mask Bit mask for input interrupts; bit 0 (bit value 1) enables the event on Di1. Int.Pend Bit mask for pending events, bit 0 (bit value 1) indicates the Di1 event. Ireturn sys 1 Return statement for system events. Ireturn in 1 Return statement for input events. EXAMPLE USAGE . Vector.CapInt , @Caplabl Vector.DI7 , @Inp7. Caplabl: Ireturn sys 2 Inp7: Ireturn in 64 ;set the vector to the line number of Caplabl ;set the vector to the line number of Inp7 User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001
EXTENDED REGISTER GROUPS GROUP MEMBERS (GROUP 13) Group.Member Member No. Vector, Interrupt vectors Range Ability Default Vector.CycInt 0 0..32767 RW Each time the cyclic timer timesout, the routine pointed to by Vector.CycInt is executed. To enable this interrupt: OR Int.SysMask,1. Vector.CapInt 1 0.. 32767 RW 0 To enable this interrupt: OR Int.SysMask,2. Vector.PosErr 2 0.. 8192 RW The position error is bigger than Int.poserr or if enabled , the serial communication with the Endat sensor has timed out. (see Xendat .mode for more info) To enable this interrupt: OR Int.SysMask,4. Vector.CtrlC 3 0..32767 RW To enable this interrupt: OR Int.SysMask,8. Vector.SysErr 4 0..32767 RW To enable this interrupt: OR Int.SysMask,16. Vector.TempErr 5 0..32767 RW Temperature is high in motor or drive. To enable this interrupt: OR Int.SysMask,32. Vector.BLeedErr 6 0..32767 RW Bleeder load exceeds Int.BLeedLim. To enable this interrupt: OR Int.SysMask,64. Vector.ResolvErr 7 0..32767 RW Resolver amplitudes out of limits. To enable this interrupt: OR Int.SysMask,128. Vector.DI1 8 0..32767 RW Defines interrupt service routines for respective input. The input with higher number has higher priority. The first instruction of the interrupt routine is always executed when the interrupt occurs. By setting the Int.Mask, lower priority interrupts can be masked. Vector.DI2 9 0..32767 RW Vector.DI3 10 0..32767 RW Vector.DI4 11 0..32767 RW User's Manual 5.1 Inmotion Technologies AB Doc. No.9032 0027 01 (B), Rev. 11.07.2001 115
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HEAD OFFICE INMOTION TECHNOLOGIES A
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Table of Contents Table of Contents
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Related items .....................
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Related items .....................
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Creating/Editing Source Code ......
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12 System architecture register val
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14 B002 Timing and execution flow T
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16 Function Block Diagram SOFTWARE
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18 Function Block Diagram Figure 5.
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20 Function Block Diagram Function
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22 Load a new firmware release SOFT
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24 User's Manual 5.1 Inmotion Techn
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26 Argument types executing results
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28 Mnemonic Operators PL2 NATIVE PO
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30 Compiler Symbols PL2 NATIVE POSI
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32 Compiler directives PL2 NATIVE P
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34 Compiler directives Warnings: No
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36 Spline function compilation dire
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38 Multiline Macro MACRO DEFINITION
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PL2 Mnemonics GENERAL The general f
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PL2 MNEMONICS Standard set Mnemonic
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PL2 MNEMONICS TRACE RELATED MNEMONI
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PL2 MNEMONICS Indexed Addressing Mn
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PL2 MNEMONICS If r_length < r_Membe
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PL2 MNEMONICS Text mode \000 Intern
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Extended register groups INTRODUCTI
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EXTENDED REGISTER GROUPS STACK HAND
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EXTENDED REGISTER GROUPS RD1, Resol
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EXTENDED REGISTER GROUPS RD1, Resol
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EXTENDED REGISTER GROUPS RD1.FiltSp
Page 63 and 64: EXTENDED REGISTER GROUPS RD2, Resol
Page 65 and 66: EXTENDED REGISTER GROUPS RD2, Resol
Page 67 and 68: EXTENDED REGISTER GROUPS RD2.ChkLow
Page 69 and 70: EXTENDED REGISTER GROUPS Pos Inc Pr
Page 71 and 72: EXTENDED REGISTER GROUPS Pg.ASpeed
Page 73 and 74: EXTENDED REGISTER GROUPS MOTOR, MOT
Page 75 and 76: EXTENDED REGISTER GROUPS 2-Pole: 81
Page 77 and 78: EXTENDED REGISTER GROUPS Motor.Base
Page 79 and 80: EXTENDED REGISTER GROUPS REG, PID R
Page 81 and 82: EXTENDED REGISTER GROUPS GROUP MEMB
Page 83 and 84: EXTENDED REGISTER GROUPS Positive T
Page 85 and 86: EXTENDED REGISTER GROUPS Reg, PID r
Page 87 and 88: EXTENDED REGISTER GROUPS Gear.Incr
Page 91 and 92: EXTENDED REGISTER GROUPS Gear, Elec
Page 93 and 94: EXTENDED REGISTER GROUPS TMR, SYSTE
Page 95 and 96: EXTENDED REGISTER GROUPS Tmr, Syste
Page 97 and 98: EXTENDED REGISTER GROUPS RELATED IT
Page 99 and 100: EXTENDED REGISTER GROUPS SysIo.ADC1
Page 101 and 102: EXTENDED REGISTER GROUPS Bit10 (102
Page 103 and 104: EXTENDED REGISTER GROUPS INT, INTER
Page 105 and 106: EXTENDED REGISTER GROUPS Bit2 (4) =
Page 107 and 108: EXTENDED REGISTER GROUPS Int, Inter
Page 109 and 110: EXTENDED REGISTER GROUPS IN, DIGITA
Page 111 and 112: EXTENDED REGISTER GROUPS X7A:6. In.
Page 113: EXTENDED REGISTER GROUPS X7B:33. Ou
Page 117 and 118: EXTENDED REGISTER GROUPS Vector, In
Page 119 and 120: EXTENDED REGISTER GROUPS CAPTURE, C
Page 125 and 126: EXTENDED REGISTER GROUPS Ana.ConnTM
Page 127 and 128: EXTENDED REGISTER GROUPS EEPROM Gro
Page 129 and 130: EXTENDED REGISTER GROUPS Bit(0..3)
Page 133 and 134: EXTENDED REGISTER GROUPS RD1CORR, P
Page 135 and 136: EXTENDED REGISTER GROUPS OptAD, ana
Page 137 and 138: EXTENDED REGISTER GROUPS OptAD.7 7
Page 139 and 140: EXTENDED REGISTER GROUPS LAN1, LOCA
Page 141 and 142: EXTENDED REGISTER GROUPS WriteLAN1
Page 143 and 144: EXTENDED REGISTER GROUPS LAN1, Loca
Page 145 and 146: EXTENDED REGISTER GROUPS LAN1, Loca
Page 147 and 148: EXTENDED REGISTER GROUPS LAN1.ErrVe
Page 149 and 150: EXTENDED REGISTER GROUPS MsgObjLAN1
Page 151 and 152: EXTENDED REGISTER GROUPS isrDone: M
Page 153 and 154: EXTENDED REGISTER GROUPS MsgObjLAN2
Page 155 and 156: EXTENDED REGISTER GROUPS Denominato
Page 157 and 158: EXTENDED REGISTER GROUPS ABIN Group
Page 159 and 160: EXTENDED REGISTER GROUPS DSTORE, Gr
Page 161 and 162: EXTENDED REGISTER GROUPS PARAREA, G
Page 163 and 164: EXTENDED REGISTER GROUPS XENDAT, Gr
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EXTENDED REGISTER GROUPS wait tmr.t
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EXTENDED REGISTER GROUPS XENDAT.Tra
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EXTENDED REGISTER GROUPS XENDAT, Af
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EXTENDED REGISTER GROUPS XENDAT.RPo
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EXTENDED REGISTER GROUPS Counter 0
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EXTENDED REGISTER GROUPS IDENTIFIER
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EXTENDED REGISTER GROUPS >RPDATA.Ar
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EXTENDED REGISTER GROUPS EXAMPLE US
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EXTENDED REGISTER GROUPS SAnyBus ;
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EXTENDED REGISTER GROUPS GROUP MEMB
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EXTENDED REGISTER GROUPS SAnyBus As
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EXTENDED REGISTER GROUPS PutLONG Pu
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EXTENDED REGISTER GROUPS ABOUTMAIL
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EXTENDED REGISTER GROUPS EN1-EN4, E
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EXTENDED REGISTER GROUPS IENC Group
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EXTENDED REGISTER GROUPS MODEN3-MOD
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EXTENDED REGISTER GROUPS ModEN3.Cap
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200 Computer Mode Record type 1 2 3
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PL2 On line commands PL2 ON LINE CO
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PL2 ON LINE COMMANDS Command name E
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208 B009 Definitions THE ECT MAIN M
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210 Edit in generating this code. F
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212 Compile EXITING EDIT To exit Ed
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214 Test line, assisting the user t
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216 Test including the upload and d
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1 2 3 4 5 6 X7:A 16 15 14 13 12 11
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Start (reset entry) Init If ..... t
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