Table of Contents - TG Drives

114
Vector, Interrupt vectors
VECTOR, INTERRUPT VECTORS
Group Group
No.
Vector
GENERAL
EXTENDED REGISTER GROUPS
Description
13 Vector table for various interrupts. Holds the start address
for an interrupt routine associated with the member. To
enable an interrupt in this group, the appropriate bit must
be set in Int.SysMask or Int.Mask.
The registers in the vector group are the pointers to all interrupt routines. The
registers contain line numbers within the application program.
FUNCTION
When an event occurs, system or input related the interpreter would set the
pending bit for that event. If the mask bit for the event is set, the program will start
to execute on the line pointed out by the related vector provided that it is not zero.
i
The Ireturn statement causes program execution to resume at the
instruction where normal program flow was interrupted.
If a normal return statement is used the interrupt will be executed only
once.
DO NOT USE NORMAL RETURN IF INT:MODE = 1.
Use Ireturn with argument 0.
RELATED ITEMS
Int.SysMask Bit mask for system interrupts.
Int.SysPend Bit mask for pending events.
Int.Mask Bit mask for input interrupts; bit 0 (bit value 1) enables the
event on Di1.
Int.Pend Bit mask for pending events, bit 0 (bit value 1) indicates the
Di1 event.
Ireturn sys 1 Return statement
for system events.
Ireturn in 1 Return statement for input events.
EXAMPLE USAGE
.
Vector.CapInt , @Caplabl
Vector.DI7 , @Inp7.
Caplabl:
Ireturn sys 2
Inp7:
Ireturn in 64
;set the vector to the line number of Caplabl
;set the vector to the line number of Inp7
User's Manual 5.1 Inmotion Technologies AB
Doc. No.9032 0027 01 (B), Rev. 11.07.2001