Table of Contents - TG Drives

106
Int, Interrupt control
Bit6 (64) = 1
Pending Bleederr interrupt.
Bit7 (128) = 1 Pending Resolverr interrupt.
Bit8 (256) = 1 Pending Cascade1 interupt.
Bit9 (512) = 1 Pending Cascade2 interupt
Bit10 (1024) = 1 Pending Cascade3 interupt
Bit11 Reserved
Bit12 (4096) = 1 Pending AnyBus-S interupt
Bit13 Reserved
Bit14 Reserved
Bit15 Reserved
Int.SysMask 4 0..65535 RW
Enables system interrupts.
Bit0 (1) = 1 Enable CycInt interrupt.
Bit1 (2) = 1 Enable CapInt interrupt.
Bit2 (4) = 1 Enable PosErr interrupt.
Bit3 (8) = 1 Enable Ctrl C interrupt.
Bit4 (16) = 1 Enable Syserr interrupt.
Bit5 (32) = 1 Enable Temperr interrupt.
Bit6 (64) = 1 Enable Bleederr interrupt.
Bit7 (128) = 1 Enable Resloverr interrupt.
Bit8 (256) =1 Enable Cascade1 interrupt.
Bit9 (512) = 1 Enable Cascade2 interrupt
Bit10 1024) = 1 Enable Cascade3 interrupt
Bit11 Reserved
Bit12 (4096) = 1 Enable AnyBus-S interrupt
Bit13 Reserved
Bit14 Reserved
Bit15 Reserved
EXTENDED REGISTER GROUPS
Int.PosErr 5 32 bit RW 65536
Setting this to zero will prevent detection and generation of
position error interrupt.
Int.TempMask 6 0..28 RW
To prevent thermal overload of the system when there is no
PL-program present (or running), there is a possibility within
the firmware to get thermal protection.
Internal temperature too high event Bit 4 (bitvalue = 16),
should be set if automatic trip on Drive temp high is wanted.
User's Manual 5.1 Inmotion Technologies AB
Doc. No.9032 0027 01 (B), Rev. 11.07.2001