IBM System/7 Functional Characteristics - All about the IBM 1130 ...

Shift Right Arithmetic (PSRA)0 5 8 11 15Op code R Mod Count0 00 1 0 X XX 0 11 XXXXX1111 II 11 1111S•••••••\,•■•••■■■••••,,,■•■",■•■••■■,...■"■•■••■,,■••■•1 0-7 6 or 7 XAll 16 bits in the index register (R), or the accumulator if R=000, are shifted rightby the number of bits specified in the count field.Vacated high-order bits are set to the value of the sign bit (bit 0). All bits shiftedout of the low-order bit (bit 15) are lost.The shift count field can specify any decimal value from 0 to 16. Shift countsgreater than 16 are invalid and cause a program check interruption. A shift count of 15or 16 sets the entire contents of the R register to the value of the sign bit. A shift countof 0 is valid and serves a useful purpose. Although no shifting takes place, this is a simplemethod of setting the result indicators to reflect the current contents of the R register.The carry and overflow indicators are not changed. The result indicators are changedto reflect the final contents of the R register.Example:Assume a right arithmetic shift of eight bits in the accumulator0 5 8 15PSRA instructionOp code R Mod Count0 0 0 1 0 0 0 0 0 1 1 0 1 0 0 01111 II 11 11111 0 6 8AccumulatorOriginal value1 shifted inBits shifted out are lostAfter first shift1 shifted inAfter second shift• •• •• •After eighth shift 1111 1111 1000 0000